2009-10-07 18:56:22 +04:00
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#ifndef HW_IDE_PCI_H
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#define HW_IDE_PCI_H
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2016-06-22 20:11:19 +03:00
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#include "hw/ide/internal.h"
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2022-12-22 13:03:28 +03:00
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#include "hw/pci/pci_device.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2009-10-07 18:56:22 +04:00
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2014-08-05 01:11:13 +04:00
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#define BM_STATUS_DMAING 0x01
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#define BM_STATUS_ERROR 0x02
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#define BM_STATUS_INT 0x04
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#define BM_CMD_START 0x01
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#define BM_CMD_READ 0x08
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2010-12-15 02:23:00 +03:00
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typedef struct BMDMAState {
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IDEDMA dma;
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uint8_t cmd;
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uint8_t status;
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uint32_t addr;
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IDEBus *bus;
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/* current transfer state */
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uint32_t cur_addr;
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uint32_t cur_prd_last;
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uint32_t cur_prd_addr;
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uint32_t cur_prd_len;
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2014-10-07 15:59:15 +04:00
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BlockCompletionFunc *dma_cb;
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2011-08-08 17:09:11 +04:00
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MemoryRegion addr_ioport;
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MemoryRegion extra_io;
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2010-12-15 02:23:00 +03:00
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qemu_irq irq;
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2011-05-26 17:00:34 +04:00
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/* Bit 0-2 and 7: BM status register
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* Bit 3-6: bus->error_status */
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uint8_t migration_compat_status;
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2015-02-23 19:17:57 +03:00
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uint8_t migration_retry_unit;
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2015-02-23 19:17:58 +03:00
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int64_t migration_retry_sector_num;
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uint32_t migration_retry_nsector;
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2015-02-23 19:17:57 +03:00
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2011-08-08 17:09:11 +04:00
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struct PCIIDEState *pci_dev;
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2010-12-15 02:23:00 +03:00
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} BMDMAState;
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2013-07-17 20:44:48 +04:00
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#define TYPE_PCI_IDE "pci-ide"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(PCIIDEState, PCI_IDE)
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2013-07-17 20:44:48 +04:00
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2020-09-03 23:43:22 +03:00
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struct PCIIDEState {
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2013-07-17 20:44:48 +04:00
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/*< private >*/
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PCIDevice parent_obj;
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/*< public >*/
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2009-10-07 18:56:22 +04:00
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IDEBus bus[2];
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BMDMAState bmdma[2];
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2023-01-27 00:17:36 +03:00
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qemu_irq isa_irq[2];
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2009-10-07 18:56:26 +04:00
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uint32_t secondary; /* used only for cmd646 */
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2011-08-08 17:09:11 +04:00
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MemoryRegion bmdma_bar;
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2019-01-25 22:52:11 +03:00
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MemoryRegion cmd_bar[2];
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MemoryRegion data_bar[2];
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2020-09-03 23:43:22 +03:00
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};
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2009-10-07 18:56:22 +04:00
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2011-08-08 17:09:11 +04:00
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void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
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void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
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extern MemoryRegionOps bmdma_addr_ioport_ops;
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2020-03-17 18:05:37 +03:00
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void pci_ide_create_devs(PCIDevice *dev);
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2009-10-07 22:55:32 +04:00
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extern const VMStateDescription vmstate_ide_pci;
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2019-01-25 22:52:11 +03:00
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extern const MemoryRegionOps pci_ide_cmd_le_ops;
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extern const MemoryRegionOps pci_ide_data_le_ops;
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2009-10-07 18:56:22 +04:00
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#endif
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