2021-05-17 23:50:09 +03:00
|
|
|
DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, noreturn, env, i32, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32)
|
2016-07-31 08:13:12 +03:00
|
|
|
DEF_HELPER_FLAGS_4(tw, TCG_CALL_NO_WG, void, env, tl, tl, i32)
|
2008-11-24 14:28:19 +03:00
|
|
|
#if defined(TARGET_PPC64)
|
2016-07-31 08:13:12 +03:00
|
|
|
DEF_HELPER_FLAGS_4(td, TCG_CALL_NO_WG, void, env, tl, tl, i32)
|
2008-11-24 14:28:19 +03:00
|
|
|
#endif
|
2022-07-15 23:54:38 +03:00
|
|
|
DEF_HELPER_4(HASHST, void, env, tl, tl, tl)
|
|
|
|
|
DEF_HELPER_4(HASHCHK, void, env, tl, tl, tl)
|
2022-07-15 23:54:39 +03:00
|
|
|
DEF_HELPER_4(HASHSTP, void, env, tl, tl, tl)
|
|
|
|
|
DEF_HELPER_4(HASHCHKP, void, env, tl, tl, tl)
|
2008-11-30 19:24:55 +03:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
2012-05-30 08:23:23 +04:00
|
|
|
DEF_HELPER_2(store_msr, void, env, tl)
|
2022-10-21 17:21:54 +03:00
|
|
|
DEF_HELPER_1(ppc_maybe_interrupt, void, env)
|
2012-05-30 08:23:23 +04:00
|
|
|
DEF_HELPER_1(rfi, void, env)
|
|
|
|
|
DEF_HELPER_1(40x_rfci, void, env)
|
|
|
|
|
DEF_HELPER_1(rfci, void, env)
|
|
|
|
|
DEF_HELPER_1(rfdi, void, env)
|
|
|
|
|
DEF_HELPER_1(rfmci, void, env)
|
2008-11-30 19:24:55 +03:00
|
|
|
#if defined(TARGET_PPC64)
|
2021-03-23 21:43:35 +03:00
|
|
|
DEF_HELPER_2(scv, noreturn, env, i32)
|
2016-06-22 00:48:55 +03:00
|
|
|
DEF_HELPER_2(pminsn, void, env, i32)
|
2012-05-30 08:23:23 +04:00
|
|
|
DEF_HELPER_1(rfid, void, env)
|
2020-05-07 14:53:28 +03:00
|
|
|
DEF_HELPER_1(rfscv, void, env)
|
2012-05-30 08:23:23 +04:00
|
|
|
DEF_HELPER_1(hrfid, void, env)
|
2021-12-17 19:57:19 +03:00
|
|
|
DEF_HELPER_2(rfebb, void, env, tl)
|
2016-06-27 09:55:16 +03:00
|
|
|
DEF_HELPER_2(store_lpcr, void, env, tl)
|
2018-06-04 11:45:13 +03:00
|
|
|
DEF_HELPER_2(store_pcr, void, env, tl)
|
target/ppc: PMU basic cycle count for pseries TCG
This patch adds the barebones of the PMU logic by enabling cycle
counting. The overall logic goes as follows:
- MMCR0 reg initial value is set to 0x80000000 (MMCR0_FC set) to avoid
having to spin the PMU right at system init;
- to retrieve the events that are being profiled, pmc_get_event() will
check the current MMCR0 and MMCR1 value and return the appropriate
PMUEventType. For PMCs 1-4, event 0x2 is the implementation dependent
value of PMU_EVENT_INSTRUCTIONS and event 0x1E is the implementation
dependent value of PMU_EVENT_CYCLES. These events are supported by IBM
Power chips since Power8, at least, and the Linux Perf driver makes use
of these events until kernel v5.15. For PMC1, event 0xF0 is the
architected PowerISA event for cycles. Event 0xFE is the architected
PowerISA event for instructions;
- if the counter is frozen, either via the global MMCR0_FC bit or its
individual frozen counter bits, PMU_EVENT_INACTIVE is returned;
- pmu_update_cycles() will go through each counter and update the
values of all PMCs that are counting cycles. This function will be
called every time a MMCR0 update is done to keep counters values
up to date. Upcoming patches will use this function to allow the
counters to be properly updated during read/write of the PMCs
and MMCR1 writes.
Given that the base CPU frequency is fixed at 1Ghz for both powernv and
pseries clock, cycle calculation assumes that 1 nanosecond equals 1 CPU
cycle. Cycle value is then calculated by adding the elapsed time, in
nanoseconds, of the last cycle update done via pmu_update_cycles().
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20211201151734.654994-3-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 19:57:18 +03:00
|
|
|
DEF_HELPER_2(store_mmcr0, void, env, tl)
|
2021-12-17 19:57:18 +03:00
|
|
|
DEF_HELPER_2(store_mmcr1, void, env, tl)
|
2021-12-17 19:57:18 +03:00
|
|
|
DEF_HELPER_3(store_pmc, void, env, i32, i64)
|
|
|
|
|
DEF_HELPER_2(read_pmc, tl, env, i32)
|
2021-12-17 19:57:18 +03:00
|
|
|
DEF_HELPER_2(insns_inc, void, env, i32)
|
2022-10-25 23:24:24 +03:00
|
|
|
DEF_HELPER_1(handle_pmc5_overflow, void, env)
|
2008-11-30 19:24:55 +03:00
|
|
|
#endif
|
2016-09-20 19:35:00 +03:00
|
|
|
DEF_HELPER_1(check_tlb_flush_local, void, env)
|
|
|
|
|
DEF_HELPER_1(check_tlb_flush_global, void, env)
|
2008-11-30 19:24:55 +03:00
|
|
|
#endif
|
2008-11-22 13:09:17 +03:00
|
|
|
|
2012-05-30 08:23:40 +04:00
|
|
|
DEF_HELPER_3(lmw, void, env, tl, i32)
|
2016-07-31 08:13:12 +03:00
|
|
|
DEF_HELPER_FLAGS_3(stmw, TCG_CALL_NO_WG, void, env, tl, i32)
|
2012-05-30 08:23:40 +04:00
|
|
|
DEF_HELPER_4(lsw, void, env, tl, i32, i32)
|
|
|
|
|
DEF_HELPER_5(lswx, void, env, tl, i32, i32, i32)
|
2016-07-31 08:13:12 +03:00
|
|
|
DEF_HELPER_FLAGS_4(stsw, TCG_CALL_NO_WG, void, env, tl, i32, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(dcbz, TCG_CALL_NO_WG, void, env, tl, i32)
|
2018-09-21 09:59:07 +03:00
|
|
|
DEF_HELPER_FLAGS_3(dcbzep, TCG_CALL_NO_WG, void, env, tl, i32)
|
2016-07-31 08:13:12 +03:00
|
|
|
DEF_HELPER_FLAGS_2(icbi, TCG_CALL_NO_WG, void, env, tl)
|
2018-09-21 09:59:07 +03:00
|
|
|
DEF_HELPER_FLAGS_2(icbiep, TCG_CALL_NO_WG, void, env, tl)
|
2012-05-30 08:23:40 +04:00
|
|
|
DEF_HELPER_5(lscbx, tl, env, tl, i32, i32, i32)
|
2008-11-30 19:24:30 +03:00
|
|
|
|
2008-11-01 03:54:12 +03:00
|
|
|
#if defined(TARGET_PPC64)
|
2014-01-07 20:05:51 +04:00
|
|
|
DEF_HELPER_4(divdeu, i64, env, i64, i64, i32)
|
2014-01-07 20:05:52 +04:00
|
|
|
DEF_HELPER_4(divde, i64, env, i64, i64, i32)
|
2008-11-01 03:54:12 +03:00
|
|
|
#endif
|
2014-01-07 20:05:53 +04:00
|
|
|
DEF_HELPER_4(divweu, tl, env, tl, tl, i32)
|
2014-01-07 20:05:54 +04:00
|
|
|
DEF_HELPER_4(divwe, tl, env, tl, tl, i32)
|
2008-11-01 03:54:12 +03:00
|
|
|
|
2012-10-09 23:53:09 +04:00
|
|
|
DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl)
|
2013-04-20 12:56:16 +04:00
|
|
|
DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_3(sraw, tl, env, tl, tl)
|
2021-11-04 15:36:55 +03:00
|
|
|
DEF_HELPER_FLAGS_2(CFUGED, TCG_CALL_NO_RWG_SE, i64, i64, i64)
|
2021-10-29 23:23:59 +03:00
|
|
|
DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
|
2021-10-29 23:24:00 +03:00
|
|
|
DEF_HELPER_FLAGS_2(PEXTD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
|
2022-06-29 19:29:04 +03:00
|
|
|
DEF_HELPER_FLAGS_1(CDTBCD, TCG_CALL_NO_RWG_SE, tl, tl)
|
2022-06-29 19:29:03 +03:00
|
|
|
DEF_HELPER_FLAGS_1(CBCDTD, TCG_CALL_NO_RWG_SE, tl, tl)
|
2021-11-04 15:36:57 +03:00
|
|
|
#if defined(TARGET_PPC64)
|
2016-07-26 14:58:34 +03:00
|
|
|
DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl)
|
2016-11-21 13:58:25 +03:00
|
|
|
DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
|
2014-01-07 20:05:49 +04:00
|
|
|
DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_3(srad, tl, env, tl, tl)
|
2022-05-17 15:39:18 +03:00
|
|
|
DEF_HELPER_FLAGS_0(darn32, TCG_CALL_NO_RWG, tl)
|
|
|
|
|
DEF_HELPER_FLAGS_0(darn64, TCG_CALL_NO_RWG, tl)
|
2008-10-21 15:31:27 +04:00
|
|
|
#endif
|
|
|
|
|
|
2012-10-09 23:53:09 +04:00
|
|
|
DEF_HELPER_FLAGS_1(cntlsw32, TCG_CALL_NO_RWG_SE, i32, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_1(cntlzw32, TCG_CALL_NO_RWG_SE, i32, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_2(brinc, TCG_CALL_NO_RWG_SE, tl, tl, tl)
|
2008-11-17 17:43:54 +03:00
|
|
|
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_1(float_check_status, void, env)
|
2021-12-17 19:57:12 +03:00
|
|
|
DEF_HELPER_1(fpscr_check_status, void, env)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_1(reset_fpstatus, void, env)
|
2017-01-06 09:14:47 +03:00
|
|
|
DEF_HELPER_2(compute_fprf_float64, void, env, i64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_3(store_fpscr, void, env, i64, i32)
|
|
|
|
|
DEF_HELPER_2(fpscr_clrbit, void, env, i32)
|
|
|
|
|
DEF_HELPER_2(fpscr_setbit, void, env, i32)
|
2018-07-03 18:17:32 +03:00
|
|
|
DEF_HELPER_FLAGS_1(todouble, TCG_CALL_NO_RWG_SE, i64, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_1(tosingle, TCG_CALL_NO_RWG_SE, i32, i64)
|
2008-11-19 19:10:23 +03:00
|
|
|
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_4(fcmpo, void, env, i64, i64, i32)
|
|
|
|
|
DEF_HELPER_4(fcmpu, void, env, i64, i64, i32)
|
2008-11-30 19:24:55 +03:00
|
|
|
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(fctiw, i64, env, i64)
|
2014-01-07 20:05:59 +04:00
|
|
|
DEF_HELPER_2(fctiwu, i64, env, i64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(fctiwz, i64, env, i64)
|
2014-01-07 20:05:59 +04:00
|
|
|
DEF_HELPER_2(fctiwuz, i64, env, i64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(fcfid, i64, env, i64)
|
2014-01-07 20:06:00 +04:00
|
|
|
DEF_HELPER_2(fcfidu, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(fcfids, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(fcfidus, i64, env, i64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(fctid, i64, env, i64)
|
2014-01-07 20:05:59 +04:00
|
|
|
DEF_HELPER_2(fctidu, i64, env, i64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(fctidz, i64, env, i64)
|
2014-01-07 20:05:59 +04:00
|
|
|
DEF_HELPER_2(fctiduz, i64, env, i64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(frsp, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(frin, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(friz, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(frip, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(frim, i64, env, i64)
|
2008-11-19 19:10:23 +03:00
|
|
|
|
2018-07-03 18:17:29 +03:00
|
|
|
DEF_HELPER_3(fadd, f64, env, f64, f64)
|
2021-12-17 19:57:16 +03:00
|
|
|
DEF_HELPER_3(fadds, f64, env, f64, f64)
|
2018-07-03 18:17:29 +03:00
|
|
|
DEF_HELPER_3(fsub, f64, env, f64, f64)
|
2021-12-17 19:57:16 +03:00
|
|
|
DEF_HELPER_3(fsubs, f64, env, f64, f64)
|
2018-07-03 18:17:28 +03:00
|
|
|
DEF_HELPER_3(fmul, f64, env, f64, f64)
|
2021-12-17 19:57:16 +03:00
|
|
|
DEF_HELPER_3(fmuls, f64, env, f64, f64)
|
2018-07-03 18:17:27 +03:00
|
|
|
DEF_HELPER_3(fdiv, f64, env, f64, f64)
|
2021-12-17 19:57:16 +03:00
|
|
|
DEF_HELPER_3(fdivs, f64, env, f64, f64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_4(fmadd, i64, env, i64, i64, i64)
|
|
|
|
|
DEF_HELPER_4(fmsub, i64, env, i64, i64, i64)
|
|
|
|
|
DEF_HELPER_4(fnmadd, i64, env, i64, i64, i64)
|
|
|
|
|
DEF_HELPER_4(fnmsub, i64, env, i64, i64, i64)
|
2021-12-17 19:57:16 +03:00
|
|
|
DEF_HELPER_4(fmadds, i64, env, i64, i64, i64)
|
|
|
|
|
DEF_HELPER_4(fmsubs, i64, env, i64, i64, i64)
|
|
|
|
|
DEF_HELPER_4(fnmadds, i64, env, i64, i64, i64)
|
|
|
|
|
DEF_HELPER_4(fnmsubs, i64, env, i64, i64, i64)
|
2022-09-05 15:37:46 +03:00
|
|
|
DEF_HELPER_2(FSQRT, f64, env, f64)
|
|
|
|
|
DEF_HELPER_2(FSQRTS, f64, env, f64)
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(fre, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(fres, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(frsqrte, i64, env, i64)
|
2021-12-17 19:57:16 +03:00
|
|
|
DEF_HELPER_2(frsqrtes, i64, env, i64)
|
2022-05-17 15:39:22 +03:00
|
|
|
DEF_HELPER_FLAGS_3(FSEL, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64)
|
2008-11-19 19:10:23 +03:00
|
|
|
|
2014-01-07 20:06:07 +04:00
|
|
|
DEF_HELPER_FLAGS_2(ftdiv, TCG_CALL_NO_RWG_SE, i32, i64, i64)
|
2014-01-07 20:06:08 +04:00
|
|
|
DEF_HELPER_FLAGS_1(ftsqrt, TCG_CALL_NO_RWG_SE, i32, i64)
|
2014-01-07 20:06:07 +04:00
|
|
|
|
2009-01-03 16:31:40 +03:00
|
|
|
#define dh_alias_avr ptr
|
2009-10-02 01:12:16 +04:00
|
|
|
#define dh_ctype_avr ppc_avr_t *
|
2022-02-17 04:06:22 +03:00
|
|
|
#define dh_typecode_avr dh_typecode_ptr
|
2009-01-03 16:31:40 +03:00
|
|
|
|
2019-06-16 15:37:40 +03:00
|
|
|
#define dh_alias_vsr ptr
|
|
|
|
|
#define dh_ctype_vsr ppc_vsr_t *
|
2022-02-17 04:06:22 +03:00
|
|
|
#define dh_typecode_vsr dh_typecode_ptr
|
2019-06-16 15:37:40 +03:00
|
|
|
|
2022-05-24 17:05:31 +03:00
|
|
|
#define dh_alias_acc ptr
|
|
|
|
|
#define dh_ctype_acc ppc_acc_t *
|
|
|
|
|
#define dh_typecode_acc dh_typecode_ptr
|
|
|
|
|
|
target/ppc: Move VAVG[SU][BHW] to decodetree and use gvec
Moved the instructions VAVGUB, VAVGUH, VAVGUW, VAVGSB, VAVGSH, VAVGSW,
to decodetree and use gvec with them. For these one the right shift
had to be made before the sum as to avoid an overflow, so add 1 at the
end if any of the entries had 1 in its LSB as to replicate the "+ 1"
before the shift described by the ISA.
vavgub:
rept loop master patch
8 12500 0,02616600 0,00754200 (-71.2%)
25 4000 0,02530000 0,00637700 (-74.8%)
100 1000 0,02604600 0,00790100 (-69.7%)
500 200 0,03189300 0,01838400 (-42.4%)
2500 40 0,06006900 0,06851000 (+14.1%)
8000 12 0,13941000 0,20548500 (+47.4%)
vavguh:
rept loop master patch
8 12500 0,01818200 0,00780600 (-57.1%)
25 4000 0,01789300 0,00641600 (-64.1%)
100 1000 0,01899100 0,00787200 (-58.5%)
500 200 0,02527200 0,01828400 (-27.7%)
2500 40 0,05361800 0,06773000 (+26.3%)
8000 12 0,12886600 0,20291400 (+57.5%)
vavguw:
rept loop master patch
8 12500 0,01423100 0,00776600 (-45.4%)
25 4000 0,01780800 0,00638600 (-64.1%)
100 1000 0,02085500 0,00787000 (-62.3%)
500 200 0,02737100 0,01828800 (-33.2%)
2500 40 0,05572600 0,06774200 (+21.6%)
8000 12 0,13101700 0,20311600 (+55.0%)
vavgsb:
rept loop master patch
8 12500 0,03006000 0,00788600 (-73.8%)
25 4000 0,02882200 0,00637800 (-77.9%)
100 1000 0,02958000 0,00791400 (-73.2%)
500 200 0,03548800 0,01860400 (-47.6%)
2500 40 0,06360000 0,06850800 (+7.7%)
8000 12 0,13816500 0,20550300 (+48.7%)
vavgsh:
rept loop master patch
8 12500 0,01965900 0,00776600 (-60.5%)
25 4000 0,01875400 0,00638700 (-65.9%)
100 1000 0,01952200 0,00786900 (-59.7%)
500 200 0,02562000 0,01760300 (-31.3%)
2500 40 0,05384300 0,06742800 (+25.2%)
8000 12 0,13240800 0,20330000 (+53.5%)
vavgsw:
rept loop master patch
8 12500 0,01407700 0,00775600 (-44.9%)
25 4000 0,01762300 0,00640000 (-63.7%)
100 1000 0,02046500 0,00788500 (-61.5%)
500 200 0,02745600 0,01843000 (-32.9%)
2500 40 0,05375500 0,06820500 (+26.9%)
8000 12 0,13068300 0,20304900 (+55.4%)
These results to me seems to indicate that with gvec the results have a
slower translation but faster execution.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-7-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:34 +03:00
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|
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DEF_HELPER_FLAGS_4(VAVGUB, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
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DEF_HELPER_FLAGS_4(VAVGUH, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
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DEF_HELPER_FLAGS_4(VAVGUW, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
target/ppc: Move VABSDU[BHW] to decodetree and use gvec
Moved VABSDUB, VABSDUH and VABSDUW to decodetree and use gvec to
translate them.
vabsdub:
rept loop master patch
8 12500 0,03601600 0,00688500 (-80.9%)
25 4000 0,03651000 0,00532100 (-85.4%)
100 1000 0,03666900 0,00595300 (-83.8%)
500 200 0,04305800 0,01244600 (-71.1%)
2500 40 0,06893300 0,04273700 (-38.0%)
8000 12 0,14633200 0,12660300 (-13.5%)
vabsduh:
rept loop master patch
8 12500 0,02172400 0,00687500 (-68.4%)
25 4000 0,02154100 0,00531500 (-75.3%)
100 1000 0,02235400 0,00596300 (-73.3%)
500 200 0,02827500 0,01245100 (-56.0%)
2500 40 0,05638400 0,04285500 (-24.0%)
8000 12 0,13166000 0,12641400 (-4.0%)
vabsduw:
rept loop master patch
8 12500 0,01646400 0,00688300 (-58.2%)
25 4000 0,01454500 0,00475500 (-67.3%)
100 1000 0,01545800 0,00511800 (-66.9%)
500 200 0,02168200 0,01114300 (-48.6%)
2500 40 0,04571300 0,04138800 (-9.5%)
8000 12 0,12209500 0,12178500 (-0.3%)
Same as VADDCUW and VSUBCUW, overall performance gain but it uses more
TCGop (4 before the patch, 6 after).
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-8-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:35 +03:00
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DEF_HELPER_FLAGS_4(VABSDUB, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
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DEF_HELPER_FLAGS_4(VABSDUH, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
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DEF_HELPER_FLAGS_4(VABSDUW, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
target/ppc: Move VAVG[SU][BHW] to decodetree and use gvec
Moved the instructions VAVGUB, VAVGUH, VAVGUW, VAVGSB, VAVGSH, VAVGSW,
to decodetree and use gvec with them. For these one the right shift
had to be made before the sum as to avoid an overflow, so add 1 at the
end if any of the entries had 1 in its LSB as to replicate the "+ 1"
before the shift described by the ISA.
vavgub:
rept loop master patch
8 12500 0,02616600 0,00754200 (-71.2%)
25 4000 0,02530000 0,00637700 (-74.8%)
100 1000 0,02604600 0,00790100 (-69.7%)
500 200 0,03189300 0,01838400 (-42.4%)
2500 40 0,06006900 0,06851000 (+14.1%)
8000 12 0,13941000 0,20548500 (+47.4%)
vavguh:
rept loop master patch
8 12500 0,01818200 0,00780600 (-57.1%)
25 4000 0,01789300 0,00641600 (-64.1%)
100 1000 0,01899100 0,00787200 (-58.5%)
500 200 0,02527200 0,01828400 (-27.7%)
2500 40 0,05361800 0,06773000 (+26.3%)
8000 12 0,12886600 0,20291400 (+57.5%)
vavguw:
rept loop master patch
8 12500 0,01423100 0,00776600 (-45.4%)
25 4000 0,01780800 0,00638600 (-64.1%)
100 1000 0,02085500 0,00787000 (-62.3%)
500 200 0,02737100 0,01828800 (-33.2%)
2500 40 0,05572600 0,06774200 (+21.6%)
8000 12 0,13101700 0,20311600 (+55.0%)
vavgsb:
rept loop master patch
8 12500 0,03006000 0,00788600 (-73.8%)
25 4000 0,02882200 0,00637800 (-77.9%)
100 1000 0,02958000 0,00791400 (-73.2%)
500 200 0,03548800 0,01860400 (-47.6%)
2500 40 0,06360000 0,06850800 (+7.7%)
8000 12 0,13816500 0,20550300 (+48.7%)
vavgsh:
rept loop master patch
8 12500 0,01965900 0,00776600 (-60.5%)
25 4000 0,01875400 0,00638700 (-65.9%)
100 1000 0,01952200 0,00786900 (-59.7%)
500 200 0,02562000 0,01760300 (-31.3%)
2500 40 0,05384300 0,06742800 (+25.2%)
8000 12 0,13240800 0,20330000 (+53.5%)
vavgsw:
rept loop master patch
8 12500 0,01407700 0,00775600 (-44.9%)
25 4000 0,01762300 0,00640000 (-63.7%)
100 1000 0,02046500 0,00788500 (-61.5%)
500 200 0,02745600 0,01843000 (-32.9%)
2500 40 0,05375500 0,06820500 (+26.9%)
8000 12 0,13068300 0,20304900 (+55.4%)
These results to me seems to indicate that with gvec the results have a
slower translation but faster execution.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-7-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:34 +03:00
|
|
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DEF_HELPER_FLAGS_4(VAVGSB, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
|
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DEF_HELPER_FLAGS_4(VAVGSH, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_4(VAVGSW, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
2012-05-30 08:23:29 +04:00
|
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|
DEF_HELPER_4(vcmpeqfp, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vcmpgefp, void, env, avr, avr, avr)
|
|
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DEF_HELPER_4(vcmpgtfp, void, env, avr, avr, avr)
|
|
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DEF_HELPER_4(vcmpbfp, void, env, avr, avr, avr)
|
2022-03-02 08:51:37 +03:00
|
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DEF_HELPER_FLAGS_4(VCMPNEZB, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
|
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DEF_HELPER_FLAGS_4(VCMPNEZH, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_4(VCMPNEZW, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
2012-05-30 08:23:29 +04:00
|
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DEF_HELPER_4(vcmpeqfp_dot, void, env, avr, avr, avr)
|
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|
|
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DEF_HELPER_4(vcmpgefp_dot, void, env, avr, avr, avr)
|
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DEF_HELPER_4(vcmpgtfp_dot, void, env, avr, avr, avr)
|
|
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DEF_HELPER_4(vcmpbfp_dot, void, env, avr, avr, avr)
|
2022-05-17 15:39:19 +03:00
|
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DEF_HELPER_FLAGS_3(vmrglb, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vmrglh, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vmrglw, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(vmrghb, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vmrghh, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vmrghw, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
target/ppc: moved vector even and odd multiplication to decodetree
Moved the instructions vmulesb, vmulosb, vmuleub, vmuloub,
vmulesh, vmulosh, vmuleuh, vmulouh, vmulesw, vmulosw,
muleuw and vmulouw from legacy to decodetree. Implemented
the instructions vmulesd, vmulosd, vmuleud, vmuloud.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-02 08:51:36 +03:00
|
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DEF_HELPER_FLAGS_3(VMULESB, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULESH, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULESW, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULEUB, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULEUH, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VMULEUW, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULOSB, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULOSH, TCG_CALL_NO_RWG, void, avr, avr, avr)
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DEF_HELPER_FLAGS_3(VMULOSW, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VMULOUB, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VMULOUH, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VMULOUW, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-05-25 16:49:48 +03:00
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DEF_HELPER_FLAGS_3(VDIVSQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VDIVUQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-05-25 16:49:52 +03:00
|
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DEF_HELPER_FLAGS_3(VDIVESD, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VDIVEUD, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VDIVESQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(VDIVEUQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-05-25 16:49:54 +03:00
|
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|
DEF_HELPER_FLAGS_3(VMODSQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
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|
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DEF_HELPER_FLAGS_3(VMODUQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_3(vslo, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vsro, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vsrv, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
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DEF_HELPER_FLAGS_3(vslv, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
target/ppc: Move VPRTYB[WDQ] to decodetree and use gvec
Moved VPRTYBW and VPRTYBD to use gvec and both of them and VPRTYBQ to
decodetree. VPRTYBW and VPRTYBD now also use .fni4 and .fni8,
respectively.
vprtybw:
rept loop master patch
8 12500 0,01198900 0,00703100 (-41.4%)
25 4000 0,01070100 0,00571400 (-46.6%)
100 1000 0,01123300 0,00678200 (-39.6%)
500 200 0,01601500 0,01535600 (-4.1%)
2500 40 0,03872900 0,05562100 (43.6%)
8000 12 0,10047000 0,16643000 (65.7%)
vprtybd:
rept loop master patch
8 12500 0,00757700 0,00788100 (4.0%)
25 4000 0,00652500 0,00669600 (2.6%)
100 1000 0,00714400 0,00825400 (15.5%)
500 200 0,01211000 0,01903700 (57.2%)
2500 40 0,03483800 0,07021200 (101.5%)
8000 12 0,09591800 0,21036200 (119.3%)
vprtybq:
rept loop master patch
8 12500 0,00675600 0,00667200 (-1.2%)
25 4000 0,00619400 0,00643200 (3.8%)
100 1000 0,00707100 0,00751100 (6.2%)
500 200 0,01199300 0,01342000 (11.9%)
2500 40 0,03490900 0,04092900 (17.2%)
8000 12 0,09588200 0,11465100 (19.6%)
I wasn't expecting such a performance lost in both VPRTYBD and VPRTYBQ,
I'm not sure if it's worth to move those instructions. Comparing the
assembly of the helper with the TCGop they are pretty similar, so
I'm not sure why vprtybd took so much more time.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-6-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:33 +03:00
|
|
|
DEF_HELPER_FLAGS_3(VPRTYBQ, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
2019-02-15 13:00:57 +03:00
|
|
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DEF_HELPER_FLAGS_5(vaddsbs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
|
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DEF_HELPER_FLAGS_5(vaddshs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
|
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DEF_HELPER_FLAGS_5(vaddsws, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_5(vsubsbs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_5(vsubshs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_5(vsubsws, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_5(vaddubs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_5(vadduhs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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DEF_HELPER_FLAGS_5(vadduws, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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|
|
DEF_HELPER_FLAGS_5(vsububs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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|
|
DEF_HELPER_FLAGS_5(vsubuhs, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
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|
|
DEF_HELPER_FLAGS_5(vsubuws, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
2022-06-06 18:00:32 +03:00
|
|
|
DEF_HELPER_FLAGS_3(VADDUQM, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-06-06 18:00:33 +03:00
|
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|
DEF_HELPER_FLAGS_4(VADDECUQ, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
|
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DEF_HELPER_FLAGS_4(VADDEUQM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
2022-06-06 18:00:34 +03:00
|
|
|
DEF_HELPER_FLAGS_3(VADDCUQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-06-06 18:00:35 +03:00
|
|
|
DEF_HELPER_FLAGS_3(VSUBUQM, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-06-06 18:00:36 +03:00
|
|
|
DEF_HELPER_FLAGS_4(VSUBECUQ, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
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|
|
DEF_HELPER_FLAGS_4(VSUBEUQM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
2022-06-06 18:00:37 +03:00
|
|
|
DEF_HELPER_FLAGS_3(VSUBCUQ, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_4(vsldoi, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vextractub, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
|
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|
|
DEF_HELPER_FLAGS_3(vextractuh, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
|
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|
|
DEF_HELPER_FLAGS_3(vextractuw, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
|
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|
|
DEF_HELPER_FLAGS_3(vextractd, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
2021-11-04 15:36:59 +03:00
|
|
|
DEF_HELPER_4(VINSBLX, void, env, avr, i64, tl)
|
|
|
|
|
DEF_HELPER_4(VINSHLX, void, env, avr, i64, tl)
|
|
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|
|
DEF_HELPER_4(VINSWLX, void, env, avr, i64, tl)
|
|
|
|
|
DEF_HELPER_4(VINSDLX, void, env, avr, i64, tl)
|
2022-03-02 08:51:37 +03:00
|
|
|
DEF_HELPER_FLAGS_2(VSTRIBL, TCG_CALL_NO_RWG, i32, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(VSTRIBR, TCG_CALL_NO_RWG, i32, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(VSTRIHL, TCG_CALL_NO_RWG, i32, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(VSTRIHR, TCG_CALL_NO_RWG, i32, avr, avr)
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_2(vupkhpx, TCG_CALL_NO_RWG, void, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(vupklpx, TCG_CALL_NO_RWG, void, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(vupkhsb, TCG_CALL_NO_RWG, void, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(vupkhsh, TCG_CALL_NO_RWG, void, avr, avr)
|
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|
|
DEF_HELPER_FLAGS_2(vupkhsw, TCG_CALL_NO_RWG, void, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(vupklsb, TCG_CALL_NO_RWG, void, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(vupklsh, TCG_CALL_NO_RWG, void, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_2(vupklsw, TCG_CALL_NO_RWG, void, avr, avr)
|
2022-05-17 15:39:27 +03:00
|
|
|
DEF_HELPER_FLAGS_4(VMSUMUBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
|
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|
|
DEF_HELPER_FLAGS_4(VMSUMMBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
2022-03-02 08:51:37 +03:00
|
|
|
DEF_HELPER_FLAGS_4(VPERM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(VPERMR, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_4(vpkshss, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vpkshus, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vpkswss, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vpkswus, void, env, avr, avr, avr)
|
2014-02-13 01:23:06 +04:00
|
|
|
DEF_HELPER_4(vpksdss, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vpksdus, void, env, avr, avr, avr)
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_4(vpkuhus, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vpkuwus, void, env, avr, avr, avr)
|
2014-02-13 01:23:06 +04:00
|
|
|
DEF_HELPER_4(vpkudus, void, env, avr, avr, avr)
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_4(vpkuhum, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vpkuwum, void, env, avr, avr, avr)
|
2014-02-13 01:23:06 +04:00
|
|
|
DEF_HELPER_4(vpkudum, void, env, avr, avr, avr)
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_3(vpkpx, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
target/ppc: Move VMH[R]ADDSHS instruction to decodetree
This patch moves VMHADDSHS and VMHRADDSHS to decodetree I couldn't find
a satisfactory implementation with TCG inline.
vmhaddshs:
rept loop master patch
8 12500 0,02983400 0,02648500 (-11.2%)
25 4000 0,02946000 0,02518000 (-14.5%)
100 1000 0,03104300 0,02638000 (-15.0%)
500 200 0,04002000 0,03502500 (-12.5%)
2500 40 0,08090100 0,07562200 (-6.5%)
8000 12 0,19242600 0,18626800 (-3.2%)
vmhraddshs:
rept loop master patch
8 12500 0,03078600 0,02851000 (-7.4%)
25 4000 0,02793200 0,02746900 (-1.7%)
100 1000 0,02886000 0,02839900 (-1.6%)
500 200 0,03714700 0,03799200 (+2.3%)
2500 40 0,07948000 0,07852200 (-1.2%)
8000 12 0,19049800 0,18813900 (-1.2%)
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-3-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:30 +03:00
|
|
|
DEF_HELPER_5(VMHADDSHS, void, env, avr, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_5(VMHRADDSHS, void, env, avr, avr, avr, avr)
|
2022-05-17 15:39:28 +03:00
|
|
|
DEF_HELPER_FLAGS_4(VMSUMUHM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_5(VMSUMUHS, void, env, avr, avr, avr, avr)
|
2022-05-17 15:39:29 +03:00
|
|
|
DEF_HELPER_FLAGS_4(VMSUMSHM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_5(VMSUMSHS, void, env, avr, avr, avr, avr)
|
target/ppc: Moved VMLADDUHM to decodetree and use gvec
This patch moves VMLADDUHM to decodetree a creates a gvec implementation
using mul_vec and add_vec.
rept loop master patch
8 12500 0,01810500 0,00903100 (-50.1%)
25 4000 0,01739400 0,00747700 (-57.0%)
100 1000 0,01843600 0,00901400 (-51.1%)
500 200 0,02574600 0,01971000 (-23.4%)
2500 40 0,05921600 0,07121800 (+20.3%)
8000 12 0,15326700 0,21725200 (+41.7%)
The significant difference in performance when REPT is low and LOOP is
high I think is due to the fact that the new implementation has a higher
translation time, as when using a helper only 5 TCGop are used but with
the patch a total of 10 TCGop are needed (Power lacks a direct mul_vec
equivalent so this instruction is implemented with the help of 5 others,
vmuleu, vmulou, vmrgh, vmrgl and vpkum).
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-2-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:29 +03:00
|
|
|
DEF_HELPER_FLAGS_5(VMLADDUHM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr, i32)
|
2019-02-15 13:00:50 +03:00
|
|
|
DEF_HELPER_FLAGS_2(mtvscr, TCG_CALL_NO_RWG, void, env, i32)
|
2019-02-15 13:00:53 +03:00
|
|
|
DEF_HELPER_FLAGS_1(mfvscr, TCG_CALL_NO_RWG, i32, env)
|
2012-05-30 08:23:40 +04:00
|
|
|
DEF_HELPER_3(lvebx, void, env, avr, tl)
|
|
|
|
|
DEF_HELPER_3(lvehx, void, env, avr, tl)
|
|
|
|
|
DEF_HELPER_3(lvewx, void, env, avr, tl)
|
|
|
|
|
DEF_HELPER_3(stvebx, void, env, avr, tl)
|
|
|
|
|
DEF_HELPER_3(stvehx, void, env, avr, tl)
|
|
|
|
|
DEF_HELPER_3(stvewx, void, env, avr, tl)
|
2016-12-09 15:17:20 +03:00
|
|
|
#if defined(TARGET_PPC64)
|
2019-06-16 15:37:49 +03:00
|
|
|
DEF_HELPER_4(lxvl, void, env, tl, vsr, tl)
|
|
|
|
|
DEF_HELPER_4(lxvll, void, env, tl, vsr, tl)
|
|
|
|
|
DEF_HELPER_4(stxvl, void, env, tl, vsr, tl)
|
|
|
|
|
DEF_HELPER_4(stxvll, void, env, tl, vsr, tl)
|
2016-12-09 15:17:20 +03:00
|
|
|
#endif
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_4(vsumsws, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vsum4sbs, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vsum4shs, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vsum4ubs, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vaddfp, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vsubfp, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vmaxfp, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vminfp, void, env, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vrefp, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vrsqrtefp, void, env, avr, avr)
|
2022-03-02 08:51:37 +03:00
|
|
|
DEF_HELPER_FLAGS_4(VRLWMI, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(VRLDMI, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(VRLDNM, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(VRLWNM, TCG_CALL_NO_RWG, void, avr, avr, avr, i32)
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_5(vmaddfp, void, env, avr, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_5(vnmsubfp, void, env, avr, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vexptefp, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vlogefp, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vrfim, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vrfin, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vrfip, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_3(vrfiz, void, env, avr, avr)
|
|
|
|
|
DEF_HELPER_4(vcfux, void, env, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_4(vcfsx, void, env, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_4(vctuxs, void, env, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
|
2009-01-03 16:31:49 +03:00
|
|
|
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_2(vclzb, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vclzh, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vctzb, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vctzh, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vctzw, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vctzd, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vpopcntb, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vpopcnth, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vpopcntw, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vpopcntd, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_1(vclzlsbb, TCG_CALL_NO_RWG, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_1(vctzlsbb, TCG_CALL_NO_RWG, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vbpermd, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vbpermq, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vpmsumb, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vpmsumh, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vpmsumw, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-06-06 18:00:31 +03:00
|
|
|
DEF_HELPER_FLAGS_3(VPMSUMD, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_2(vextublx, TCG_CALL_NO_RWG, tl, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vextuhlx, TCG_CALL_NO_RWG, tl, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vextuwlx, TCG_CALL_NO_RWG, tl, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vextubrx, TCG_CALL_NO_RWG, tl, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vextuhrx, TCG_CALL_NO_RWG, tl, tl, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(vextuwrx, TCG_CALL_NO_RWG, tl, tl, avr)
|
2021-11-04 15:37:03 +03:00
|
|
|
DEF_HELPER_5(VEXTDUBVLX, void, env, avr, avr, avr, tl)
|
|
|
|
|
DEF_HELPER_5(VEXTDUHVLX, void, env, avr, avr, avr, tl)
|
|
|
|
|
DEF_HELPER_5(VEXTDUWVLX, void, env, avr, avr, avr, tl)
|
|
|
|
|
DEF_HELPER_5(VEXTDDVLX, void, env, avr, avr, avr, tl)
|
2014-02-13 01:23:03 +04:00
|
|
|
|
2022-05-17 15:39:19 +03:00
|
|
|
DEF_HELPER_FLAGS_2(vsbox, TCG_CALL_NO_RWG, void, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vcipher, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vcipherlast, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vncipher, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vncipherlast, TCG_CALL_NO_RWG, void, avr, avr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vshasigmaw, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(vshasigmad, TCG_CALL_NO_RWG, void, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(vpermxor, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
|
2014-02-13 01:23:17 +04:00
|
|
|
|
2022-05-17 15:39:20 +03:00
|
|
|
DEF_HELPER_FLAGS_4(bcdadd, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcdsub, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdcfn, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdctn, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdcfz, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdctz, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdcfsq, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdctsq, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcdcpsgn, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(bcdsetsgn, TCG_CALL_NO_RWG, i32, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcds, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcdus, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcdsr, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcdtrunc, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(bcdutrunc, TCG_CALL_NO_RWG, i32, avr, avr, avr, i32)
|
2014-02-13 01:23:16 +04:00
|
|
|
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xsadddp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:46 +03:00
|
|
|
DEF_HELPER_5(xsaddqp, void, env, i32, vsr, vsr, vsr)
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xssubdp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xsmuldp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:46 +03:00
|
|
|
DEF_HELPER_5(xsmulqp, void, env, i32, vsr, vsr, vsr)
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xsdivdp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:46 +03:00
|
|
|
DEF_HELPER_5(xsdivqp, void, env, i32, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xsredp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xssqrtdp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xsrsqrtedp, void, env, vsr, vsr)
|
2019-06-16 15:37:44 +03:00
|
|
|
DEF_HELPER_4(xstdivdp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:45 +03:00
|
|
|
DEF_HELPER_3(xstsqrtdp, void, env, i32, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_5(XSMADDDP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSMSUBDP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMADDDP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMSUBDP, void, env, vsr, vsr, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_4(XSCMPEQDP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSCMPGTDP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSCMPGEDP, void, env, vsr, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_4(XSCMPEQQP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSCMPGTQP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSCMPGEQP, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:44 +03:00
|
|
|
DEF_HELPER_4(xscmpexpdp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:48 +03:00
|
|
|
DEF_HELPER_4(xscmpexpqp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:44 +03:00
|
|
|
DEF_HELPER_4(xscmpodp, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xscmpudp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:48 +03:00
|
|
|
DEF_HELPER_4(xscmpoqp, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xscmpuqp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xsmaxdp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xsmindp, void, env, vsr, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_4(XSMAXCDP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSMINCDP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSMAXJDP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSMINJDP, void, env, vsr, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_4(XSMAXCQP, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(XSMINCQP, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xscvdphp, void, env, vsr, vsr)
|
2019-06-16 15:37:47 +03:00
|
|
|
DEF_HELPER_4(xscvdpqp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xscvdpsp, void, env, vsr, vsr)
|
2014-01-15 18:10:45 +04:00
|
|
|
DEF_HELPER_2(xscvdpspn, i64, env, i64)
|
2021-12-17 19:57:18 +03:00
|
|
|
DEF_HELPER_4(XSCVQPDP, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:47 +03:00
|
|
|
DEF_HELPER_4(xscvqpsdz, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xscvqpswz, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xscvqpudz, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xscvqpuwz, void, env, i32, vsr, vsr)
|
2022-03-30 20:59:32 +03:00
|
|
|
DEF_HELPER_3(XSCVQPUQZ, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(XSCVQPSQZ, void, env, vsr, vsr)
|
2022-03-30 20:59:31 +03:00
|
|
|
DEF_HELPER_3(XSCVUQQP, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(XSCVSQQP, void, env, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xscvhpdp, void, env, vsr, vsr)
|
2019-06-16 15:37:47 +03:00
|
|
|
DEF_HELPER_4(xscvsdqp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xscvspdp, void, env, vsr, vsr)
|
2022-05-17 15:39:23 +03:00
|
|
|
DEF_HELPER_FLAGS_1(XSCVSPDPN, TCG_CALL_NO_RWG_SE, i64, i64)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xscvdpsxds, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xscvdpsxws, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xscvdpuxds, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xscvdpuxws, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xscvsxddp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xscvuxdsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xscvsxdsp, void, env, vsr, vsr)
|
2019-06-16 15:37:47 +03:00
|
|
|
DEF_HELPER_4(xscvudqp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xscvuxddp, void, env, vsr, vsr)
|
target/ppc: Moved XSTSTDC[QDS]P to decodetree
Moved XSTSTDCSP, XSTSTDCDP and XSTSTDCQP to decodetree and moved some of
its decoding away from the helper as previously the DCMX, XB and BF were
calculated in the helper with the help of cpu_env, now that part was
moved to the decodetree with the rest.
xvtstdcsp:
rept loop master patch
8 12500 1,85393600 1,94683600 (+5.0%)
25 4000 1,78779800 1,92479000 (+7.7%)
100 1000 2,12775000 2,28895500 (+7.6%)
500 200 2,99655300 3,23102900 (+7.8%)
2500 40 6,89082200 7,44827500 (+8.1%)
8000 12 17,50585500 18,95152100 (+8.3%)
xvtstdcdp:
rept loop master patch
8 12500 1,39043100 1,33539800 (-4.0%)
25 4000 1,35731800 1,37347800 (+1.2%)
100 1000 1,51514800 1,56053000 (+3.0%)
500 200 2,21014400 2,47906000 (+12.2%)
2500 40 5,39488200 6,68766700 (+24.0%)
8000 12 13,98623900 18,17661900 (+30.0%)
xvtstdcdp:
rept loop master patch
8 12500 1,35123800 1,34455800 (-0.5%)
25 4000 1,36441200 1,36759600 (+0.2%)
100 1000 1,49763500 1,54138400 (+2.9%)
500 200 2,19020200 2,46196400 (+12.4%)
2500 40 5,39265700 6,68147900 (+23.9%)
8000 12 14,04163600 18,19669600 (+29.6%)
As some values are now decoded outside the helper and passed to it as an
argument the number of arguments of the helper increased, the number
of TCGop needed to load the arguments increased. I suspect that's why
the slow-down in the tests with a high REPT but low LOOP.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-12-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:39 +03:00
|
|
|
DEF_HELPER_4(XSTSTDCSP, void, env, i32, i32, vsr)
|
|
|
|
|
DEF_HELPER_4(XSTSTDCDP, void, env, i32, i32, vsr)
|
|
|
|
|
DEF_HELPER_4(XSTSTDCQP, void, env, i32, i32, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xsrdpi, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xsrdpic, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xsrdpim, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xsrdpip, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xsrdpiz, void, env, vsr, vsr)
|
2019-06-16 15:37:47 +03:00
|
|
|
DEF_HELPER_4(xsrqpi, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xsrqpxp, void, env, i32, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xssqrtqp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:46 +03:00
|
|
|
DEF_HELPER_5(xssubqp, void, env, i32, vsr, vsr, vsr)
|
2014-01-03 02:21:21 +04:00
|
|
|
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xsaddsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xssubsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xsmulsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xsdivsp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xsresp, void, env, vsr, vsr)
|
2014-01-15 18:10:44 +04:00
|
|
|
DEF_HELPER_2(xsrsp, i64, env, i64)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xssqrtsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xsrsqrtesp, void, env, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_5(XSMADDSP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSMSUBSP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMADDSP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMSUBSP, void, env, vsr, vsr, vsr, vsr)
|
2014-01-15 18:10:33 +04:00
|
|
|
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_5(XSMADDQP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSMADDQPO, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSMSUBQP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSMSUBQPO, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMADDQP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMADDQPO, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMSUBQP, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(XSNMSUBQPO, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xvadddp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvsubdp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvmuldp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvdivdp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xvredp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvsqrtdp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrsqrtedp, void, env, vsr, vsr)
|
2019-06-16 15:37:44 +03:00
|
|
|
DEF_HELPER_4(xvtdivdp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:45 +03:00
|
|
|
DEF_HELPER_3(xvtsqrtdp, void, env, i32, vsr)
|
2019-06-16 15:37:51 +03:00
|
|
|
DEF_HELPER_5(xvmadddp, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(xvmsubdp, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(xvnmadddp, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(xvnmsubdp, void, env, vsr, vsr, vsr, vsr)
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xvmaxdp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvmindp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:40 +03:00
|
|
|
DEF_HELPER_FLAGS_4(xvcmpeqdp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(xvcmpgedp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(xvcmpgtdp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(xvcmpnedp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xvcvdpsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvdpsxds, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvdpsxws, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvdpuxds, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvdpuxws, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvsxddp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvuxddp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvsxwdp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvuxwdp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrdpi, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrdpic, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrdpim, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrdpip, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrdpiz, void, env, vsr, vsr)
|
2014-01-03 02:21:21 +04:00
|
|
|
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xvaddsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvsubsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvmulsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvdivsp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xvresp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvsqrtsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrsqrtesp, void, env, vsr, vsr)
|
2019-06-16 15:37:44 +03:00
|
|
|
DEF_HELPER_4(xvtdivsp, void, env, i32, vsr, vsr)
|
2019-06-16 15:37:45 +03:00
|
|
|
DEF_HELPER_3(xvtsqrtsp, void, env, i32, vsr)
|
2019-06-16 15:37:51 +03:00
|
|
|
DEF_HELPER_5(xvmaddsp, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(xvmsubsp, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(xvnmaddsp, void, env, vsr, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_5(xvnmsubsp, void, env, vsr, vsr, vsr, vsr)
|
2019-06-16 15:37:41 +03:00
|
|
|
DEF_HELPER_4(xvmaxsp, void, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_4(xvminsp, void, env, vsr, vsr, vsr)
|
2019-06-16 15:37:40 +03:00
|
|
|
DEF_HELPER_FLAGS_4(xvcmpeqsp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(xvcmpgesp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(xvcmpgtsp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
|
|
|
|
DEF_HELPER_FLAGS_4(xvcmpnesp, TCG_CALL_NO_RWG, i32, env, vsr, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xvcvspdp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvsphp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvhpsp, void, env, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_3(XVCVSPBF16, void, env, vsr, vsr)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xvcvspsxds, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvspsxws, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvspuxds, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvspuxws, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvsxdsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvuxdsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvsxwsp, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvcvuxwsp, void, env, vsr, vsr)
|
target/ppc: Moved XVTSTDC[DS]P to decodetree
Moved XVTSTDCSP and XVTSTDCDP to decodetree an restructured the helper
to be simpler and do all decoding in the decodetree (so XB, XT and DCMX
are all calculated outside the helper).
Obs: The tests in this one are slightly different, these are the sum of
these instructions with all possible immediate and those instructions
are repeated 10 times.
xvtstdcsp:
rept loop master patch
8 12500 2,76402100 2,70699100 (-2.1%)
25 4000 2,64867100 2,67884100 (+1.1%)
100 1000 2,73806300 2,78701000 (+1.8%)
500 200 3,44666500 3,61027600 (+4.7%)
2500 40 5,85790200 6,47475500 (+10.5%)
8000 12 15,22102100 17,46062900 (+14.7%)
xvtstdcdp:
rept loop master patch
8 12500 2,11818000 1,61065300 (-24.0%)
25 4000 2,04573400 1,60132200 (-21.7%)
100 1000 2,13834100 1,69988100 (-20.5%)
500 200 2,73977000 2,48631700 (-9.3%)
2500 40 5,05067000 5,25914100 (+4.1%)
8000 12 14,60507800 15,93704900 (+9.1%)
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221019125040.48028-11-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-19 15:50:38 +03:00
|
|
|
DEF_HELPER_FLAGS_4(XVTSTDCSP, TCG_CALL_NO_RWG, void, vsr, vsr, i64, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_4(XVTSTDCDP, TCG_CALL_NO_RWG, void, vsr, vsr, i64, i32)
|
2019-06-16 15:37:43 +03:00
|
|
|
DEF_HELPER_3(xvrspi, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrspic, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrspim, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrspip, void, env, vsr, vsr)
|
|
|
|
|
DEF_HELPER_3(xvrspiz, void, env, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVBM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVBM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVBM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVBM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVHM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVHM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVHM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVHM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVWM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVWM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVWM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVWM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVDM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVDM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVDM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
|
|
|
|
|
DEF_HELPER_FLAGS_2(XXGENPCVDM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
|
2022-05-17 15:39:25 +03:00
|
|
|
DEF_HELPER_FLAGS_3(XXEXTRACTUW, TCG_CALL_NO_RWG, void, vsr, vsr, i32)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_FLAGS_5(XXPERMX, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, tl)
|
2022-05-17 15:39:25 +03:00
|
|
|
DEF_HELPER_FLAGS_3(XXINSERTW, TCG_CALL_NO_RWG, void, vsr, vsr, i32)
|
2022-05-17 15:39:24 +03:00
|
|
|
DEF_HELPER_FLAGS_2(XVXSIGSP, TCG_CALL_NO_RWG, void, vsr, vsr)
|
2022-03-02 08:51:38 +03:00
|
|
|
DEF_HELPER_FLAGS_5(XXEVAL, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, i32)
|
2022-05-17 15:39:21 +03:00
|
|
|
DEF_HELPER_FLAGS_5(XXBLENDVB, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_5(XXBLENDVH, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_5(XXBLENDVW, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_5(XXBLENDVD, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, i32)
|
2022-05-24 17:05:31 +03:00
|
|
|
DEF_HELPER_5(XVI4GER8, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI4GER8PP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI8GER4, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI8GER4PP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI8GER4SPP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI16GER2, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI16GER2S, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI16GER2PP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVI16GER2SPP, void, env, vsr, vsr, acc, i32)
|
2022-05-24 17:05:34 +03:00
|
|
|
DEF_HELPER_5(XVF16GER2, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF16GER2PP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF16GER2PN, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF16GER2NP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF16GER2NN, void, env, vsr, vsr, acc, i32)
|
2022-05-24 17:05:36 +03:00
|
|
|
DEF_HELPER_5(XVBF16GER2, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVBF16GER2PP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVBF16GER2PN, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVBF16GER2NP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVBF16GER2NN, void, env, vsr, vsr, acc, i32)
|
2022-05-24 17:05:33 +03:00
|
|
|
DEF_HELPER_5(XVF32GER, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF32GERPP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF32GERPN, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF32GERNP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF32GERNN, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF64GER, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF64GERPP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF64GERPN, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF64GERNP, void, env, vsr, vsr, acc, i32)
|
|
|
|
|
DEF_HELPER_5(XVF64GERNN, void, env, vsr, vsr, acc, i32)
|
2014-01-03 02:21:21 +04:00
|
|
|
|
2012-05-30 08:23:27 +04:00
|
|
|
DEF_HELPER_2(efscfsi, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efscfui, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efscfuf, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efscfsf, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efsctsi, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efsctui, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efsctsiz, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efsctuiz, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efsctsf, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(efsctuf, i32, env, i32)
|
|
|
|
|
DEF_HELPER_2(evfscfsi, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfscfui, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfscfuf, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfscfsf, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfsctsi, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfsctui, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfsctsiz, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfsctuiz, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfsctsf, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(evfsctuf, i64, env, i64)
|
|
|
|
|
DEF_HELPER_3(efsadd, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efssub, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efsmul, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efsdiv, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(evfsadd, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfssub, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfsmul, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfsdiv, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efststlt, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efststgt, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efststeq, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efscmplt, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efscmpgt, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(efscmpeq, i32, env, i32, i32)
|
|
|
|
|
DEF_HELPER_3(evfststlt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfststgt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfststeq, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfscmplt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfscmpgt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(evfscmpeq, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_2(efdcfsi, i64, env, i32)
|
|
|
|
|
DEF_HELPER_2(efdcfsid, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdcfui, i64, env, i32)
|
|
|
|
|
DEF_HELPER_2(efdcfuid, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctsi, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctui, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctsiz, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctsidz, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctuiz, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctuidz, i64, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdcfsf, i64, env, i32)
|
|
|
|
|
DEF_HELPER_2(efdcfuf, i64, env, i32)
|
|
|
|
|
DEF_HELPER_2(efdctsf, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdctuf, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efscfd, i32, env, i64)
|
|
|
|
|
DEF_HELPER_2(efdcfs, i64, env, i32)
|
|
|
|
|
DEF_HELPER_3(efdadd, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdsub, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdmul, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efddiv, i64, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdtstlt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdtstgt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdtsteq, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdcmplt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdcmpgt, i32, env, i64, i64)
|
|
|
|
|
DEF_HELPER_3(efdcmpeq, i32, env, i64, i64)
|
2008-11-23 13:54:04 +03:00
|
|
|
|
2008-11-30 19:22:56 +03:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
2012-05-30 08:23:31 +04:00
|
|
|
DEF_HELPER_2(4xx_tlbre_hi, tl, env, tl)
|
|
|
|
|
DEF_HELPER_2(4xx_tlbre_lo, tl, env, tl)
|
|
|
|
|
DEF_HELPER_3(4xx_tlbwe_hi, void, env, tl, tl)
|
|
|
|
|
DEF_HELPER_3(4xx_tlbwe_lo, void, env, tl, tl)
|
|
|
|
|
DEF_HELPER_2(4xx_tlbsx, tl, env, tl)
|
|
|
|
|
DEF_HELPER_3(440_tlbre, tl, env, i32, tl)
|
|
|
|
|
DEF_HELPER_4(440_tlbwe, void, env, i32, tl, tl)
|
|
|
|
|
DEF_HELPER_2(440_tlbsx, tl, env, tl)
|
|
|
|
|
DEF_HELPER_1(booke206_tlbre, void, env)
|
|
|
|
|
DEF_HELPER_1(booke206_tlbwe, void, env)
|
|
|
|
|
DEF_HELPER_2(booke206_tlbsx, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(booke206_tlbivax, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(booke206_tlbilx0, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(booke206_tlbilx1, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(booke206_tlbilx3, void, env, tl)
|
2014-05-28 21:25:36 +04:00
|
|
|
DEF_HELPER_2(booke206_tlbflush, void, env, tl)
|
2012-05-30 08:23:31 +04:00
|
|
|
DEF_HELPER_3(booke_setpid, void, env, i32, tl)
|
2018-09-21 09:59:07 +03:00
|
|
|
DEF_HELPER_2(booke_set_eplc, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(booke_set_epsc, void, env, tl)
|
2012-05-30 08:23:31 +04:00
|
|
|
DEF_HELPER_2(6xx_tlbd, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(6xx_tlbi, void, env, tl)
|
2012-10-09 23:53:09 +04:00
|
|
|
DEF_HELPER_FLAGS_1(tlbia, TCG_CALL_NO_RWG, void, env)
|
|
|
|
|
DEF_HELPER_FLAGS_2(tlbie, TCG_CALL_NO_RWG, void, env, tl)
|
2016-01-28 02:31:04 +03:00
|
|
|
DEF_HELPER_FLAGS_2(tlbiva, TCG_CALL_NO_RWG, void, env, tl)
|
2008-12-07 00:46:17 +03:00
|
|
|
#if defined(TARGET_PPC64)
|
2022-07-12 22:37:41 +03:00
|
|
|
DEF_HELPER_FLAGS_4(tlbie_isa300, TCG_CALL_NO_WG, void, \
|
|
|
|
|
env, tl, tl, i32)
|
2022-07-01 16:35:02 +03:00
|
|
|
DEF_HELPER_FLAGS_3(SLBMTE, TCG_CALL_NO_RWG, void, env, tl, tl)
|
2022-07-01 16:35:04 +03:00
|
|
|
DEF_HELPER_2(SLBMFEE, tl, env, tl)
|
2022-07-01 16:35:03 +03:00
|
|
|
DEF_HELPER_2(SLBMFEV, tl, env, tl)
|
2022-07-01 16:35:05 +03:00
|
|
|
DEF_HELPER_2(SLBFEE, tl, env, tl)
|
2022-07-01 16:35:01 +03:00
|
|
|
DEF_HELPER_FLAGS_2(SLBIA, TCG_CALL_NO_RWG, void, env, i32)
|
2022-07-01 16:35:07 +03:00
|
|
|
DEF_HELPER_FLAGS_3(SLBIAG, TCG_CALL_NO_RWG, void, env, tl, i32)
|
2022-07-01 16:34:59 +03:00
|
|
|
DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl)
|
2022-07-01 16:35:00 +03:00
|
|
|
DEF_HELPER_FLAGS_2(SLBIEG, TCG_CALL_NO_RWG, void, env, tl)
|
2008-12-07 00:46:17 +03:00
|
|
|
#endif
|
2013-09-15 02:38:30 +04:00
|
|
|
DEF_HELPER_FLAGS_2(load_sr, TCG_CALL_NO_RWG, tl, env, tl)
|
2012-10-09 23:53:09 +04:00
|
|
|
DEF_HELPER_FLAGS_3(store_sr, TCG_CALL_NO_RWG, void, env, tl, tl)
|
2008-11-30 19:23:35 +03:00
|
|
|
|
2012-01-31 06:19:23 +04:00
|
|
|
DEF_HELPER_1(msgsnd, void, tl)
|
2012-05-30 08:23:23 +04:00
|
|
|
DEF_HELPER_2(msgclr, void, env, tl)
|
2018-01-18 17:54:03 +03:00
|
|
|
DEF_HELPER_1(book3s_msgsnd, void, tl)
|
|
|
|
|
DEF_HELPER_2(book3s_msgclr, void, env, tl)
|
2008-11-30 19:22:56 +03:00
|
|
|
#endif
|
|
|
|
|
|
2012-05-30 08:23:29 +04:00
|
|
|
DEF_HELPER_4(dlmzb, tl, env, tl, tl, i32)
|
2008-12-06 15:19:14 +03:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
2012-05-30 08:23:31 +04:00
|
|
|
DEF_HELPER_2(rac, tl, env, tl)
|
2008-11-30 20:26:29 +03:00
|
|
|
|
2013-09-15 02:38:30 +04:00
|
|
|
DEF_HELPER_2(load_dcr, tl, env, tl)
|
2012-05-30 08:23:36 +04:00
|
|
|
DEF_HELPER_3(store_dcr, void, env, tl, tl)
|
2022-06-27 17:11:02 +03:00
|
|
|
#endif
|
2008-12-07 16:40:29 +03:00
|
|
|
|
2012-05-30 08:23:38 +04:00
|
|
|
DEF_HELPER_2(load_dump_spr, void, env, i32)
|
|
|
|
|
DEF_HELPER_2(store_dump_spr, void, env, i32)
|
2014-06-04 16:50:56 +04:00
|
|
|
DEF_HELPER_4(fscr_facility_check, void, env, i32, i32, i32)
|
2014-06-04 16:50:59 +04:00
|
|
|
DEF_HELPER_4(msr_facility_check, void, env, i32, i32, i32)
|
2016-07-31 08:13:10 +03:00
|
|
|
DEF_HELPER_FLAGS_1(load_tbl, TCG_CALL_NO_RWG, tl, env)
|
|
|
|
|
DEF_HELPER_FLAGS_1(load_tbu, TCG_CALL_NO_RWG, tl, env)
|
|
|
|
|
DEF_HELPER_FLAGS_1(load_atbl, TCG_CALL_NO_RWG, tl, env)
|
|
|
|
|
DEF_HELPER_FLAGS_1(load_atbu, TCG_CALL_NO_RWG, tl, env)
|
2019-11-28 16:46:54 +03:00
|
|
|
DEF_HELPER_FLAGS_1(load_vtb, TCG_CALL_NO_RWG, tl, env)
|
2008-12-07 16:40:29 +03:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
|
|
|
#if defined(TARGET_PPC64)
|
2016-07-31 08:13:10 +03:00
|
|
|
DEF_HELPER_FLAGS_1(load_purr, TCG_CALL_NO_RWG, tl, env)
|
2019-11-28 16:46:55 +03:00
|
|
|
DEF_HELPER_FLAGS_2(store_purr, TCG_CALL_NO_RWG, void, env, tl)
|
2018-04-24 14:30:42 +03:00
|
|
|
DEF_HELPER_2(store_ptcr, void, env, tl)
|
2020-01-20 13:49:34 +03:00
|
|
|
DEF_HELPER_FLAGS_1(load_dpdes, TCG_CALL_NO_RWG, tl, env)
|
|
|
|
|
DEF_HELPER_FLAGS_2(store_dpdes, TCG_CALL_NO_RWG, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(book3s_msgsndp, void, env, tl)
|
|
|
|
|
DEF_HELPER_2(book3s_msgclrp, void, env, tl)
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2008-12-07 16:40:29 +03:00
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#endif
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2012-05-30 08:23:38 +04:00
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DEF_HELPER_2(store_sdr1, void, env, tl)
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2017-04-13 09:02:36 +03:00
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DEF_HELPER_2(store_pidr, void, env, tl)
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2019-02-15 20:00:26 +03:00
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DEF_HELPER_2(store_lpidr, void, env, tl)
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2016-07-31 08:13:10 +03:00
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DEF_HELPER_FLAGS_2(store_tbl, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(store_tbu, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(store_atbl, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(store_atbu, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_1(load_decr, TCG_CALL_NO_RWG, tl, env)
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DEF_HELPER_FLAGS_2(store_decr, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_1(load_hdecr, TCG_CALL_NO_RWG, tl, env)
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DEF_HELPER_FLAGS_2(store_hdecr, TCG_CALL_NO_RWG, void, env, tl)
|
2019-11-28 16:46:54 +03:00
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DEF_HELPER_FLAGS_2(store_vtb, TCG_CALL_NO_RWG, void, env, tl)
|
2019-11-28 16:46:57 +03:00
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DEF_HELPER_FLAGS_2(store_tbu40, TCG_CALL_NO_RWG, void, env, tl)
|
2016-07-31 08:13:10 +03:00
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DEF_HELPER_FLAGS_1(load_40x_pit, TCG_CALL_NO_RWG, tl, env)
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DEF_HELPER_FLAGS_2(store_40x_pit, TCG_CALL_NO_RWG, void, env, tl)
|
2022-01-04 09:55:34 +03:00
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DEF_HELPER_FLAGS_2(store_40x_tcr, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(store_40x_tsr, TCG_CALL_NO_RWG, void, env, tl)
|
2022-01-28 15:15:03 +03:00
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|
|
DEF_HELPER_2(store_40x_pid, void, env, tl)
|
2012-05-30 08:23:38 +04:00
|
|
|
DEF_HELPER_2(store_40x_dbcr0, void, env, tl)
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DEF_HELPER_2(store_40x_sler, void, env, tl)
|
2016-07-31 08:13:10 +03:00
|
|
|
DEF_HELPER_FLAGS_2(store_booke_tcr, TCG_CALL_NO_RWG, void, env, tl)
|
|
|
|
|
DEF_HELPER_FLAGS_2(store_booke_tsr, TCG_CALL_NO_RWG, void, env, tl)
|
2012-05-30 08:23:31 +04:00
|
|
|
DEF_HELPER_3(store_ibatl, void, env, i32, tl)
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|
DEF_HELPER_3(store_ibatu, void, env, i32, tl)
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|
|
|
|
DEF_HELPER_3(store_dbatl, void, env, i32, tl)
|
|
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|
|
DEF_HELPER_3(store_dbatu, void, env, i32, tl)
|
2008-12-07 16:40:29 +03:00
|
|
|
#endif
|
2014-04-22 00:54:56 +04:00
|
|
|
|
|
|
|
|
#define dh_alias_fprp ptr
|
2019-09-26 21:57:57 +03:00
|
|
|
#define dh_ctype_fprp ppc_fprp_t *
|
2022-02-17 04:06:22 +03:00
|
|
|
#define dh_typecode_fprp dh_typecode_ptr
|
2014-04-22 00:55:01 +04:00
|
|
|
|
2021-10-29 22:24:12 +03:00
|
|
|
DEF_HELPER_4(DADD, void, env, fprp, fprp, fprp)
|
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DEF_HELPER_4(DADDQ, void, env, fprp, fprp, fprp)
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|
DEF_HELPER_4(DSUB, void, env, fprp, fprp, fprp)
|
|
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|
DEF_HELPER_4(DSUBQ, void, env, fprp, fprp, fprp)
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|
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|
DEF_HELPER_4(DMUL, void, env, fprp, fprp, fprp)
|
|
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|
DEF_HELPER_4(DMULQ, void, env, fprp, fprp, fprp)
|
|
|
|
|
DEF_HELPER_4(DDIV, void, env, fprp, fprp, fprp)
|
|
|
|
|
DEF_HELPER_4(DDIVQ, void, env, fprp, fprp, fprp)
|
2021-10-29 22:24:13 +03:00
|
|
|
DEF_HELPER_3(DCMPO, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCMPOQ, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCMPU, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCMPUQ, i32, env, fprp, fprp)
|
2021-10-29 22:24:11 +03:00
|
|
|
DEF_HELPER_3(DTSTDC, i32, env, fprp, i32)
|
|
|
|
|
DEF_HELPER_3(DTSTDCQ, i32, env, fprp, i32)
|
|
|
|
|
DEF_HELPER_3(DTSTDG, i32, env, fprp, i32)
|
|
|
|
|
DEF_HELPER_3(DTSTDGQ, i32, env, fprp, i32)
|
2021-10-29 22:24:13 +03:00
|
|
|
DEF_HELPER_3(DTSTEX, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DTSTEXQ, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DTSTSF, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DTSTSFQ, i32, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DTSTSFI, i32, env, i32, fprp)
|
|
|
|
|
DEF_HELPER_3(DTSTSFIQ, i32, env, i32, fprp)
|
2021-10-29 22:24:14 +03:00
|
|
|
DEF_HELPER_5(DQUAI, void, env, fprp, fprp, i32, i32)
|
|
|
|
|
DEF_HELPER_5(DQUAIQ, void, env, fprp, fprp, i32, i32)
|
2021-10-29 22:24:15 +03:00
|
|
|
DEF_HELPER_5(DQUA, void, env, fprp, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_5(DQUAQ, void, env, fprp, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_5(DRRND, void, env, fprp, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_5(DRRNDQ, void, env, fprp, fprp, fprp, i32)
|
2021-10-29 22:24:14 +03:00
|
|
|
DEF_HELPER_5(DRINTX, void, env, fprp, fprp, i32, i32)
|
|
|
|
|
DEF_HELPER_5(DRINTXQ, void, env, fprp, fprp, i32, i32)
|
|
|
|
|
DEF_HELPER_5(DRINTN, void, env, fprp, fprp, i32, i32)
|
|
|
|
|
DEF_HELPER_5(DRINTNQ, void, env, fprp, fprp, i32, i32)
|
2021-10-29 22:24:16 +03:00
|
|
|
DEF_HELPER_3(DCTDP, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCTQPQ, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DRSP, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DRDPQ, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCFFIX, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCFFIXQ, void, env, fprp, fprp)
|
2021-10-29 22:24:06 +03:00
|
|
|
DEF_HELPER_3(DCFFIXQQ, void, env, fprp, avr)
|
2021-10-29 22:24:16 +03:00
|
|
|
DEF_HELPER_3(DCTFIX, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DCTFIXQ, void, env, fprp, fprp)
|
2021-10-29 22:24:09 +03:00
|
|
|
DEF_HELPER_3(DCTFIXQQ, void, env, avr, fprp)
|
2021-10-29 22:24:17 +03:00
|
|
|
DEF_HELPER_4(DDEDPD, void, env, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_4(DDEDPDQ, void, env, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_4(DENBCD, void, env, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_4(DENBCDQ, void, env, fprp, fprp, i32)
|
2021-10-29 22:24:16 +03:00
|
|
|
DEF_HELPER_3(DXEX, void, env, fprp, fprp)
|
|
|
|
|
DEF_HELPER_3(DXEXQ, void, env, fprp, fprp)
|
2021-10-29 22:24:12 +03:00
|
|
|
DEF_HELPER_4(DIEX, void, env, fprp, fprp, fprp)
|
|
|
|
|
DEF_HELPER_4(DIEXQ, void, env, fprp, fprp, fprp)
|
2021-10-29 22:24:17 +03:00
|
|
|
DEF_HELPER_4(DSCRI, void, env, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_4(DSCRIQ, void, env, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_4(DSCLI, void, env, fprp, fprp, i32)
|
|
|
|
|
DEF_HELPER_4(DSCLIQ, void, env, fprp, fprp, i32)
|
2014-12-18 19:34:34 +03:00
|
|
|
|
|
|
|
|
DEF_HELPER_1(tbegin, void, env)
|
2016-07-31 08:13:12 +03:00
|
|
|
DEF_HELPER_FLAGS_1(fixup_thrm, TCG_CALL_NO_RWG, void, env)
|
2018-06-26 19:19:10 +03:00
|
|
|
|
2018-08-16 03:35:14 +03:00
|
|
|
#ifdef TARGET_PPC64
|
2018-06-26 19:19:10 +03:00
|
|
|
DEF_HELPER_FLAGS_3(lq_le_parallel, TCG_CALL_NO_WG, i64, env, tl, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_3(lq_be_parallel, TCG_CALL_NO_WG, i64, env, tl, i32)
|
2018-06-26 19:19:11 +03:00
|
|
|
DEF_HELPER_FLAGS_5(stq_le_parallel, TCG_CALL_NO_WG,
|
|
|
|
|
void, env, tl, i64, i64, i32)
|
|
|
|
|
DEF_HELPER_FLAGS_5(stq_be_parallel, TCG_CALL_NO_WG,
|
|
|
|
|
void, env, tl, i64, i64, i32)
|
2018-06-26 19:19:12 +03:00
|
|
|
DEF_HELPER_5(stqcx_le_parallel, i32, env, tl, i64, i64, i32)
|
|
|
|
|
DEF_HELPER_5(stqcx_be_parallel, i32, env, tl, i64, i64, i32)
|
2018-06-26 19:19:10 +03:00
|
|
|
#endif
|