Shwartsman
88fb948088
updates to paging code for debugability and code duplication reduction
2024-02-01 15:15:26 +02:00
Stanislav Shwartsman
ae61538847
create classes for Vmexec controls for robustness
2024-01-27 18:04:00 +02:00
Stanislav Shwartsman
035fb1edaa
create class for Pin-Based VMEXEC controls for robustness
...
create class for Vmentry controls for robustness
create class for Vmexit controls for robustness
2024-01-27 15:14:29 +02:00
Stanislav Shwartsman
38b1bbf4ff
Implemented VMX 'Shadow Stack Prematurely Busy' and secondary VMEXIT controls
2024-01-27 13:34:51 +02:00
Stanislav Shwartsman
b2cf7860dc
VMX: Implemented MSR IA32_SPEC_CTRL Virtualization VMX extension
...
fixed few typos in error messages
2024-01-13 21:58:23 +02:00
Stanislav Shwartsman
54831068df
implement RDMSRLIST/WRMSRLIST instructions (+related VMX extensions) ( #176 )
2023-12-16 21:59:34 +02:00
Stanislav Shwartsman
2e89b9bcba
implemented WAITPKG instruction set ( #150 )
...
still missing : UMWAIT/TPAUSE should set CF flag if it was using OS
deadline and woken up after deadline (i.e. not from monitored store)
also not clear in the spec: should UWAITX/TPAUSE always wait until
deadline due to 'while(tsc<deadline)' statement ?
+include small fixes for AMD's MONITORX/MWAITX
2023-12-01 18:00:03 +02:00
Shwartsman
8dd9649389
fixed compilation for VMX=1 X86_64=1
...
updated (c) for many files
2023-11-28 10:36:56 +02:00
Shwartsman
cc4f594ede
implemented process-posted-interrupts VMX extension
2023-11-27 20:15:00 +02:00
Stanislav Shwartsman
4ee9d37a5f
prevent access to non-existing VMCS fields
2023-11-26 20:29:56 +02:00
Stanislav Shwartsman
280303d76c
initial code for UINTR implementation ( #138 )
...
First step into implementing UINTR - User Level Interrupts ISA extension
To be continued
---------
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-11-25 16:43:47 +02:00
Shwartsman
62c2c877d0
rename VMEXIT controls in Bochs code to match their actual names and meaning
2023-11-23 19:58:08 +02:00
Shwartsman
6b5928f522
rename constants VMX_VM_EXEC_CTRL1 -> VMX_PIN_BASED_VMEXEC_CTRL for more correct naming
2023-11-23 19:51:17 +02:00
Shwartsman
4d08659621
Implement 'Tertiary VMEXEC Controls' for VMX
...
Currently none of the controls were not enabled, all clear but infra is here
2023-11-23 19:38:59 +02:00
Stanislav Shwartsman
9bda4eba28
introduce GET64_FROM_HI32_LO32 to form 64-bit integer from 2 32-bit
2023-11-17 23:31:38 +02:00
Stanislav Shwartsman
a9d07b5a51
coding style, move variables definition closer to its use, use constants instead of defines
2023-11-14 20:14:38 +02:00
Stanislav Shwartsman
52d57a422c
add VMEXIT reasons to enum, they not supported by Bochs but better to be listed for completion
2023-10-13 21:04:43 +03:00
Stanislav Shwartsman
1e4f1624c8
remove trailing whitespace from source files
2022-08-23 21:46:04 +03:00
Stanislav Shwartsman
b946570838
implemented VMX Monitor Trap Flag handling
2022-08-16 21:17:05 +03:00
Stanislav Shwartsman
97a2cdd85f
update VMEXIT reasons according to published docs
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update list of trap-like VMEXITs
2022-08-13 23:25:10 +03:00
Stanislav Shwartsman
f44f4ae753
MBE (Mode Based Execution Control) emulation ( #22 )
...
* MBE (Mode Based Execution Control) emulation
2022-07-30 15:26:47 +03:00
Stanislav Shwartsman
94503e7a0b
cpu/vmx definitions ( #20 )
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* update vmx.h with recently published definition
* update actions after conflicts
2022-07-27 20:51:25 +03:00
Stanislav Shwartsman
1bf18b8aae
! CPUID: Added TigerLake CPU definition (features CET and CLWB support)
...
- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
This enable better compiler optimizations and reduce binary size
2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
d540e5b040
rename VMCS control enum
2020-05-29 12:55:56 +00:00
Stanislav Shwartsman
4023b640d6
Protection Keys: Implemented Supervisor-Mode Protection Keys (PKS)
2020-05-29 12:35:30 +00:00
Stanislav Shwartsman
8e4a29fb0e
reorg vmcs fields enabling based on their numeric order
2020-05-15 19:27:45 +00:00
Stanislav Shwartsman
ea6b0c766c
added more VMX reasons to enum according to Intel SDM
2020-01-03 17:35:02 +00:00
Stanislav Shwartsman
edcdce927c
added ability to configure hidden VMCS field mapping through CPUID
2019-12-22 18:53:07 +00:00
Stanislav Shwartsman
f90e5f4f44
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
...
Only missing items (to be added soon):
- Supervisor Shadow Stack EPT Control is not implemented yet
- SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
12d228abde
split vmx initialization to multiple methods for better code readability, improve VMX error messages
2019-12-08 20:46:51 +00:00
Stanislav Shwartsman
85780d939a
extract MONITOR/MWAIT stuff to separate trsnlation unit
2019-05-25 18:32:17 +00:00
Stanislav Shwartsman
55d2dc6b0c
add some CPUID and VMCS definitions from latest SDM
2019-05-22 18:22:22 +00:00
Stanislav Shwartsman
eff201773f
convert some defines to enums and const expressions
2018-11-17 12:45:44 +00:00
Stanislav Shwartsman
afc2ee6bfd
Implemented SPP: EPT-Based Subpage Protection. Cleaned code duplication between FXSAVE/FXRSTORE and XSAVE/XRSTOR (save/restore of SSE code is the same)
2018-01-27 21:20:33 +00:00
Stanislav Shwartsman
69f27439db
added new cpuid flags mentioned in new Intel SDM future extensions rev030 doc
2017-10-13 20:27:52 +00:00
Stanislav Shwartsman
b2fdbd1274
added Skylake-X model to CPUDB -> with EVEX and AVX512 support
2017-08-09 20:36:17 +00:00
Stanislav Shwartsman
555bb8f8b6
updates to prev commit
2017-06-01 08:41:41 +00:00
Stanislav Shwartsman
6ab4fd597b
implement another form of AR field packing used in SKL, in addition on present NHM format
2017-06-01 08:31:20 +00:00
Stanislav Shwartsman
15d9b068a3
fix msvc warnings
2017-03-17 17:35:15 +00:00
Stanislav Shwartsman
3a033fa6db
implemented xsaves/xrstors extensions (supported by Intel Skylake core and AMD Ryzen)
2017-03-15 21:44:15 +00:00
Stanislav Shwartsman
1543034fb7
in the latest intel docs PCOMMIT CPUID bit doesn't exists anymore
2016-10-02 11:56:18 +00:00
Stanislav Shwartsman
adc143684b
implemented Intel architecture extensions published in recently published SDM 058:
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! Implemented UMIP: User Mode Instruction Prevention (don't allow execution of SLDT/SIDT/SGDT/STR/SMSW with CPL>0)
! Implemented RDPID instruction
Bugfixes in RDPKRU/WRPKRU instructions implementation (Protection Keys feature)
2016-04-15 11:35:32 +00:00
Stanislav Shwartsman
8d13b61319
implemented TSC Scaling VMX feature according to timestamp-counter for virtualization whitepaper published by Intel
2015-09-30 18:44:01 +00:00
Stanislav Shwartsman
e9f9f824be
return value from clear/set_mapping functions
2015-07-06 20:16:34 +00:00
Stanislav Shwartsman
28c19ecec7
more interfaces to VMCS Mapping class
2015-07-06 20:14:56 +00:00
Stanislav Shwartsman
5fe1423ab6
introducr new class for VMCS mapping so it can be customized per cpuid
2015-07-06 18:46:57 +00:00
Stanislav Shwartsman
3fef7f32f6
added new bits definitions recently published
2015-06-29 19:53:56 +00:00
Stanislav Shwartsman
0d79c5f986
Implemented Page Modification Logging VMX feature
2015-05-06 19:55:44 +00:00
Stanislav Shwartsman
2185d21eb7
fixed comments for PML acronym
2015-05-05 19:52:05 +00:00
Stanislav Shwartsman
c9fba73a69
added defines about new VMX bits and controls related to Page Miss Logging (PML) EPT feature
2015-05-05 19:35:39 +00:00
