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95 Commits

Author SHA1 Message Date
Stanislav Shwartsman
223b9fda0e Fixed RIP relative mode when in 32-bit address size 2007-04-09 21:15:00 +00:00
Stanislav Shwartsman
8f02078609 PADDQ is SSE2 instruction 2007-04-03 20:44:25 +00:00
Stanislav Shwartsman
2d47748f52 Added instruction set field for opcodes table + few bugfixes 2007-04-02 10:47:48 +00:00
Stanislav Shwartsman
4bb19c2dc3 Fixed deciding and disasm of CALL in 64-bit mode (no 16-bit calls allowed) 2007-03-28 21:20:09 +00:00
Stanislav Shwartsman
4f166369a6 Fixes for VMX disasm 2007-03-23 22:07:49 +00:00
Stanislav Shwartsman
ef542b3790 Learn to decode and disassemble VMX opcodes 
No fetchdecode support but everything is ready
 2007-03-23 14:35:50 +00:00
Stanislav Shwartsman
696f4fef0f Remove incorrect assertion 2007-02-22 17:43:29 +00:00
Stanislav Shwartsman
7d4a5ff1b2 Fixed rep prefix printing in disasm 2007-01-25 21:54:05 +00:00
Stanislav Shwartsman
f8003098b1 Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;) 
Fixed "last prefix" for REX in 64-bit mode
 2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
dd00bc66d0 Fixed disasm in 64bit mode, added new accessor for printing 64bit values 2007-01-13 10:43:31 +00:00
Stanislav Shwartsman
b0d608da33 Fixed disasm bug in x86-64 mode 2007-01-12 21:53:48 +00:00
Stanislav Shwartsman
24ece63fe7 Fixed disasm bug 2006-08-13 09:40:07 +00:00
Stanislav Shwartsman
3ce7764fce Fixes in 64-bit decoding 2006-08-11 17:23:36 +00:00
Stanislav Shwartsman
f39abc9b65 Fix for bug 
[ 1513544 ] disasm of 0xec (in AL,DX) returns ilen of 2 instead of 1
 2006-06-27 19:26:53 +00:00
Stanislav Shwartsman
caee480547 Fixed DR registers disasm 2006-06-26 21:06:26 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64 
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
 2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
4d1a609c8c BSWAP 16-bit mode not exists, correctly disasm this case 2006-05-07 19:12:56 +00:00
Stanislav Shwartsman
003c2f59e6 Added missed CVS header to several files 2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
c7773adac4 Norhing changed in funtionality, just make the file significantly smaler by removing extra spaces 2006-04-05 20:54:30 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
bc4ca51055 Fixed disasm of 'enter' instruction in AT&T mode 2006-03-23 17:43:39 +00:00
Stanislav Shwartsman
6b2ab6aa92 Fixed movhps/movlps instructions disasm 2006-02-17 17:13:58 +00:00
Stanislav Shwartsman
2dc81b172a Fixed several disasm bugs 2006-02-17 13:33:05 +00:00
Stanislav Shwartsman
180667fb4e Fixed compilation warning 2006-02-13 18:37:21 +00:00
Stanislav Shwartsman
ace3b9916a Print branch target linear address for all in disasm when possible (i.e. cs.base and eip supplied) 2006-02-11 19:46:03 +00:00
Stanislav Shwartsman
5a65e1065e Decoding functionality for Bochs disassembler. 
Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
 2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
24d4de03a1 - Fixed bug with missed ES segment override prefix 
- Correctly disassemble x86-64 opcodes

	Ia_cvttsd2si_Gq_Wsd
	Ia_cvttss2si_Gq_Wss
	Ia_cvtsd2si_Gq_Wsd
	Ia_cvtss2si_Gq_Wss
	Ia_movq_Pq_Eq
	Ia_movq_Vdq_Eq
	Ia_movq_Eq_Pq
	Ia_movq_Eq_Vq

- Correctly disassemble Intel SSE3 opcodes (not supported by Bochs)
	Ia_monitor
	Ia_mwait
 2006-01-31 17:42:31 +00:00
Stanislav Shwartsman
934f552ea3 Fix disassembly 2006-01-30 17:39:17 +00:00
Stanislav Shwartsman
cb58d08c11 Fix MSVC warning 2006-01-28 14:48:40 +00:00
Stanislav Shwartsman
557c15699f New function - toggle syntax mode 2006-01-24 21:34:39 +00:00
Stanislav Shwartsman
99a1f0838a FIx opcode table 2006-01-24 18:15:55 +00:00
Stanislav Shwartsman
276c006129 Merge new disasm module with x96-64 support 2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
40d8016e90 Fix disasm for FCOMI instructions 2005-11-17 17:42:15 +00:00
Stanislav Shwartsman
7b7ac565f9 Getting ready for long mode disasm support, patch will posted soon 2005-11-14 18:09:22 +00:00
Stanislav Shwartsman
5af5d80602 Small disasm fixes 2005-10-23 20:43:32 +00:00
Stanislav Shwartsman
d1c722211e Fix duplicate opcodes, fix opcode names and disasm bugs 2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
6244d43607 Fixed disasm bugs 2005-09-22 21:49:16 +00:00
Stanislav Shwartsman
7a6931159f Pre-support 64 bit disasm. For noew just cleanup to minimize diff 2005-09-12 16:46:54 +00:00
Stanislav Shwartsman
59f9763f5b Fix typo 2005-08-21 18:24:45 +00:00
Stanislav Shwartsman
47442d437a Speedup ICAche decWriteStamp operation. The main idea for this speedup was given by h.johansson. 2005-06-16 20:28:27 +00:00
Stanislav Shwartsman
51b9646407 Merge disasm fixes for PNI instructions (h.johansson) 2005-06-16 16:59:36 +00:00
Stanislav Shwartsman
438ad27ea1 Fixed handling of duplicate 0x66 and 0x67 prefixes in disasm (h.johanson) 2005-06-14 20:05:37 +00:00
Stanislav Shwartsman
7f26baeb94 small optimization in disasm code 2004-12-15 17:15:43 +00:00
Stanislav Shwartsman
757188d93b Fix disasm error caused by last commit 2004-12-13 22:04:31 +00:00
Stanislav Shwartsman
9306266580 Add missed "duplicated opcode group" to dis_tables.h 2004-12-12 22:17:13 +00:00
Stanislav Shwartsman
f375203fdb preparations for x86-64 support in disasm 2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
b009c2d1d7 disasm for instructions IRETD, PUSHFD, POPFD, PUSHAD, POPAD 
cVS: ----------------------------------------------------------------------
 2004-12-11 21:28:00 +00:00
Stanislav Shwartsman
8ac3790ab3 Added experimental support of AT&T syntax to disasm 
Fixed operand for CMPXCHG8B instruction

Feature request to somebidy who understand Bochs debugger code
  - to add Bochs debugger command which will switch between
    Intel and AT&T style for disassembler.
 2004-12-10 14:04:57 +00:00
Stanislav Shwartsman
a0efe5e577 small cleanup disasm code 
implement branch taken/not taken indication for conditional Jcc insructions
 2004-12-09 23:19:48 +00:00
Stanislav Shwartsman
139baaebf5 Fix OP_X and OP_Y methods for disasm 2004-12-09 20:01:00 +00:00