- rombios.c: return maximum bus number #1 for i440BX.
- Now using different i/o and memory base address regions for PCI and AGP.
- Added some init code for the i440BX PCI/AGP bridge.
- Some code cleanups.
- rombios.c: return maximum bus number #1 for i440BX.
- Now using different i/o and memory base address regions for PCI and AGP.
- Added some init code for the i440BX PCI/AGP bridge.
- Some code cleanups.
- Bochs BIOS: Improved calculating PCI slot number from device number to handle
the i440BX case correctly.
- Memory code: Detect and modify the PCI IRQ roouting table of the Bochs BIOS
for the i440BX chipset (TODO: this could be done by the BIOS itself after
copying to shadow RAM).
- Bochs BIOS: Improved calculating PCI slot number from device number to handle
the i440BX case correctly.
- Memory code: Detect and modify the PCI IRQ roouting table of the Bochs BIOS
for the i440BX chipset (TODO: this could be done by the BIOS itself after
copying to shadow RAM).
- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.
- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.
- Function ata_cmd_data_io: using fixed block size 512 only for 'identify'
commands. For read/write commands the hard disk sector size must be used.
- Take account of sector size when calculating hard disk size in MBytes (TODO:
calculation is not correct for not yet existing very big disks).
- updated comment.
- Function ata_cmd_data_io: using fixed block size 512 only for 'identify'
commands. For read/write commands the hard disk sector size must be used.
- Take account of sector size when calculating hard disk size in MBytes (TODO:
calculation is not correct for not yet existing very big disks).
- updated comment.
- Added default value for the video clock frequency to make sure that the
vertical timer works.
- Changing vidDesktopStartAddr register when the video processor is on now
forces a screen update.
- Implemented sector size handling in the ATA disk emulation. This feature
still needs BIOS support to boot from a disk with big sectors.
- Enabled sector size support in the redolog_t class based disk image mode.
The base class can handle 512 byte blocks only, but that doesn't matter since
all valid sector sizes are multiple of it. So for now the growing, undoable
and volatile disk image modes internally read/write 512 bytes per call.
- TODO: BIOS, bximage.
be specified as a USB port option (e.g. 'sect_size:1024'). The values 512, 1024
and 4096 are supported. If not specified, it defaults to 512.
TODO: ATA disk (harddrv code), BIOS, bximage.
- 'flat' mode: disk image size must be multiple of sector size.
- 'concat' mode: each disk image size and lseek() offset must be multiple of
sector size.
- 'sparse' mode: page size and lseek() offset must be multiple of sector size.
- TODO: 'growing', 'undoable' and 'volatile' mode: redolog_t class is still
based on 512-byte blocks.
- TODO: 'vbox', 'vmware3', 'vmware4', 'vpc' and 'vvfat' mode have a builtin
geometry. If other sector sizes are supported, it should be handled correctly.
- harddrv code now reports current sector size, but still panics for now.
- TODO: harrdrv and USB disk code, bximage, BIOS.
This code is based on the initial patch by Ben Lunt with some modifications:
using enum parameter, extra parser handler and cdrom handling not necessary,
TODO: hdimage and bximage code, harddrv and USB disk emulation, BIOS.
- Fixed PCI BAR initialization (now using memset()).
- Fixed reset failure (set all PAM memory types to ROM).
- Added stub for the AGP aperture (register BAR #0, handle APSIZE and read
GART entry in read/write handlers).
- Added some more PCI register defaults and write masks.
- Fixed a warning in the ES1370 code.
- Voodoo Banshee: set up PCI subsystem ID depending on bus and model.
- Volatile BIOS write support must also be present in ISA BIOS memory.
- Added new PCI chipset choice for the i440BX AGPset. Some basic work is done,
but AGP support is not present yet.
- Added new class for the "virtual" PCI-to-PCI bridge that should manage the
secondary bus (AGP). Since this device must appear with device number #1 at
the primary bus, it was required to change the PCI device numbers for the
i440BX case. Moved the PIIX4 module to device number #7. The presence of the
PCI base address regions now depends on the header type as expected.
- Since the Bochs BIOS cannot handle the modified PCI device layout, all tests
continued with an external BIOS designed for this chipset (GA-6BA_F1.bin).
This BIOS requires additional changes in some devices.
- ACPI: Return value 0 for some status registers and the GPI registers.
- CMOS: Since the PIIX4 supports a 256 byte CMOS RAM, prepared support for it
and enable it in case a 256 byte CMOS image is used.
- PCI: The device numbers for 4 slots starting at #8. The 5th slot could be
used for AGP when available.
Using a temporary subsystem ID, since I haven't found a VGABIOS ROM image for
the PCI version and Bochs doesn't support AGP yet. After modifying Voodoo3.inf
the driver could be installed successfully in Win95/98 and the Voodoo3 works as
expected (same issues as the Banshee model).
Removed BX_ERROR message about setting undocumented srcXY register bits. They
seem to have no effect on the emulation and could be ignored.
- Screen-to-screen blt: added support for expanding monochrome source data.
- Fixed calculation of the pitch for packed source data.
- Fixed repeated execution of some commands in non-immediate mode.
- PCI devices: fixed and improved BX_INFO / BX_DEBUG messages.
- Added INT pin init to method init_pci_conf().
- Moved readonly register handling to the common PCI write handler.
- Moved IRQ line reporting to the common PCI write handler.
- Added new structure bx_pci_bar_t that contains all parameters related to the
PCI BARs (type, size, address and r/w handlers).
- Added new methods init_bar_io() and init_bar_mem() to set up the new structure
in the pci device init code.
- Added new method pci_write_handler_common() to handle writes to the normal
BARs and the ROM BAR. Writes to other registers are forwarded to the device
specific PCI write handlers. Removed BAR and ROM BAR handling from the
specific code.
- Added new method pci_bar_change_notify() to execute specific code after BAR
update (vga, ne2k).
- Moved normal BAR handling to method after_restore_pci_state().
- Store pointer to PCI device name in bx_pci_device_c and use it for i/o setup.
