Added more default return values and improved debug output (i/o len).
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@ -317,6 +317,8 @@ Bit32u bx_acpi_ctrl_c::read(Bit32u address, unsigned io_len)
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value = BX_ACPI_THIS get_pmtmr();
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break;
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case 0x0c: // GPSTS
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case 0x14: // PLVL2
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case 0x15: // PLVL3
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case 0x18: // GLBSTS
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case 0x1c: // DEVSTS
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case 0x30: // GPI
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@ -325,9 +327,9 @@ Bit32u bx_acpi_ctrl_c::read(Bit32u address, unsigned io_len)
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value = 0x00;
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break;
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default:
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BX_INFO(("read from PM register 0x%02x not implemented yet", reg));
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BX_INFO(("read from PM register 0x%02x not implemented yet (len=%d)", reg, io_len));
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}
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BX_DEBUG(("read from PM register 0x%02x returns 0x%08x", reg, value));
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BX_DEBUG(("read from PM register 0x%02x returns 0x%08x (len=%d)", reg, value, io_len));
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} else {
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if (((BX_ACPI_THIS pci_conf[0x04] & 0x01) == 0) &&
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((BX_ACPI_THIS pci_conf[0xd2] & 0x01) == 0)) {
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@ -389,7 +391,7 @@ void bx_acpi_ctrl_c::write(Bit32u address, Bit32u value, unsigned io_len)
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if ((BX_ACPI_THIS pci_conf[0x80] & 0x01) == 0) {
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return;
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}
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BX_DEBUG(("write to PM register 0x%02x, value = 0x%04x", reg, value));
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BX_DEBUG(("write to PM register 0x%02x, value = 0x%08x (len=%d)", reg, value, io_len));
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switch (reg) {
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case 0x00:
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{
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@ -431,7 +433,7 @@ void bx_acpi_ctrl_c::write(Bit32u address, Bit32u value, unsigned io_len)
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}
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break;
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default:
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BX_INFO(("write to PM register 0x%02x not implemented yet", reg));
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BX_INFO(("write to PM register 0x%02x not implemented yet (len=%d)", reg, io_len));
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}
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} else if ((address & 0xfff0) == BX_ACPI_THIS s.sm_base) {
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if (((BX_ACPI_THIS pci_conf[0x04] & 0x01) == 0) &&
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