Stanislav Shwartsman
b84b922da3
remove unused 'shadow stack' bookkeeping from paging attributes
2024-01-13 11:57:30 +02:00
Stanislav Shwartsman
9fc53de186
VMX: PML address saved should be always 4K aligned
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Fixes #217
2024-01-13 09:43:28 +02:00
Stanislav Shwartsman
997fd85ec9
Set EFLAGS.RF on triple fault before shutdown or VMEXIT
2024-01-12 21:12:17 +02:00
Stanislav Shwartsman
ceaffe85d3
move code from paging.cc to access.cc
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intoduce a function to solve code duplication
2024-01-12 21:08:14 +02:00
Stanislav Shwartsman
6977fc05d9
VMX: adjust RFLAGS saved into guest state on VMEXIT according to VMX documentation:
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For APIC-access VM exits and for VM exits caused by:
- EPT violations
- EPT misconfigurations
- page-modification log-full events or
- SPP-related events
the value saved depends on whether the VM exit occurred during delivery of an event through the IDT ...
also handle RFlags saved if VMEXIT was caused directly by an event that would normally be delivered through the IDT
should fix #215
2024-01-12 20:01:53 +02:00
Shwartsman
6f4f217a08
implemented AMX_FP16 and aMX_COMPLEX, fixes for daz handling in AVX_NE_CONVERT FB16
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updated CHANGES
2024-01-12 12:38:31 +02:00
Stanislav Shwartsman
167942816a
regen Makefile.in dependencies
2024-01-12 01:10:47 +02:00
Stanislav Shwartsman
0eab037907
dynamically allocate VMCB_CACHE only if SVM is actually enabled by CPU model
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also reduces include dependency on svm.h
2024-01-12 00:56:09 +02:00
Stanislav Shwartsman
6b48d6e33f
resolution for SF bug #1460 Incorrect "Blocking by NMI" bit when handling NMI VM-exit
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as well as
resolution for Test stuck due to incorrect Virtual NMI handling #211
which appear the same problem
2024-01-12 00:19:44 +02:00
Shwartsman
9e36971e0f
fixed TILELOADD/TILESTORED and TDPBF16PS
2024-01-11 21:04:14 +02:00
Shwartsman
8dca1e0e07
correct implementation of AMX TDPBxxD instructions
2024-01-11 20:20:33 +02:00
Shwartsman
89d992b5b8
fixed ( #214 ) wrong MSR name typo in MSR error message
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in real mode exceptions should not push error code to stack so the same should be for VMEXIT due to HW exception from unrestricted real mode guest (fixes #211 )
2024-01-11 08:10:42 +02:00
Stanislav Shwartsman
3a02e85599
AMX support ( #212 )
2024-01-10 20:13:25 +02:00
Shwartsman
c04fb9a6ba
Fixed decoding of AVX-VNNI instruction (typo in decoder tables)
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mention AVX-VNNI in CHANGES
2024-01-09 09:14:39 +02:00
Shwartsman
54961f0326
fix buffer overflow with LA57
2024-01-07 07:37:18 +02:00
Shwartsman
cda3ed5a60
update CHANGES
2024-01-05 20:33:47 +02:00
Shwartsman
b24bf1dae2
CPUID: Added Xeon Sapphire Rapids CPU definition
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Features PKS, WAITPKG, UINTR, AVX512_BF16, MOVDIRI/MOVDIR64, LA57, SERIALIZE and more
Not yet supported but will be added in future: AVX512_FP16, AMX
2024-01-05 19:54:37 +02:00
Shwartsman
a67fb31d4f
LA57: attempt to change (not just clear) LA57 in long mode cause #GP
2024-01-05 18:46:56 +02:00
Shwartsman
6893743a5b
prevent trace linking aftre portin/portout instructions as well
2024-01-05 09:12:01 +02:00
Shwartsman
27d48ecb94
HandlersChaining Optimization: mark IN/OUT instructions as TraceEnd, they could have significant side effects like raising interrupts which have to be handled
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resolves issue #207
2024-01-05 08:45:10 +02:00
Shwartsman
41c2bb8bee
fix for LA57 cr4 checks, thanks Ben for pointing this out
2024-01-04 08:35:33 +02:00
Shwartsman
b93b9ad881
fixed comments in bf16.h
2023-12-29 22:45:59 +02:00
Stanislav Shwartsman
07d28c60b8
generic cpuid fix dump_cpuid
2023-12-29 21:53:15 +02:00
Stanislav Shwartsman
75a7151fbf
let generic CPUID to use MTF VMX extension
2023-12-29 21:50:40 +02:00
Stanislav Shwartsman
ec7ef85ed9
exclude cpuid.h from cpu.h to reduce compilation dependency
2023-12-29 21:27:24 +02:00
Shwartsman
133f1136d3
fix compilation with no x86-64 compiled in
2023-12-29 17:56:47 +02:00
Stanislav Shwartsman
e3612c30f8
Implement support for LA57 and 5-level paging
2023-12-29 14:48:38 +02:00
Shwartsman
5b61b51498
more optimal version for VDPBF16PS
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avoid constly softfloat calls when masked
2023-12-25 16:26:28 +02:00
Shwartsman
ddff78a16c
style and disasm updates, no functional impact
2023-12-25 14:57:05 +02:00
Shwartsman
7c9bab8182
handle getexp methods though templates
2023-12-25 08:07:07 +02:00
Stanislav Shwartsman
ef30a12afb
avoid accidential zero of the mask, due to Bit64u computation overflow (1 << 64) == 1
2023-12-24 22:37:02 +02:00
Stanislav Shwartsman
e7f2450220
fix XSAVE leaf resporting in CPUID
2023-12-24 20:12:30 +02:00
Shwartsman
00831a09d7
optimize load vector methods
2023-12-24 19:57:07 +02:00
Stanislav Shwartsman
662d8ec279
fix bug from previous commit
2023-12-24 15:04:31 +02:00
Stanislav Shwartsman
eb6d4f5fc8
use simpler method to write XMM register while clearing AVX upper part
2023-12-24 14:45:04 +02:00
Shwartsman
b4effb58af
fix compilation with minimalistic config
2023-12-23 22:10:22 +02:00
Shwartsman
19dbd7314b
convert more instructions to template
2023-12-23 22:01:13 +02:00
Shwartsman
8e76c9b6bb
move many SSE/AVX/AVX512 methods to template functions
2023-12-23 21:00:51 +02:00
Shwartsman
120ad141b3
reduce code duplication by merging equivalent methods
2023-12-23 19:12:03 +02:00
Shwartsman
f1bab0c057
fixed MSR bit defines from FRED feature
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minor update for WRMSRLIST instruction from today's SDM update
2023-12-23 10:34:03 +02:00
Shwartsman
fc919cd132
use true/false instead of 0/1 for bool in the cpu code
2023-12-19 20:44:56 +02:00
Shwartsman
1a2544b1bb
fixed typo in comment
2023-12-19 19:51:37 +02:00
Stanislav Shwartsman
54e88eee92
more correction for CPUID leaf 0xD
2023-12-18 15:58:18 +02:00
Shwartsman
d794b516e1
rewrite XSAVE/XRESTORE CPUID leaf reporting,
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fixed several bugs and made code correct for all future XSAVE extensions
2023-12-18 11:35:55 +02:00
Stanislav Shwartsman
54831068df
implement RDMSRLIST/WRMSRLIST instructions (+related VMX extensions) ( #176 )
2023-12-16 21:59:34 +02:00
Shwartsman
accb975173
use true/false for boolean values insetad of 0 and 1
2023-12-16 19:07:03 +02:00
Shwartsman
e68ae599af
added comments and consts for CPUID definitions
2023-12-16 10:10:48 +02:00
Shwartsman
4a6ec57711
remove redundant space in comment
2023-12-10 20:44:05 +02:00
Stanislav Shwartsman
2eccb25e8f
x87: Implemented special behavior for 287-compatibility FSTP opcode: D9D8..D9DF - Behaves the same as FSTP but won't cause a stack underflow exception.
2023-12-07 12:56:02 +02:00
Shwartsman
9e68546126
cleanup more leafs in CPUDB
2023-12-03 17:59:48 +02:00
