Stanislav Shwartsman
b2cf7860dc
VMX: Implemented MSR IA32_SPEC_CTRL Virtualization VMX extension
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fixed few typos in error messages
2024-01-13 21:58:23 +02:00
Stanislav Shwartsman
3a02e85599
AMX support ( #212 )
2024-01-10 20:13:25 +02:00
Shwartsman
cda3ed5a60
update CHANGES
2024-01-05 20:33:47 +02:00
Shwartsman
f1bab0c057
fixed MSR bit defines from FRED feature
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minor update for WRMSRLIST instruction from today's SDM update
2023-12-23 10:34:03 +02:00
Shwartsman
e68ae599af
added comments and consts for CPUID definitions
2023-12-16 10:10:48 +02:00
Shwartsman
a1060a0825
cleanups in CPUDB cpuid definitions
2023-12-03 16:46:39 +02:00
Shwartsman
8dd9649389
fixed compilation for VMX=1 X86_64=1
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updated (c) for many files
2023-11-28 10:36:56 +02:00
Shwartsman
cc4f594ede
implemented process-posted-interrupts VMX extension
2023-11-27 20:15:00 +02:00
Stanislav Shwartsman
9917227a56
enable CPUID reporting for recently added ISA extensions
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more steps towards more generic CPUID code
2023-10-12 21:48:09 +03:00
Stanislav Shwartsman
dd7d4dbd82
implement SERIALIZE instruction
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enable CPUID reporting for all recently added ISA extensions
2023-10-12 14:46:27 +03:00
Stanislav Shwartsman
7e909a6fa5
rename CPUID flags to match leaf numbers
2023-10-07 18:10:20 +03:00
Shwartsman
6d83b5239e
another code duplication fix in CPUDB code
2023-10-07 01:36:05 +03:00
Shwartsman
672c93c7c4
reduce code duplication using new CPUID methods
2023-10-07 01:02:39 +03:00
Shwartsman
5fc6302b1b
add one more CPUID method for future use + fix compilation after prev commit
2023-10-07 00:10:18 +03:00
Shwartsman
f50419429d
Fix code duplication for CPUID ECX leaf 0x1, implement with common function for all CPUs
2023-10-06 22:53:30 +03:00
Stanislav Shwartsman
253882589d
extend cpuid enums with new bits announced in Intel SDM
2023-08-20 20:30:01 +03:00
Stanislav Shwartsman
d1737638ec
add CPUID definitions disclosed in recent Intel SDM
2022-10-01 14:11:45 +03:00
Stanislav Shwartsman
b75fcc4535
updates to cpuid.h with most recent CPUID bit definitions
2022-08-26 22:31:23 +03:00
Stanislav Shwartsman
1e4f1624c8
remove trailing whitespace from source files
2022-08-23 21:46:04 +03:00
Stanislav Shwartsman
f44f4ae753
MBE (Mode Based Execution Control) emulation ( #22 )
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* MBE (Mode Based Execution Control) emulation
2022-07-30 15:26:47 +03:00
Stanislav Shwartsman
fb09790846
dos2unix to all files
2022-07-30 14:31:16 +03:00
Stanislav Shwartsman
a8ef631a39
define and mention newly disclosed CPUID bits ( #7 )
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Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2022-07-17 18:45:36 +03:00
Stanislav Shwartsman
2ab50c7d66
solve code duplication between different cpudb models
2021-02-16 18:57:49 +00:00
Stanislav Shwartsman
1bf18b8aae
! CPUID: Added TigerLake CPU definition (features CET and CLWB support)
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- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
This enable better compiler optimizations and reduce binary size
2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
e15012cfcf
fix code duplication in <limiting max cpuid leaf to 0x02 for winnt> feature
2021-01-02 16:28:51 +00:00
Stanislav Shwartsman
c6050a99d1
implemented AVX encoded VNNI instructions published in recent SDM - not tested yet
2020-10-03 09:23:28 +00:00
Stanislav Shwartsman
a378441254
update CPUID bits and CR bits according to recently published SDM documents by Intel
2020-10-03 07:59:47 +00:00
Stanislav Shwartsman
4023b640d6
Protection Keys: Implemented Supervisor-Mode Protection Keys (PKS)
2020-05-29 12:35:30 +00:00
Stanislav Shwartsman
355c06e396
add defines for CPUID bits recently announced
2020-04-01 06:15:54 +00:00
Stanislav Shwartsman
a70df308fa
add defines for CPUID bits published in latest SDM 071
2019-11-12 18:54:08 +00:00
Stanislav Shwartsman
d766cc8112
implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition
2019-10-26 20:09:30 +00:00
Stanislav Shwartsman
2eb47f866f
added minor clarifications based on most recent AMD SDM published
2019-07-30 18:17:21 +00:00
Stanislav Shwartsman
85780d939a
extract MONITOR/MWAIT stuff to separate trsnlation unit
2019-05-25 18:32:17 +00:00
Stanislav Shwartsman
55d2dc6b0c
add some CPUID and VMCS definitions from latest SDM
2019-05-22 18:22:22 +00:00
Stanislav Shwartsman
9bc7faf493
dump all supported CPU fetures into Bochs log from CPUID object
2019-01-05 20:17:39 +00:00
Stanislav Shwartsman
e387876145
Enable PML VMX feature in Skylake-X
2018-10-26 19:54:22 +00:00
Stanislav Shwartsman
d000e21001
added MOVDIRI opcode implementation
2018-04-06 05:06:36 +00:00
Stanislav Shwartsman
fd15b61d94
keep def of YMM/ZMM register even if AVX or EVEX are not compiled in and let reading/writing them to MEM
2018-04-04 19:31:56 +00:00
Stanislav Shwartsman
8c9f7f54b6
update CPUID definitions with recently published EAS-33 extensions document
2018-04-04 18:15:44 +00:00
Stanislav Shwartsman
afc2ee6bfd
Implemented SPP: EPT-Based Subpage Protection. Cleaned code duplication between FXSAVE/FXRSTORE and XSAVE/XRSTOR (save/restore of SSE code is the same)
2018-01-27 21:20:33 +00:00
Stanislav Shwartsman
69f27439db
added new cpuid flags mentioned in new Intel SDM future extensions rev030 doc
2017-10-13 20:27:52 +00:00
Stanislav Shwartsman
b2fdbd1274
added Skylake-X model to CPUDB -> with EVEX and AVX512 support
2017-08-09 20:36:17 +00:00
Stanislav Shwartsman
e5c64b3b56
cleanup of warning messages from cpuid code
2017-03-26 20:12:14 +00:00
Stanislav Shwartsman
6edf22e754
finally figured out what TCE means in AMD CPUID - and it has EFER.TCE bit related to it
2017-03-15 22:48:27 +00:00
Stanislav Shwartsman
3a033fa6db
implemented xsaves/xrstors extensions (supported by Intel Skylake core and AMD Ryzen)
2017-03-15 21:44:15 +00:00
Stanislav Shwartsman
402e2cfad0
move cpuid warning messages to base cpuid class - reduce code cleanup
2017-03-13 19:59:48 +00:00
Stanislav Shwartsman
980eaa7937
move cpuid leaf 80000008 to base bx_cpuid_t class to remove code dupolication
2017-03-09 21:25:18 +00:00
Stanislav Shwartsman
9bd99a604f
implemented recently announced AVX-512 extension VPOPCNT
2016-12-17 13:47:45 +00:00
Stanislav Shwartsman
239f793f37
in the latest intel docs PCOMMIT CPUID bit doesn't exists anymore
2016-10-02 11:54:19 +00:00
Stanislav Shwartsman
793ceb0d8c
fix massive code dupliction between disasm, debugger and cpu by introducing new cpu decoder.h header
2016-04-29 21:01:28 +00:00
