Stanislav Shwartsman
98f1930a80
Fixed compilation issue (patch by Eugene Toder)
2008-04-27 19:47:12 +00:00
Stanislav Shwartsman
64f2489afb
Correctly implement opcode group G11 i.e. instructions C6 and C7 should @UD when modrm nnn field != 0 (1st instr in the group
2008-04-24 21:52:28 +00:00
Stanislav Shwartsman
0609d7e7ce
Handle undocumented FPU opcodes
2008-04-21 14:17:48 +00:00
Stanislav Shwartsman
1a34834db9
Fixed disasm for SSE4.2 instr
2008-04-18 14:09:24 +00:00
Stanislav Shwartsman
a8c273c7bf
Fixed disasm bug in 64-bit mode
2008-04-11 17:54:21 +00:00
Stanislav Shwartsman
671cd93966
Add CPU flags for future use
2008-04-04 12:23:45 +00:00
Stanislav Shwartsman
b3bca89842
Disasm print fixed for AT&T style
2008-03-20 18:11:57 +00:00
Stanislav Shwartsman
5e7218b8c3
Fixed problem introduced by prev checkin
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+
Fix beak to debugger when executing HLT instruction
2008-02-29 05:39:40 +00:00
Stanislav Shwartsman
405fcfd75d
Reorganize 3-byte opcode tables - bigger tables but easier to maintain them
2008-02-29 03:02:03 +00:00
Stanislav Shwartsman
c70d3e7d76
dos2unix
2008-02-12 22:45:46 +00:00
Stanislav Shwartsman
8615022962
Added first stubs for XSAVE/XRESTOR implementation
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Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
eebd96e2d7
another whitespace cleanup by Sebastien
2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
72d72c92d4
Fixed warnings of VC2008
2007-12-30 18:02:22 +00:00
Stanislav Shwartsman
dfb3685c46
Fixed memory bug in disasm code
2007-11-18 21:29:17 +00:00
Stanislav Shwartsman
033150c7e6
According to AMD docs opcodes 0f 19...0f 1f are multibyte NOP
2007-11-17 16:19:14 +00:00
Stanislav Shwartsman
b1984282b2
simplify disasm resolve function
2007-11-14 22:49:51 +00:00
Stanislav Shwartsman
5445de19d1
Decoding : F2 and F2 prefix could override prefix 66 when determine SSE opcode
2007-10-20 10:56:44 +00:00
Stanislav Shwartsman
c0d5b9040c
Prepare for 4-arg instructions (will be needed for AMD SSE5)
2007-10-09 20:24:42 +00:00
Stanislav Shwartsman
de72d9141f
Disasm updates (bugfixes) + disasm of all SSE4_2 instructions
2007-10-01 19:57:46 +00:00
Stanislav Shwartsman
8e0ddbc59b
dos2unix
2007-09-19 19:43:47 +00:00
Stanislav Shwartsman
0dc4badfbb
Added SSE4A and SSE4_2 to disassembler
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Implemented POPCNT instruction
2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
016660698e
just code cleanup, preparation for future
2007-08-31 18:09:34 +00:00
Stanislav Shwartsman
b64fc08c54
implement prefetch hint opcodes
2007-08-23 16:47:51 +00:00
Stanislav Shwartsman
4555cc9be3
ud2b opcode should have modrm byte
2007-08-18 13:51:16 +00:00
Stanislav Shwartsman
5189cfbf10
SSE4 support
2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
223b9fda0e
Fixed RIP relative mode when in 32-bit address size
2007-04-09 21:15:00 +00:00
Stanislav Shwartsman
8f02078609
PADDQ is SSE2 instruction
2007-04-03 20:44:25 +00:00
Stanislav Shwartsman
2d47748f52
Added instruction set field for opcodes table + few bugfixes
2007-04-02 10:47:48 +00:00
Stanislav Shwartsman
4bb19c2dc3
Fixed deciding and disasm of CALL in 64-bit mode (no 16-bit calls allowed)
2007-03-28 21:20:09 +00:00
Stanislav Shwartsman
4f166369a6
Fixes for VMX disasm
2007-03-23 22:07:49 +00:00
Stanislav Shwartsman
ef542b3790
Learn to decode and disassemble VMX opcodes
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No fetchdecode support but everything is ready
2007-03-23 14:35:50 +00:00
Stanislav Shwartsman
696f4fef0f
Remove incorrect assertion
2007-02-22 17:43:29 +00:00
Stanislav Shwartsman
7d4a5ff1b2
Fixed rep prefix printing in disasm
2007-01-25 21:54:05 +00:00
Stanislav Shwartsman
f8003098b1
Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;)
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Fixed "last prefix" for REX in 64-bit mode
2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
dd00bc66d0
Fixed disasm in 64bit mode, added new accessor for printing 64bit values
2007-01-13 10:43:31 +00:00
Stanislav Shwartsman
b0d608da33
Fixed disasm bug in x86-64 mode
2007-01-12 21:53:48 +00:00
Stanislav Shwartsman
24ece63fe7
Fixed disasm bug
2006-08-13 09:40:07 +00:00
Stanislav Shwartsman
3ce7764fce
Fixes in 64-bit decoding
2006-08-11 17:23:36 +00:00
Stanislav Shwartsman
f39abc9b65
Fix for bug
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[ 1513544 ] disasm of 0xec (in AL,DX) returns ilen of 2 instead of 1
2006-06-27 19:26:53 +00:00
Stanislav Shwartsman
caee480547
Fixed DR registers disasm
2006-06-26 21:06:26 +00:00
Stanislav Shwartsman
fe644dfcbf
- Code cleanup, remove x86-64 code from functions which cannot be called from x86-64
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- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
4d1a609c8c
BSWAP 16-bit mode not exists, correctly disasm this case
2006-05-07 19:12:56 +00:00
Stanislav Shwartsman
003c2f59e6
Added missed CVS header to several files
2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
c7773adac4
Norhing changed in funtionality, just make the file significantly smaler by removing extra spaces
2006-04-05 20:54:30 +00:00
Stanislav Shwartsman
f8c3968d42
Changes list made after CVS service crash:
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- Fixed critical bug in CPU code added with one of the prev commits
- Disasm support for SSE4
- Rename PNI->SSE3 everywhere in the code
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Added ability to turn ON instruction trace, only GUI support is missed.
Instruction trace could be enabled if Bochs was compiled with disasm
- More changes Bit32u -> bx_phy_address
- Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
- Small code cleanup
- Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
bc4ca51055
Fixed disasm of 'enter' instruction in AT&T mode
2006-03-23 17:43:39 +00:00
Stanislav Shwartsman
6b2ab6aa92
Fixed movhps/movlps instructions disasm
2006-02-17 17:13:58 +00:00
Stanislav Shwartsman
2dc81b172a
Fixed several disasm bugs
2006-02-17 13:33:05 +00:00
Stanislav Shwartsman
180667fb4e
Fixed compilation warning
2006-02-13 18:37:21 +00:00
Stanislav Shwartsman
ace3b9916a
Print branch target linear address for all in disasm when possible (i.e. cs.base and eip supplied)
2006-02-11 19:46:03 +00:00