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685a10749d
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1450 Commits

Author SHA1 Message Date
Stanislav Shwartsman
685a10749d Remove redundant RSP canonical check - will happen anyway in push function 2008-05-04 21:51:52 +00:00
Stanislav Shwartsman
64a80c8a2d - Added canonical check for SYSENTER MSRs in WRMSR 
- Fixed LLDT and LTR instructions in 64-bit mode
- Fixed error code for not 64-bit CS in interrupt from long mode
 2008-05-04 21:25:16 +00:00
Stanislav Shwartsman
f642b57a54 Lazy falgs optimizations by Darek Mihocka 2008-05-04 15:07:08 +00:00
Stanislav Shwartsman
06e3615239 Reduce trace cache memory footprint using naive memory pool trace allocation 2008-05-04 05:37:36 +00:00
Stanislav Shwartsman
a6b360c92f Removed duplicated ';' 2008-05-03 17:35:11 +00:00
Stanislav Shwartsman
50c9674d2e Small optimization in memory access functions 2008-05-03 17:33:30 +00:00
Stanislav Shwartsman
ed4be45a8b Split shift/rotate opcodes in 32-bit mode and 64-bit mode 2008-05-02 22:47:07 +00:00
Stanislav Shwartsman
73d8bd3af4 Hide more memory variables 2008-05-01 20:28:36 +00:00
Stanislav Shwartsman
f5780a5f5c Hide some BX_MEM_C variables 
Optimize resolve16 methods - by reducing their amount again - reduce chance for misspredictin
 2008-05-01 20:08:37 +00:00
Stanislav Shwartsman
8e8fa363f1 Check for seg cache valid bit in real mode as well - fix for big real mode 2008-05-01 05:11:19 +00:00
Stanislav Shwartsman
81deffd65d More fetchdecode fixes 2008-04-30 21:32:33 +00:00
Stanislav Shwartsman
e5b6f90b62 some fetchdecode fixes 2008-04-30 21:07:12 +00:00
Stanislav Shwartsman
423aa44ab1 PUSHA/POPA fixes 2008-04-30 20:41:40 +00:00
Stanislav Shwartsman
c063563bb8 Fixed compilation error 2008-04-30 16:31:07 +00:00
Stanislav Shwartsman
affbdbefb4 do not cause tranition to MMX state if no MMX reg touched 2008-04-29 21:47:16 +00:00
Stanislav Shwartsman
18b4dec094 Fixed compilation error 2008-04-29 05:12:21 +00:00
Stanislav Shwartsman
06c6ac0060 - Fixed effective address wrap in 64-bit mode with 32-bit address size 
- Fixed SMSW instruction in 32-bit and 64-bit modes
 2008-04-28 18:18:08 +00:00
Stanislav Shwartsman
b000c6ac17 - Fixed TSS limit check in task switch routine 2008-04-28 18:14:50 +00:00
Stanislav Shwartsman
67e534832b Remove from CPU reference to MEM object - it is only one and could be static 2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
e86102eea5 Fixed 2nd dword of 64-bit descriptor check 2008-04-26 19:41:28 +00:00
Stanislav Shwartsman
7384c8e07d Fixed restore state in task switch 2008-04-26 10:20:15 +00:00
Stanislav Shwartsman
bbe7db9e88 Fixed bug with pushing into new stack in exception function 
Fixed bug with Expand down segment limits (can be critical)
 2008-04-25 21:21:46 +00:00
Stanislav Shwartsman
9047c9be96 Support for reserved bits checking in paging 
Check for page is in DTLB before invalidating by INVLPG
 2008-04-25 20:08:23 +00:00
Stanislav Shwartsman
00ee869624 alignment check for write_new_stack 2008-04-25 12:44:16 +00:00
Stanislav Shwartsman
a647c7e551 Check for old TSS limits in task switching logic 
MSR_GSKERNELBASE should be canonical - added WRMSR check
 2008-04-25 11:39:51 +00:00
Stanislav Shwartsman
b78878bd90 Fixed #AC exception detection 2008-04-25 08:19:36 +00:00
Stanislav Shwartsman
cf47fab9d0 Fixed address size wrap in the bittest/set instructions 2008-04-25 07:40:51 +00:00
Stanislav Shwartsman
ea48400435 Chnage back write variables order 2008-04-24 22:41:46 +00:00
Stanislav Shwartsman
83e55874a4 Fixed compilation issue 2008-04-24 21:59:42 +00:00
Stanislav Shwartsman
64f2489afb Correctly implement opcode group G11 i.e. instructions C6 and C7 should @UD when modrm nnn field != 0 (1st instr in the group 2008-04-24 21:52:28 +00:00
Stanislav Shwartsman
8e08402eb2 Fixed loading of SS null selector in long mode afer exception 2008-04-24 20:52:27 +00:00
Stanislav Shwartsman
b504253645 Added canonical check for LIDT/LGDT instructions in 64-bit mode 2008-04-24 19:34:01 +00:00
Stanislav Shwartsman
d24a274909 Eliminate can_pop function - with bugfix in retf 2008-04-23 17:25:21 +00:00
Stanislav Shwartsman
3c7949948b - Added >32bit physical address PANIC in PSE mode with 4M paging 
- Fixed LAR/LSL instructions in 64-bit mode
 2008-04-22 22:05:38 +00:00
Stanislav Shwartsman
b33d1a19a4 Correctly push error code after task switch in exception() 2008-04-21 21:29:43 +00:00
Stanislav Shwartsman
c09934f90a some small cleanup in paging code 2008-04-21 20:17:45 +00:00
Stanislav Shwartsman
55ee5f0f38 Fixed compilation errror 2008-04-21 19:55:04 +00:00
Stanislav Shwartsman
a055323e18 Handle undocumented FPU opcodes 
Support for BIG real mode CS.LIMIT check
 2008-04-21 14:17:04 +00:00
Stanislav Shwartsman
24f1507fa9 - sysenter/exit should be supported in v8086 mode as well 
- fixed missed CS.LIMIT check in all far calls/jmps in real/v8086 mode
 2008-04-20 21:44:13 +00:00
Stanislav Shwartsman
280617288c Mode change in SYSENTER/EXIT/CALL/RET could happen only when already in long mode 2008-04-20 18:17:14 +00:00
Stanislav Shwartsman
a91ef4e31b Ignore CS.L bit when EFER.LMA is not set 
Add potentially missed CPU mode change in SYSCALL/RET/ENTER/EXIT
 2008-04-20 18:10:32 +00:00
Stanislav Shwartsman
57a8e24615 Fixed REOUNDPS/PD/SS/SD 2008-04-20 14:10:44 +00:00
Stanislav Shwartsman
a45df4b584 Fixed ROUNDPS/PD bug 2008-04-20 13:32:42 +00:00
Stanislav Shwartsman
d9bf2b8453 Small emulation speed optimization 2008-04-19 22:29:44 +00:00
Stanislav Shwartsman
359eb92c73 More fixes for CPU emulation 2008-04-19 20:00:28 +00:00
Stanislav Shwartsman
e10bd0b7a5 tasking - read state first and only when store state in new TSS 
paging - fixed data for trace-mem callbacks
 2008-04-19 14:13:43 +00:00
Stanislav Shwartsman
bdaef81603 Added debugger memory trace functionality. Enable by 'trace-mem on' command 2008-04-19 13:21:23 +00:00
Stanislav Shwartsman
8e2850b3ec Mark TSS busy after it is loaded 2008-04-19 11:08:39 +00:00
Stanislav Shwartsman
8ff1b3c15e Update MEM_ACCESS instrumentation 2008-04-19 10:13:04 +00:00
Stanislav Shwartsman
cacec881cf Fixed param type for set_TSC 2008-04-18 18:37:29 +00:00