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9 Commits

Author SHA1 Message Date
Stanislav Shwartsman
02e19de346 Added shape of implementation for last missing VSCALEF* AVX-512 instructons. 
The softfloat implementation is still missing (only corner cases are supported).
Extend softfloat floatNN_class methods to distinguish between SNaN and QNaN.
 2014-03-09 21:42:11 +00:00
Stanislav Shwartsman
15979a52b6 implemented avx-512 getexp instructions 2014-01-27 21:25:07 +00:00
Stanislav Shwartsman
fb2521a1fe implemented avx-512 vsqrt instructions 2013-11-30 19:33:08 +00:00
Stanislav Shwartsman
d169860f6c added masked operations to simd_pfp.h, optimize simd_int.h, rewrite dpps instr using new masked op from simd_pfp.h 2013-09-17 20:49:26 +00:00
Stanislav Shwartsman
aa25c1db6a name convention change - search and replace 2013-09-17 17:34:20 +00:00
Stanislav Shwartsman
2580d8c46d added FMA4 AMD instructions support, fixed mem access length for Intel scalar FMA instructions 2011-10-07 14:09:35 +00:00
Stanislav Shwartsman
e282b5e88d Move DAZ handling into softfloat library (for float16, float32 and float64 only) and cleanup SSE and AVX code 
Fix decoding of opcodes with VEX.W=1 in 32-bit mode (AVX2, FMA)
 2011-10-01 15:40:36 +00:00
Stanislav Shwartsman
2583f8549a small code duplication fix 2011-09-19 20:47:59 +00:00
Stanislav Shwartsman
44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure 
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
 2011-08-27 13:47:16 +00:00