His change log says:
- Makefile simplified - no longer uses tools86, dataseghack or ld86.
Also enables warnings (-w-) and checks for undefined labels (-u-).
- Macros used in place of multi-line #defines (so !!! conversion by
tools86 not needed).
- HALT() fixed [previously used ';' instead of '!!!']. Needs port 400 to
be added to iodev to be useful?
- isru removed - doesn't seem to be needed now.
- added UDIV16 (for use by bios_printf).
- bios_printf %d implemented.
- set_enable_a20 changed to use PS2 method, since bochs emulates this.
- Keyboard intercept (int 15h/42h) fixed - should set CF, not assume that
caller already has. [The DOS keyb driver for example doesn't!]
- Memory is scanned from C000 to F4000 for extension ROMs - this
picks up VGA BIOS as before, and allows others to be included.
- Comments improved for bios config table, and bit indicating RTC
present is now set.
- Int 9 (keyboard) now calls Int 15h/42h for key releases too.
[Again, this is what the DOS keyb driver does.]
tries to fix it. The shortcuts to register names such as AX and DL are
#defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR.
When BX_USE_CPU_SMF=1, this works fine. (This is what bochs used for
a long time, and nobody used the SMF=0 mode at all.) To make SMP bochs
work, I had to get SMF=0 mode working for the CPU so that there could
be an array of cpus.
When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which
only works within methods of BX_CPU_C. Code outside of BX_CPU_C must
reference BX_CPU(num) instead.
- to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are
now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined. This is
only done in the cpu/*.cc code.
in BRANCH-smp-bochs revisions.
- The general task was to make multiple CPU's which communicate
through their APICs. So instead of BX_CPU and BX_MEM, we now have
BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several
processors in a shared memory space, so there might be processors
BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation,
you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with
BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the
SMP changes.
- to simulate multiple CPUs, you have to give each CPU time to execute
in turn. This is currently implemented using debugger guards. The
cpu loop steps one CPU for a few instructions, then steps the
next CPU for a few instructions, etc.
- there is some limited support in the debugger for two CPUs, for
example printing information from each CPU when single stepping.
Bryce Denney