Commit Graph

36 Commits

Author SHA1 Message Date
Volker Ruppert
8e85b8654b - fixed repeat speedup optimization on big endian machines 2006-08-01 17:09:05 +00:00
Stanislav Shwartsman
6c3420a18b Add debug prints before any #GP excepion which only possible to be generated 2006-06-09 22:29:07 +00:00
Stanislav Shwartsman
8b0df8e99b Merge SAVE_RESTORE branch to CVS 2006-05-27 15:54:49 +00:00
Stanislav Shwartsman
a4129e5341 Handle NULL_SEG_REG (no segment override) case in fetchdecode.cc 2006-05-24 20:57:37 +00:00
Stanislav Shwartsman
91ada6c72c Separate RepeatSpeedups code in io.cc to stand-alone CPU methods
FestRepINSW and FastRepOUTSW similar to that is done in string.cc
Done to simplify the code, it was just impossible to understand it.
2006-05-07 20:45:42 +00:00
Stanislav Shwartsman
d69eba6c07 Split in/out instructions based on operand size 2006-05-07 18:27:36 +00:00
Stanislav Shwartsman
b8be848943 Use access_type param in getHostMemAddr, less efficient but no copy-paste at least 2006-03-26 19:39:37 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
f096a80716 Fix code duplication for check_cs descriptor
The function will execute
 - segment is executable code segment
 - conforming/non-conforming segment priviledge checks
 - segment is present
2005-08-01 21:40:17 +00:00
Stanislav Shwartsman
c026a90779 Unify coding style in CPU methods
NO AFFECT ON EMULATION RESULTS
2005-05-20 20:06:50 +00:00
Volker Ruppert
a5fb44c340 - changed data type of bulkIOHostAddr to Bit8u* (fixed compilation on 64 bit hosts) 2005-04-02 11:30:08 +00:00
Stanislav Shwartsman
b25088bf2f Merge patch [1153327] ignore segment bases in x86-64 by Avi Kivity 2005-02-28 18:56:05 +00:00
Stanislav Shwartsman
0d09a8c8a8 fix code duplication 2004-11-26 19:53:04 +00:00
Stanislav Shwartsman
5873b26a82 Speed up compilation process.
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
2004-06-19 15:20:15 +00:00
Stanislav Shwartsman
f552a1c861 Apply patches:
907163 ctrl_xfer8 clean/speed up   2004-02-29 14:32 nobody psychosmurf
907161 clean/speed up of io.cc   2004-02-29 14:31 nobody psychosmurf
2004-03-02 20:48:48 +00:00
Bryce Denney
5e520261db Add plugin support to Bochs by merging all the changes from the
BRANCH_PLUGINS branch!

Authors:
  Bryce Denney
  Christophe Bothamy
  Kevin Lawton (we grabbed a lot of plugin code from plex86)
Testing help from:
  Volker Ruppert
  Don Becker (Psyon)
  Jeremy Parsons (Br'fin)

The change log is too long to paste in here.  To read the change log, do
  cvs log patches/patch.final-from-BRANCH_PLUGINS.gz

All the changes and a detailed description are contained in a patch
called patch.final-from-BRANCH_PLUGINS.gz.  To look at the complete
patch, do
  cvs upd -r1.1 patches/patch.final-from-BRANCH_PLUGINS.gz

Then you will have a local copy of the patch, which you can gunzip and
play with however you want.

Modified Files:
    .bochsrc Makefile.in aclocal.m4 bochs.h config.h.in configure
    configure.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h state_file.h bios/Makefile.in bios/rombios.c
    cpu/Makefile.in cpu/access.cc cpu/apic.cc cpu/arith16.cc
    cpu/arith32.cc cpu/arith8.cc cpu/cpu.cc cpu/cpu.h
    cpu/ctrl_xfer32.cc cpu/exception.cc cpu/fetchdecode.cc
    cpu/fetchdecode64.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc
    cpu/init.cc cpu/io.cc cpu/logical16.cc cpu/logical32.cc
    cpu/logical8.cc cpu/paging.cc cpu/proc_ctrl.cc
    cpu/protect_ctrl.cc cpu/segment_ctrl_pro.cc cpu/shift16.cc
    cpu/shift32.cc cpu/stack64.cc cpu/string.cc cpu/tasking.cc
    debug/Makefile.in debug/dbg_main.cc disasm/Makefile.in
    doc/docbook/user/user.dbk dynamic/Makefile.in fpu/Makefile.in
    gui/Makefile.in gui/amigaos.cc gui/beos.cc gui/carbon.cc
    gui/control.cc gui/control.h gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/sdlkeys.h gui/siminterface.cc
    gui/siminterface.h gui/term.cc gui/win32.cc gui/wx.cc
    gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
    gui/x.cc gui/keymaps/sdl-pc-de.map gui/keymaps/sdl-pc-us.map
    gui/keymaps/x11-pc-de.map instrument/example0/instrument.h
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/Makefile.in iodev/biosdev.cc iodev/biosdev.h
    iodev/cdrom.cc iodev/cmos.cc iodev/cmos.h iodev/devices.cc
    iodev/dma.cc iodev/dma.h iodev/eth_fbsd.cc iodev/eth_linux.cc
    iodev/eth_null.cc iodev/eth_tap.cc iodev/floppy.cc
    iodev/floppy.h iodev/guest2host.cc iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/iodebug.cc
    iodev/iodebug.h iodev/iodev.h iodev/keyboard.cc
    iodev/keyboard.h iodev/ne2k.cc iodev/ne2k.h iodev/parallel.cc
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pci2isa.cc
    iodev/pci2isa.h iodev/pic.cc iodev/pic.h iodev/pit.cc
    iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h iodev/sb16.cc
    iodev/sb16.h iodev/scancodes.cc iodev/scancodes.h
    iodev/serial.cc iodev/serial.h iodev/slowdown_timer.cc
    iodev/slowdown_timer.h iodev/unmapped.cc iodev/unmapped.h
    iodev/vga.cc iodev/vga.h memory/Makefile.in memory/memory.cc
    memory/memory.h memory/misc_mem.cc misc/bximage.c
    misc/niclist.c
Added Files:
    README-plugins extplugin.h ltdl.c ltdl.h ltdlconf.h.in
    ltmain.sh plugin.cc plugin.h
2002-10-24 21:07:56 +00:00
Stanislav Shwartsman
c5f0ef8c76 Removed duplicated definition of BX_SEG_REGS 2002-10-16 22:10:07 +00:00
Kevin Lawton
82fd79c546 Fixed/updated/cleaned repeat IO & memcpy speedups for Long mode.
Fixed/updated/cleaned guest2host TLB speedups for Long mode.

I now can boot the Linux x86-64 kernel to the VFS mount message,
using all the accelerations.
2002-09-24 04:43:59 +00:00
Kevin Lawton
0cd7346b9c - Added an instruction cache. Size is fixed for the moment,
but if you hand edit cpu/cpu.h, and change BxICacheEntries,
  you can try different sizes.  I'll make this more flexible
  with configure.  For now, use "--enable-icache" with no parameters.

- Modified fetchdecode.cc/fetchdecode64.cc just enough so that
  instructions which encode a direct address now use a memory
  resolution function which just sticks the immediate address
  into rm_addr.  With cached instructions we need this.
2002-09-19 19:17:20 +00:00
Kevin Lawton
4e51dcae40 Converted all the remaining available separate fields in bxInstruction_c
to bitfields.  bxInstruction_c is now 24 bytes, including 4 for
the memory addr resolution function pointer, and 4 for the
execution function pointer (16 + 4 + 4).

Coded more accessors, to abstract access from most code.
2002-09-18 08:00:43 +00:00
Kevin Lawton
6723ca9bf4 Moved more separate fields in the bxInstruction_c into bitfields
with accessors.  Had to touch a number of files to update the
access using the new accessors.

Moved rm_addr to the CPU structure, to slim down bxInstruction_c
and to prevent future instruction caching from getting sprayed
with writes to individual rm_addr fields.  There only needs to
be one.  Though need to deal with instructions which have
static non-modrm addresses, but which are using rm_addr since
that will change.

bxInstruction_c is down to about 40 bytes now.  Trying to
get down to 24 bytes.
2002-09-18 05:36:48 +00:00
Kevin Lawton
07b0df2a8a Updated accessing of modrm/sib addressing information to
use accessors.  This lets me work on compressing the
size of fetch-decode structure (now called bxInstruction_c).

I've reduced it down to about 76 bytes.  We should be able
to do much better soon.  I needed the abstraction of the
accessors, so I have a lot of freedom to re-arrange things
without making massive future changes.

Lost a few percent of performance in these mods, but my
main focus was to get the abstraction.
2002-09-17 22:50:53 +00:00
Kevin Lawton
5eb4e247bc Merged the final filed ("paging.cc") from Peter Tattam's x86-64
enhancement to bochs.  You can now configure with
--enable-guest2host-tlb.

Force the support of big pages (PSE) when x86-64 is configured.

Reverted back to only one kind of TLB entry style, since everything
is ported.

Fixed one bug in io.cc with as_64 and the index registers.
There are others, as noticed by Peter.
2002-09-16 20:23:38 +00:00
Kevin Lawton
80dd7a07ec Removed references to building libextdb.a. It doesn't seem to
be used at all, and Peter didn't want it.  "extdb.o" is compiled
into libcpu.a, if configured for it.

Removed a few #warnings for x86-64 compile, based on Peter's
line-item comments regarding the warnings I inserted during
the port/merge.
2002-09-15 15:10:21 +00:00
Kevin Lawton
918442ae4a (cpu64) Merged io.cc. 2002-09-15 02:55:34 +00:00
Bryce Denney
5fc31bcfda - this revision changes the way eflags are accessed throughout the cpu and
cpu64 directories.  Instead of using the macros introduced in cpu.h rev 1.37
  such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline
  methods on the BX_CPU_C object that access the eflags fields.  The problem
  with the macros is that they cannot be used outside the BX_CPU_C object.  The
  macros have now been removed, and all references to eflags now use these new
  accessors.
- I debated whether to put the accessors as members of the BX_CPU_C object
  or members of the bx_flags_reg_t struct.  I chose to make them members
  of BX_CPU_C for two reasons: 1. the lazy flags are implemented as
  members of BX_CPU_C, and 2. the eflags are referenced in many many places
  and it is more compact without having to put eflags in front of each.  (The
  real problem with compactness is having to write BX_CPU_THIS_PTR in front of
  everything, but that's another story.)
- Kevin pointed out a major bug in my set accessor code.  What a difference a
  little tilde can make!  That is fixed now.
- modified: load32bitOShack.cc debug/dbg_main.cc
  and in both cpu and cpu64 directories:
    cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc
    flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc
    string.cc vm8086.cc
2002-09-12 18:10:46 +00:00
Kevin Lawton
414e97bc32 Enhanced the repeat IO accelerations (enabled by --enable-repeat-speedups)
to request bulk IO operations to IO devices which are bulk IO aware.
Currently, I modified only harddrv.cc to be aware.  I added some
fields to the bx_devices_c class for the IO instructions to
place requests and receive responses from the IO device emulation.
Devices except the hard drive, don't monitor these fields so they
respond as normal.  The hard drive now monitors these fields for
bulk requests, and if enabled, it memcpy()'s data straight from
the disk buffer to memory.  This eliminates numerous inp/outp calling
sequences per disk sector.

I used the fields in bx_devices_c so that I would not have to
disrupt most IO device modules.  Enhancements can be made to
other devices if they use high-bandwidth IO via in/out instructions.
2002-09-09 16:56:56 +00:00
Kevin Lawton
0d7a5fdf3c I rehashed the way the EFLAGS register was stored internally.
All the EFLAGS bits used to be cached in separate fields.  I left
a few of them in separate fields for now - might remove them
at some point also.  When the arithmetic fields are known
(ie they're not in lazy mode), they are all cached in a
32-bit EFLAGS image, just like the x86 EFLAGS register expects.
All other eflags are store in the 32-bit register also, with
a few also mirrored in separate fields for now.

The reason I did this, was so that on x86 hosts, asm() statements
can be #ifdef'd in to do the calculation and get the native
eflags results very cheaply.  Just to test that it works, I
coded ADD_EdId() and ADD_EwIw() with some conditionally compiled
asm()s for accelerated eflags processing and it works.

-Kevin
2002-09-08 04:08:14 +00:00
Kevin Lawton
54bc40971c Fixed repeated IO/string instruction acceleration bug. Not all the
checks were honoring the EFLAGS.DF bit, but assuming it was always
equal to 0 (increment upward).  Plus some general cleanup of the
acceleration code.

I left the default of '--enable-repeat-speedups' to disabled, but
it seems pretty solid.  Definitely adds performance for disk
heavy workloads.
2002-09-03 19:38:27 +00:00
Kevin Lawton
746f09b427 There's a bug in the repeated IO & mem copy speedups. I
added --enable-repeat-speedups with default to disabled.
Reconfigure/recompile and the speedup code will be #ifdef'd
out for now.  It manifested as junk written to the VGA screen
while booting/running Windows.

Also made some more mods to the main cpu loop.  Moved the
handling of EXT/errorno outside the main loop, much like
the extra EIP/ESP commits were moved, for a little better
performance.

I changed the fetch_ptr/bytesleft method of fetching to
a slightly different model, which calculates a window
for which EIP will be valid (land on the current page),
and a bias which when applied to EIP will be from
0..upper_page_limit.  Speed is about the same for either
method, but a pseudo-op/threaded-interpreter will plug
in better with this and be faster.
2002-09-02 18:44:35 +00:00
Kevin Lawton
3a5f338419 Integrated patches for:
- Paging code rehash.  You must now use --enable-4meg-pages to
    use 4Meg pages, with the default of disabled, since we don't well
    support 4Meg pages yet.  Paging table walks model a real CPU
    more closely now, and I fixed some bugs in the old logic.
  - Segment check redundancy elimination.  After a segment is loaded,
    reads and writes are marked when a segment type check succeeds, and
    they are skipped thereafter, when possible.
  - Repeated IO and memory string copy acceleration.  Only some variants
    of instructions are available on all platforms, word and dword
    variants only on x86 for the moment due to alignment and endian issues.
    This is compiled in currently with no option - I should add a configure
    option.
  - Added a guest linear address to host TLB.  Actually, I just stick
    the host address (mem.vector[addr] address) in the upper 29 bits
    of the field 'combined_access' since they are unused.  Convenient
    for now.  I'm only storing page frame addresses.  This was the
    simplest for of such a TLB.  We can likely enhance this.  Also,
    I only accelerated the normal read/write routines in access.cc.
    Could also modify the read-modify-write versions too.  You must
    use --enable-guest2host-tlb, to try this out.  Currently speeds
    up Win95 boot time by about 3.5% for me.  More ground to cover...
  - Minor mods to CPUI/MOV_CdRd for CMOV.
  - Integrated enhancements from Volker to getHostMemAddr() for PCI
    being enabled.
2002-09-01 20:12:09 +00:00
Bryce Denney
daf2a9fb55 - add RCS Id to header of every file. This makes it easier to know what's
going on when someone sends in a modified file.
2001-10-03 13:10:38 +00:00
Bryce Denney
49664f7503 - parts of the SMP merge apparantly broke the debugger and this revision
tries to fix it.  The shortcuts to register names such as AX and DL are
  #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR.
  When BX_USE_CPU_SMF=1, this works fine.  (This is what bochs used for
  a long time, and nobody used the SMF=0 mode at all.)  To make SMP bochs
  work, I had to get SMF=0 mode working for the CPU so that there could
  be an array of cpus.

  When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which
  only works within methods of BX_CPU_C.  Code outside of BX_CPU_C must
  reference BX_CPU(num) instead.
- to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are
  now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined.  This is
  only done in the cpu/*.cc code.
2001-05-24 18:46:34 +00:00
Todd T.Fries
bdb89cd364 merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.

In general this provides a generic interface for logging.

logfunctions:: is a class that is inherited by some classes, and also
.   allocated as a standalone global called 'genlog'.  All logging uses
.   one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
.   class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
.   respectively.
.
.   An example usage:
.     BX_INFO(("Hello, World!\n"));

iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance.  It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf().  At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.

More cleanup is coming, but this works for now.  If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.

Comments, bugs, flames, to me: todd@fries.net
2001-05-15 14:49:57 +00:00
Bryce Denney
a6fef54678 - update copyright dates to 2001 for all mandrake headers
- for bochs files with other header, replaced with current mandrake header
2001-04-10 02:20:02 +00:00
cvs
beff63eb32 - entered original Bochs snapshot bochs-2000_0325a.tar.gz from
ftp.bochs.com
2001-04-10 01:04:59 +00:00