Stanislav Shwartsman
003c2f59e6
Added missed CVS header to several files
2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
24d4de03a1
- Fixed bug with missed ES segment override prefix
...
- Correctly disassemble x86-64 opcodes
Ia_cvttsd2si_Gq_Wsd
Ia_cvttss2si_Gq_Wss
Ia_cvtsd2si_Gq_Wsd
Ia_cvtss2si_Gq_Wss
Ia_movq_Pq_Eq
Ia_movq_Vdq_Eq
Ia_movq_Eq_Pq
Ia_movq_Eq_Vq
- Correctly disassemble Intel SSE3 opcodes (not supported by Bochs)
Ia_monitor
Ia_mwait
2006-01-31 17:42:31 +00:00
Stanislav Shwartsman
276c006129
Merge new disasm module with x96-64 support
2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
5af5d80602
Small disasm fixes
2005-10-23 20:43:32 +00:00
Stanislav Shwartsman
f375203fdb
preparations for x86-64 support in disasm
2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
a0efe5e577
small cleanup disasm code
...
implement branch taken/not taken indication for conditional Jcc insructions
2004-12-09 23:19:48 +00:00
Stanislav Shwartsman
9d1b401512
Fixed several disassembler bugs
...
Prepared for AT&T style support in Bochs disassembler
- it already supports all AT&T style except opcode name suffixes
- AT&T support in future will be possible to enable from bx_debugger
2004-12-08 18:54:15 +00:00
Stanislav Shwartsman
31f5ceb522
everal fixes in disasm
2004-10-22 22:56:59 +00:00
Stanislav Shwartsman
21f43f42fa
Some preparations and cleanups for future x86-64
2004-10-17 22:05:17 +00:00
Stanislav Shwartsman
fc1473cb8c
Update changes
...
dos2unix cleanup
2003-12-24 20:44:39 +00:00
Stanislav Shwartsman
ab6b9c7dcb
New table-based disassembler:
...
* Fully supports
* MMX/XMM/3DNOW instruction sets
* FPU instruction
* SSE3 extensions
currently only 16/32 bit mode bug anyway, it is much better that old one ;)
2003-12-24 20:32:59 +00:00
