Commit Graph

10 Commits

Author SHA1 Message Date
Stanislav Shwartsman
720a9b2fb7 fixed 64-bit segment print from internal debugger 2012-06-14 18:56:47 +00:00
Stanislav Shwartsman
7defa74261 cleaned up code duplication in CPUDB classes 2012-01-07 17:06:03 +00:00
Stanislav Shwartsman
e2f0880f1c support more than 32-bit cpu features vector 2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
1b27438146 cleanups + small code reorg 2011-08-10 20:31:29 +00:00
Stanislav Shwartsman
360481b391 infastructure for RDMSR/WRMSR control for cpuid class
now the order is going to be:

1. MSRs emulated in Bochs (msr.cc)
2. MSRs emulated in model specific derivative class of cpuid_t
3. MSR can be loaded from msrs.def file
4. MSR is not found. We can fault or ignore based on ignore_bad_msrs option
2011-08-09 22:11:56 +00:00
Stanislav Shwartsman
b9a44a9dbf added const to all cpudb methods 2011-08-01 18:10:48 +00:00
Stanislav Shwartsman
1d89709e62 Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
Reimplemented CPUDB using pure C macros magic.
Fixed compilation errors when compiling with SMP on.
2011-07-31 18:43:46 +00:00
Stanislav Shwartsman
6e6db04b8f Fixed compilation errors, dos2unix, added missed p3_katmai.txt 2011-07-31 14:56:45 +00:00
Stanislav Shwartsman
5e291e0860 Added Athlon64 Clawhammer CPUID to CPUDB 2011-07-30 21:28:16 +00:00
Stanislav Shwartsman
1a051f9f00 Added several predefined CPUs that can be selected from .bochsrc using new CPU::MODEL option.
Selecting CPU MODEL from .bochsrc automatically chooses real HW CPUID and also configures Bochs emulator to emulate this specific CPU including all its features only.
Supported CPUs to choose from:
	core2_extreme_x9770
	corei7_sandy_bridge_2600K
	p4_prescott_celeron_336
2011-07-29 15:03:54 +00:00