2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2005-01-30 02:29:08 +03:00
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// $Id: misc_mem.cc,v 1.58 2005-01-29 23:29:08 vruppert Exp $
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2002-08-17 13:46:27 +04:00
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// Copyright (C) 2002 MandrakeSoft S.A.
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2001-04-10 05:04:59 +04:00
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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2004-01-15 05:08:37 +03:00
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// I/O memory handlers API Copyright (C) 2003 by Frank Cornelis
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//
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2001-04-10 05:04:59 +04:00
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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2004-06-19 19:20:15 +04:00
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#include "iodev/iodev.h"
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2001-05-23 12:02:15 +04:00
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#define LOG_THIS BX_MEM(0)->
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2001-04-10 05:04:59 +04:00
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#if BX_PROVIDE_CPU_MEMORY
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2004-10-21 22:20:40 +04:00
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2004-06-19 19:20:15 +04:00
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Bit32u BX_MEM_C::get_memory_in_k(void)
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2001-04-10 05:04:59 +04:00
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{
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return(BX_MEM_THIS megabytes * 1024);
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}
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// BX_MEM_C constructor
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BX_MEM_C::BX_MEM_C(void)
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{
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2001-06-20 01:36:09 +04:00
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char mem[6];
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snprintf(mem, 6, "MEM%d", BX_SIM_ID);
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2001-06-27 23:16:01 +04:00
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put(mem);
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merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.
In general this provides a generic interface for logging.
logfunctions:: is a class that is inherited by some classes, and also
. allocated as a standalone global called 'genlog'. All logging uses
. one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
. class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
. respectively.
.
. An example usage:
. BX_INFO(("Hello, World!\n"));
iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance. It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf(). At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.
More cleanup is coming, but this works for now. If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.
Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
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settype(MEMLOG);
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2001-05-23 12:02:15 +04:00
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vector = NULL;
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2002-09-18 09:28:55 +04:00
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actual_vector = NULL;
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2001-05-23 12:02:15 +04:00
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len = 0;
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megabytes = 0;
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2004-01-15 05:08:37 +03:00
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memory_handlers = NULL;
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2001-04-10 05:04:59 +04:00
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}
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2003-03-03 02:59:12 +03:00
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void BX_CPP_AttrRegparmN(2)
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2002-09-04 06:11:33 +04:00
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BX_MEM_C::alloc_vector_aligned (size_t bytes, size_t alignment)
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{
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if (actual_vector != NULL) {
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BX_INFO (("freeing existing memory vector"));
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delete [] actual_vector;
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actual_vector = NULL;
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vector = NULL;
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}
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Bit64u test_mask = alignment - 1;
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actual_vector = new Bit8u [bytes+test_mask];
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// round address forward to nearest multiple of alignment. Alignment
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// MUST BE a power of two for this to work.
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2003-06-07 23:16:55 +04:00
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Bit64u masked = ((Bit64u)(actual_vector + test_mask)) & ~test_mask;
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2002-09-04 06:11:33 +04:00
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vector = (Bit8u *)masked;
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// sanity check: no lost bits during pointer conversion
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BX_ASSERT (sizeof(masked) >= sizeof(vector));
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// sanity check: after realignment, everything fits in allocated space
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BX_ASSERT (vector+bytes <= actual_vector+bytes+test_mask);
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BX_INFO (("allocated memory at %p. after alignment, vector=%p",
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actual_vector, vector));
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}
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2001-04-10 05:04:59 +04:00
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// BX_MEM_C destructor
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BX_MEM_C::~BX_MEM_C(void)
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{
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if (this-> vector != NULL) {
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2002-09-04 06:11:33 +04:00
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delete [] actual_vector;
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actual_vector = NULL;
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vector = NULL;
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2004-01-15 05:08:37 +03:00
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delete [] memory_handlers;
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memory_handlers = NULL;
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2001-04-10 05:04:59 +04:00
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}
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else {
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2001-05-30 22:56:02 +04:00
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BX_DEBUG(("(%u) memory not freed as it wasn't allocated!", BX_SIM_ID));
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2001-04-10 05:04:59 +04:00
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}
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}
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2004-10-21 22:20:40 +04:00
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void BX_MEM_C::init_memory(int memsize)
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2001-04-10 05:04:59 +04:00
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{
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2004-09-01 22:12:23 +04:00
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int idx;
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2005-01-30 02:29:08 +03:00
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BX_DEBUG(("Init $Id: misc_mem.cc,v 1.58 2005-01-29 23:29:08 vruppert Exp $"));
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2001-04-10 05:04:59 +04:00
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// you can pass 0 if memory has been allocated already through
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// the constructor, or the desired size of memory if it hasn't
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2003-08-05 17:19:35 +04:00
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// BX_INFO(("%.2fMB", (float)(BX_MEM_THIS megabytes) ));
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2001-04-10 05:04:59 +04:00
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if (BX_MEM_THIS vector == NULL) {
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// memory not already allocated, do now...
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2004-11-16 21:50:21 +03:00
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alloc_vector_aligned (memsize + (1 << 18) + 4096, BX_MEM_VECTOR_ALIGN);
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2001-04-10 05:04:59 +04:00
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BX_MEM_THIS len = memsize;
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BX_MEM_THIS megabytes = memsize / (1024*1024);
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2004-01-15 05:08:37 +03:00
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BX_MEM_THIS memory_handlers = new struct memory_handler_struct *[1024 * 1024];
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2004-11-16 21:50:21 +03:00
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BX_MEM_THIS rom = &BX_MEM_THIS vector[memsize];
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BX_MEM_THIS bogus = &BX_MEM_THIS vector[memsize + (1 << 18)];
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memset(BX_MEM_THIS rom, 0xff, (1 << 18));
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memset(BX_MEM_THIS bogus, 0xff, 4096);
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2004-09-01 22:12:23 +04:00
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for (idx = 0; idx < 1024 * 1024; idx++)
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2004-01-15 05:08:37 +03:00
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BX_MEM_THIS memory_handlers[idx] = NULL;
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2004-09-01 22:12:23 +04:00
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for (idx = 0; idx < 65; idx++)
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BX_MEM_THIS rom_present[idx] = 0;
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2001-11-11 08:07:05 +03:00
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BX_INFO(("%.2fMB", (float)(BX_MEM_THIS megabytes) ));
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2001-04-10 05:04:59 +04:00
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}
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2002-08-31 16:24:41 +04:00
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2001-04-10 05:04:59 +04:00
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#if BX_DEBUGGER
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2001-05-23 12:02:15 +04:00
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if (megabytes > BX_MAX_DIRTY_PAGE_TABLE_MEGS) {
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2001-05-30 22:56:02 +04:00
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BX_INFO(("Error: memory larger than dirty page table can handle"));
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BX_PANIC(("Error: increase BX_MAX_DIRTY_PAGE_TABLE_MEGS"));
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2001-04-10 05:04:59 +04:00
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}
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#endif
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}
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2004-10-21 22:20:40 +04:00
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//
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// Values for type:
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// 0 : System Bios
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// 1 : VGA Bios
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// 2 : Optional ROM Bios
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//
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2001-04-10 05:04:59 +04:00
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2004-10-21 22:20:40 +04:00
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void BX_MEM_C::load_ROM(const char *path, Bit32u romaddress, Bit8u type)
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2001-04-10 05:04:59 +04:00
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{
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struct stat stat_buf;
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2004-09-01 22:12:23 +04:00
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int fd, ret, i, start_idx, end_idx;
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2004-08-26 11:58:33 +04:00
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unsigned long size, max_size, offset;
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2001-04-10 05:04:59 +04:00
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2003-04-02 21:03:34 +04:00
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if (*path == '\0') {
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2003-08-05 17:19:35 +04:00
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if (type == 2) {
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2004-08-26 11:58:33 +04:00
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BX_PANIC(( "ROM: Optional ROM image undefined"));
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2003-04-02 21:03:34 +04:00
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}
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2003-08-05 17:19:35 +04:00
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else if (type == 1) {
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2004-08-26 11:58:33 +04:00
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BX_PANIC(( "ROM: VGA BIOS image undefined"));
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2003-04-02 21:03:34 +04:00
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}
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2003-08-05 17:19:35 +04:00
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else {
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2004-08-26 11:58:33 +04:00
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BX_PANIC(( "ROM: System BIOS image undefined"));
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2003-08-05 17:19:35 +04:00
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}
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2002-07-03 21:13:29 +04:00
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return;
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2003-04-02 21:03:34 +04:00
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}
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2001-04-10 05:04:59 +04:00
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// read in ROM BIOS image file
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fd = open(path, O_RDONLY
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#ifdef O_BINARY
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| O_BINARY
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#endif
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);
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if (fd < 0) {
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2003-08-06 12:24:14 +04:00
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if (type < 2) {
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2003-04-02 21:03:34 +04:00
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BX_PANIC(( "ROM: couldn't open ROM image file '%s'.", path));
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}
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else {
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BX_ERROR(( "ROM: couldn't open ROM image file '%s'.", path));
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}
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2002-09-03 20:44:33 +04:00
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return;
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2001-04-10 05:04:59 +04:00
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}
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ret = fstat(fd, &stat_buf);
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if (ret) {
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2003-08-06 12:24:14 +04:00
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if (type < 2) {
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2003-04-02 21:03:34 +04:00
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BX_PANIC(( "ROM: couldn't stat ROM image file '%s'.", path));
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}
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else {
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BX_ERROR(( "ROM: couldn't stat ROM image file '%s'.", path));
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}
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2002-09-03 20:44:33 +04:00
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return;
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2001-04-10 05:04:59 +04:00
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}
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size = stat_buf.st_size;
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2004-08-26 11:58:33 +04:00
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if (type > 0) {
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max_size = 0x10000;
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} else {
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max_size = 0x20000;
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}
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if (size > max_size) {
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2004-09-01 22:12:23 +04:00
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close(fd);
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2004-08-26 11:58:33 +04:00
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BX_PANIC(("ROM: ROM image too large"));
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2002-09-03 20:44:33 +04:00
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return;
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2004-08-26 11:58:33 +04:00
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}
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if (type == 0) {
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if ( (romaddress + size) != 0x100000 ) {
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2004-09-01 22:12:23 +04:00
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close(fd);
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2004-08-31 01:47:24 +04:00
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BX_PANIC(("ROM: System BIOS must end at 0xfffff"));
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2004-08-26 11:58:33 +04:00
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return;
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}
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2004-09-01 22:12:23 +04:00
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if (romaddress < 0xf0000 ) {
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BX_MEM_THIS rom_present[64] = 1;
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}
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2004-08-26 11:58:33 +04:00
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} else {
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2004-09-01 22:12:23 +04:00
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if ((size % 512) != 0) {
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2004-09-02 22:24:50 +04:00
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close(fd);
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BX_PANIC(("ROM: ROM image size must be multiple of 512 (size = %ld)", size));
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return;
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2004-09-01 22:12:23 +04:00
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}
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2004-08-26 11:58:33 +04:00
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if ((romaddress % 2048) != 0) {
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2004-09-01 22:12:23 +04:00
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close(fd);
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2004-08-26 11:58:33 +04:00
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BX_PANIC(("ROM: ROM image must start at a 2k boundary"));
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return;
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}
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2004-09-01 22:12:23 +04:00
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if ((romaddress < 0xc0000) || (romaddress > 0xe0000)) {
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close(fd);
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2004-08-26 11:58:33 +04:00
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BX_PANIC(("ROM: ROM address space out of range"));
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return;
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}
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2004-09-01 22:12:23 +04:00
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start_idx = ((romaddress - 0xc0000) >> 11);
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end_idx = start_idx + (size >> 11) + (((size % 2048) > 0) ? 1 : 0);
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if (end_idx > 65) end_idx = 65;
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for (i = start_idx; i < end_idx; i++) {
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if (BX_MEM_THIS rom_present[i]) {
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close(fd);
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BX_PANIC(("ROM: address space already in use"));
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return;
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} else {
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BX_MEM_THIS rom_present[i] = 1;
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}
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}
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2004-08-26 11:58:33 +04:00
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}
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2001-04-10 05:04:59 +04:00
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offset = 0;
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while (size > 0) {
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2004-11-11 23:55:29 +03:00
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ret = read(fd, (bx_ptr_t) &BX_MEM_THIS rom[romaddress - 0xc0000 + offset], size);
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2001-04-10 05:04:59 +04:00
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if (ret <= 0) {
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2001-05-30 22:56:02 +04:00
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BX_PANIC(( "ROM: read failed on BIOS image: '%s'",path));
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2001-04-10 05:04:59 +04:00
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}
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size -= ret;
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offset += ret;
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}
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close(fd);
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2004-09-02 22:24:50 +04:00
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Bit8u checksum = 0;
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for (i = 0; i < stat_buf.st_size; i++) {
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2004-11-11 23:55:29 +03:00
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checksum += BX_MEM_THIS rom[romaddress - 0xc0000 + i];
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2004-09-02 22:24:50 +04:00
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}
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if (checksum != 0) {
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if (type < 2) {
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BX_PANIC(( "ROM: checksum error in BIOS image: '%s'",path));
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} else {
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BX_ERROR(( "ROM: checksum error in BIOS image: '%s'",path));
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}
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}
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2001-08-31 20:06:32 +04:00
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BX_INFO(("rom at 0x%05x/%u ('%s')",
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merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.
In general this provides a generic interface for logging.
logfunctions:: is a class that is inherited by some classes, and also
. allocated as a standalone global called 'genlog'. All logging uses
. one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
. class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
. respectively.
.
. An example usage:
. BX_INFO(("Hello, World!\n"));
iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance. It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf(). At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.
More cleanup is coming, but this works for now. If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.
Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
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(unsigned) romaddress,
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(unsigned) stat_buf.st_size,
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2004-08-31 01:47:24 +04:00
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path));
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
#endif // #if BX_PROVIDE_CPU_MEMORY
|
|
|
|
|
|
|
|
|
2002-10-03 09:15:28 +04:00
|
|
|
#if ( BX_DEBUGGER || BX_DISASM || BX_GDBSTUB)
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool
|
2001-04-10 05:04:59 +04:00
|
|
|
BX_MEM_C::dbg_fetch_mem(Bit32u addr, unsigned len, Bit8u *buf)
|
|
|
|
{
|
2004-11-16 21:50:21 +03:00
|
|
|
bx_bool ret = 1;
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
for (; len>0; len--) {
|
2004-11-11 23:55:29 +03:00
|
|
|
if ( (addr & 0xfffe0000) == 0x000a0000 )
|
2002-10-25 01:07:56 +04:00
|
|
|
*buf = DEV_vga_mem_read(addr);
|
2004-11-11 23:55:29 +03:00
|
|
|
#if BX_SUPPORT_PCI
|
|
|
|
else if ( bx_options.Oi440FXSupport->get () &&
|
|
|
|
((addr & 0xfffc0000) == 0x000c0000) )
|
|
|
|
{
|
|
|
|
switch (DEV_pci_rd_memtype (addr)) {
|
|
|
|
case 0x0: // Read from ROM
|
|
|
|
*buf = rom[addr - 0xc0000];
|
|
|
|
break;
|
|
|
|
case 0x1: // Read from ShadowRAM
|
|
|
|
*buf = vector[addr];
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BX_PANIC(("dbg_fetch_mem: default case"));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif // #if BX_SUPPORT_PCI
|
2004-11-14 17:06:43 +03:00
|
|
|
else if (addr >= 0xfffe0000)
|
|
|
|
{
|
|
|
|
*buf = rom[addr & 0x3ffff];
|
|
|
|
}
|
2004-11-16 21:50:21 +03:00
|
|
|
else if (addr < this->len)
|
2004-11-11 23:55:29 +03:00
|
|
|
{
|
|
|
|
if ( (addr & 0xfffc0000) == 0x000c0000 ) {
|
|
|
|
*buf = rom[addr - 0xc0000];
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else
|
2004-11-11 23:55:29 +03:00
|
|
|
{
|
2001-05-23 12:02:15 +04:00
|
|
|
*buf = vector[addr];
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
2004-11-16 21:50:21 +03:00
|
|
|
else
|
|
|
|
{
|
|
|
|
*buf = 0xff;
|
|
|
|
ret = 0; // error, beyond limits of memory
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
buf++;
|
|
|
|
addr++;
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
2004-11-16 21:50:21 +03:00
|
|
|
return ret;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2002-10-03 09:15:28 +04:00
|
|
|
#if BX_DEBUGGER || BX_GDBSTUB
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool
|
2001-04-10 05:04:59 +04:00
|
|
|
BX_MEM_C::dbg_set_mem(Bit32u addr, unsigned len, Bit8u *buf)
|
|
|
|
{
|
2001-05-23 12:02:15 +04:00
|
|
|
if ( (addr + len) > this->len ) {
|
2001-04-10 05:04:59 +04:00
|
|
|
return(0); // error, beyond limits of memory
|
|
|
|
}
|
|
|
|
for (; len>0; len--) {
|
2004-11-11 23:55:29 +03:00
|
|
|
if ( (addr & 0xfffe0000) == 0x000a0000 )
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_vga_mem_write(addr, *buf);
|
2004-11-11 23:55:29 +03:00
|
|
|
#if BX_SUPPORT_PCI
|
|
|
|
else if ( bx_options.Oi440FXSupport->get () &&
|
|
|
|
((addr & 0xfffc0000) == 0x000c0000) )
|
|
|
|
{
|
|
|
|
switch (DEV_pci_wr_memtype (addr)) {
|
|
|
|
case 0x0: // Ignore write to ROM
|
|
|
|
break;
|
|
|
|
case 0x1: // Write to ShadowRAM
|
|
|
|
vector[addr] = *buf;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BX_PANIC(("dbg_fetch_mem: default case"));
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
|
|
|
#endif // #if BX_SUPPORT_PCI
|
|
|
|
else if ( (addr & 0xfffc0000) != 0x000c0000 )
|
|
|
|
{
|
2001-05-23 12:02:15 +04:00
|
|
|
vector[addr] = *buf;
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
buf++;
|
|
|
|
addr++;
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
return(1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool
|
2001-04-10 05:04:59 +04:00
|
|
|
BX_MEM_C::dbg_crc32(unsigned long (*f)(unsigned char *buf, int len),
|
|
|
|
Bit32u addr1, Bit32u addr2, Bit32u *crc)
|
|
|
|
{
|
|
|
|
unsigned len;
|
|
|
|
|
|
|
|
*crc = 0;
|
|
|
|
if (addr1 > addr2)
|
|
|
|
return(0);
|
|
|
|
|
2001-05-23 12:02:15 +04:00
|
|
|
if (addr2 >= this->len) {
|
2001-04-10 05:04:59 +04:00
|
|
|
return(0); // error, specified address past last phy mem addr
|
|
|
|
}
|
|
|
|
|
|
|
|
len = 1 + addr2 - addr1;
|
2001-05-23 12:02:15 +04:00
|
|
|
*crc = f(vector + addr1, len);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
return(1);
|
|
|
|
}
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
|
2004-10-30 01:15:48 +04:00
|
|
|
//
|
|
|
|
// Return a host address corresponding to the guest physical memory
|
|
|
|
// address (with A20 already applied), given that the calling
|
|
|
|
// code will perform an 'op' operation. This address will be
|
|
|
|
// used for direct access to guest memory as an acceleration by
|
|
|
|
// a few instructions, like REP {MOV, INS, OUTS, etc}.
|
|
|
|
// Values of 'op' are { BX_READ, BX_WRITE, BX_RW }.
|
|
|
|
//
|
|
|
|
// The other assumption is that the calling code _only_ accesses memory
|
|
|
|
// directly within the page that encompasses the address requested.
|
|
|
|
//
|
|
|
|
|
2003-03-03 02:59:12 +03:00
|
|
|
Bit8u * BX_CPP_AttrRegparmN(3)
|
2002-09-19 23:17:20 +04:00
|
|
|
BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op)
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
{
|
2004-10-30 01:15:48 +04:00
|
|
|
|
2004-10-21 22:20:40 +04:00
|
|
|
#if BX_SUPPORT_APIC
|
|
|
|
bx_generic_apic_c *local_apic = &cpu->local_apic;
|
|
|
|
if (local_apic->get_base () == (a20Addr & ~0xfff))
|
|
|
|
return(NULL); // Vetoed! APIC address space
|
|
|
|
bx_generic_apic_c *ioapic = bx_devices.ioapic;
|
|
|
|
if (ioapic->get_base () == (a20Addr & ~0xfff))
|
|
|
|
return(NULL); // Vetoed! IOAPIC address space
|
|
|
|
#endif
|
2004-10-30 01:15:48 +04:00
|
|
|
|
2005-01-30 02:29:08 +03:00
|
|
|
struct memory_handler_struct *memory_handler = memory_handlers[a20Addr >> 20];
|
|
|
|
while (memory_handler) {
|
|
|
|
if (memory_handler->begin <= a20Addr &&
|
|
|
|
memory_handler->end >= a20Addr) {
|
|
|
|
return(NULL); // Vetoed! memory handler for vram, mmio and PCI PnP
|
|
|
|
}
|
|
|
|
memory_handler = memory_handler->next;
|
|
|
|
}
|
|
|
|
|
2004-10-30 01:15:48 +04:00
|
|
|
if (op == BX_READ) {
|
2004-11-11 23:55:29 +03:00
|
|
|
if ( (a20Addr & 0xfffe0000) == 0x000a0000 )
|
2004-10-30 01:15:48 +04:00
|
|
|
return(NULL); // Vetoed! Mem mapped IO (VGA)
|
2004-11-11 23:55:29 +03:00
|
|
|
#if BX_SUPPORT_PCI
|
|
|
|
else if ( bx_options.Oi440FXSupport->get () &&
|
|
|
|
((a20Addr & 0xfffc0000) == 0x000c0000) )
|
|
|
|
{
|
2002-11-03 20:17:11 +03:00
|
|
|
switch (DEV_pci_rd_memtype (a20Addr)) {
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
case 0x0: // Read from ROM
|
2004-11-11 23:55:29 +03:00
|
|
|
return( (Bit8u *) & rom[a20Addr - 0xc0000]);
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
case 0x1: // Read from ShadowRAM
|
2004-11-11 23:55:29 +03:00
|
|
|
return( (Bit8u *) & vector[a20Addr]);
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
default:
|
|
|
|
BX_PANIC(("getHostMemAddr(): default case"));
|
|
|
|
return(0);
|
|
|
|
}
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
#endif
|
2004-11-14 17:06:43 +03:00
|
|
|
else if (a20Addr >= 0xfffe0000)
|
|
|
|
{
|
|
|
|
return( (Bit8u *) & rom[a20Addr & 0x3ffff]);
|
|
|
|
}
|
2004-11-16 21:50:21 +03:00
|
|
|
else if (a20Addr < BX_MEM_THIS len)
|
2004-11-11 23:55:29 +03:00
|
|
|
{
|
|
|
|
if ( (a20Addr & 0xfffc0000) == 0x000c0000 ) {
|
|
|
|
return( (Bit8u *) & rom[a20Addr - 0xc0000]);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return( (Bit8u *) & vector[a20Addr]);
|
|
|
|
}
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
}
|
2004-11-16 21:50:21 +03:00
|
|
|
else
|
|
|
|
{
|
|
|
|
// Error, requested addr is out of bounds.
|
|
|
|
return( (Bit8u *) & bogus[a20Addr & 0x0fff]);
|
|
|
|
}
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{ // op == {BX_WRITE, BX_RW}
|
2002-09-19 23:17:20 +04:00
|
|
|
Bit8u *retAddr;
|
2004-11-16 21:50:21 +03:00
|
|
|
if ( a20Addr >= BX_MEM_THIS len )
|
|
|
|
return(NULL); // Error, requested addr is out of bounds.
|
2004-11-11 23:55:29 +03:00
|
|
|
if ( (a20Addr & 0xfffe0000) == 0x000a0000 )
|
|
|
|
return(NULL); // Vetoed! Mem mapped IO (VGA)
|
|
|
|
#if BX_SUPPORT_PCI
|
|
|
|
else if ( bx_options.Oi440FXSupport->get () &&
|
|
|
|
((a20Addr & 0xfffc0000) == 0x000c0000) )
|
|
|
|
{
|
|
|
|
switch (DEV_pci_wr_memtype (a20Addr)) {
|
|
|
|
case 0x0: // Vetoed! ROMs
|
|
|
|
return(NULL);
|
|
|
|
case 0x1: // Write to ShadowRAM
|
|
|
|
retAddr = (Bit8u *) & vector[a20Addr];
|
2004-11-28 11:54:59 +03:00
|
|
|
break;
|
2004-11-11 23:55:29 +03:00
|
|
|
default:
|
|
|
|
BX_PANIC(("getHostMemAddr(): default case"));
|
|
|
|
return(0);
|
|
|
|
}
|
2004-10-21 22:20:40 +04:00
|
|
|
}
|
2004-11-11 23:55:29 +03:00
|
|
|
#endif
|
2002-09-19 23:17:20 +04:00
|
|
|
else
|
2004-11-11 23:55:29 +03:00
|
|
|
{
|
|
|
|
if ( (a20Addr & 0xfffc0000) != 0x000c0000 ) {
|
|
|
|
retAddr = (Bit8u *) & vector[a20Addr];
|
2002-09-19 23:17:20 +04:00
|
|
|
}
|
2004-11-11 23:55:29 +03:00
|
|
|
else
|
|
|
|
{
|
|
|
|
return(NULL); // Vetoed! ROMs
|
|
|
|
}
|
|
|
|
}
|
2002-09-19 23:17:20 +04:00
|
|
|
|
2004-07-30 00:15:19 +04:00
|
|
|
#if BX_SUPPORT_ICACHE
|
2004-10-21 22:20:40 +04:00
|
|
|
cpu->iCache.decWriteStamp(a20Addr);
|
2002-09-19 23:17:20 +04:00
|
|
|
#endif
|
|
|
|
|
|
|
|
return(retAddr);
|
2004-11-11 23:55:29 +03:00
|
|
|
}
|
Integrated patches for:
- Paging code rehash. You must now use --enable-4meg-pages to
use 4Meg pages, with the default of disabled, since we don't well
support 4Meg pages yet. Paging table walks model a real CPU
more closely now, and I fixed some bugs in the old logic.
- Segment check redundancy elimination. After a segment is loaded,
reads and writes are marked when a segment type check succeeds, and
they are skipped thereafter, when possible.
- Repeated IO and memory string copy acceleration. Only some variants
of instructions are available on all platforms, word and dword
variants only on x86 for the moment due to alignment and endian issues.
This is compiled in currently with no option - I should add a configure
option.
- Added a guest linear address to host TLB. Actually, I just stick
the host address (mem.vector[addr] address) in the upper 29 bits
of the field 'combined_access' since they are unused. Convenient
for now. I'm only storing page frame addresses. This was the
simplest for of such a TLB. We can likely enhance this. Also,
I only accelerated the normal read/write routines in access.cc.
Could also modify the read-modify-write versions too. You must
use --enable-guest2host-tlb, to try this out. Currently speeds
up Win95 boot time by about 3.5% for me. More ground to cover...
- Minor mods to CPUI/MOV_CdRd for CMOV.
- Integrated enhancements from Volker to getHostMemAddr() for PCI
being enabled.
2002-09-02 00:12:09 +04:00
|
|
|
}
|
2004-01-15 05:08:37 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* One needs to provide both a read_handler and a write_handler.
|
|
|
|
* XXX: maybe we should check for overlapping memory handlers
|
|
|
|
*/
|
|
|
|
bx_bool
|
|
|
|
BX_MEM_C::registerMemoryHandlers(memory_handler_t read_handler, void *read_param,
|
|
|
|
memory_handler_t write_handler, void *write_param,
|
|
|
|
unsigned long begin_addr, unsigned long end_addr)
|
|
|
|
{
|
|
|
|
if (end_addr < begin_addr)
|
|
|
|
return false;
|
|
|
|
if (!read_handler)
|
|
|
|
return false;
|
|
|
|
if (!write_handler)
|
|
|
|
return false;
|
2004-06-06 21:01:19 +04:00
|
|
|
for (unsigned page_idx = begin_addr >> 20; page_idx <= end_addr >> 20; page_idx++) {
|
2004-01-15 05:08:37 +03:00
|
|
|
struct memory_handler_struct *memory_handler = new struct memory_handler_struct;
|
|
|
|
memory_handler->next = memory_handlers[page_idx];
|
|
|
|
memory_handlers[page_idx] = memory_handler;
|
|
|
|
memory_handler->read_handler = read_handler;
|
|
|
|
memory_handler->write_handler = write_handler;
|
|
|
|
memory_handler->read_param = read_param;
|
|
|
|
memory_handler->write_param = write_param;
|
|
|
|
memory_handler->begin = begin_addr;
|
|
|
|
memory_handler->end = end_addr;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bx_bool
|
|
|
|
BX_MEM_C::unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler_t write_handler,
|
|
|
|
unsigned long begin_addr, unsigned long end_addr)
|
|
|
|
{
|
|
|
|
bx_bool ret = true;
|
2004-06-06 21:01:19 +04:00
|
|
|
for (unsigned page_idx = begin_addr >> 20; page_idx <= end_addr >> 20; page_idx++) {
|
2004-01-15 05:08:37 +03:00
|
|
|
struct memory_handler_struct *memory_handler = memory_handlers[page_idx];
|
|
|
|
struct memory_handler_struct *prev = NULL;
|
|
|
|
while (memory_handler &&
|
|
|
|
memory_handler->read_handler != read_handler &&
|
|
|
|
memory_handler->write_handler != write_handler &&
|
|
|
|
memory_handler->begin != begin_addr &&
|
|
|
|
memory_handler->end != end_addr) {
|
|
|
|
prev = memory_handler;
|
|
|
|
memory_handler = memory_handler->next;
|
|
|
|
}
|
|
|
|
if (!memory_handler) {
|
|
|
|
ret = false; // we should have found it
|
|
|
|
continue; // anyway, try the other pages
|
|
|
|
}
|
|
|
|
if (prev)
|
|
|
|
prev->next = memory_handler->next;
|
|
|
|
else
|
|
|
|
memory_handlers[page_idx] = memory_handler->next;
|
|
|
|
delete memory_handler;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|