2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2002-09-23 04:27:18 +04:00
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// $Id: arith8.cc,v 1.14 2002-09-23 00:27:18 kevinlawton Exp $
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2001-04-10 06:20:02 +04:00
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// Copyright (C) 2001 MandrakeSoft S.A.
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2001-04-10 05:04:59 +04:00
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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2001-05-24 22:46:34 +04:00
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#define NEED_CPU_REG_SHORTCUTS 1
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2001-04-10 05:04:59 +04:00
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#include "bochs.h"
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merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.
In general this provides a generic interface for logging.
logfunctions:: is a class that is inherited by some classes, and also
. allocated as a standalone global called 'genlog'. All logging uses
. one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
. class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
. respectively.
.
. An example usage:
. BX_INFO(("Hello, World!\n"));
iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance. It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf(). At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.
More cleanup is coming, but this works for now. If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.
Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
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#define LOG_THIS BX_CPU_THIS_PTR
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2001-04-10 05:04:59 +04:00
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::ADD_EbGb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op2, op1, sum;
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2002-09-18 09:36:48 +04:00
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/* op2 is a register, RMAddr(i) is an index of a register */
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op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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/* op1 is a register or memory reference */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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}
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else {
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2002-09-18 09:36:48 +04:00
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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2001-04-10 05:04:59 +04:00
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}
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sum = op1 + op2;
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/* now write sum back to destination */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), sum);
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2001-04-10 05:04:59 +04:00
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}
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else {
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2002-09-07 01:54:58 +04:00
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Write_RMW_virtual_byte(sum);
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2001-04-10 05:04:59 +04:00
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}
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SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD8);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::ADD_GbEb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op1, op2, sum;
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2002-09-18 09:36:48 +04:00
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/* op1 is a register, RMAddr(i) is an index of a register */
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op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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/* op2 is a register or memory reference */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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}
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else {
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/* pointer, segment address pair */
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2002-09-18 09:36:48 +04:00
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read_virtual_byte(i->seg(), RMAddr(i), &op2);
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2001-04-10 05:04:59 +04:00
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}
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sum = op1 + op2;
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/* now write sum back to destination, which is a register */
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2002-09-18 09:36:48 +04:00
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), sum);
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2001-04-10 05:04:59 +04:00
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SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD8);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::ADD_ALIb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op1, op2, sum;
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op1 = AL;
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2002-09-18 02:50:53 +04:00
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op2 = i->Ib();
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2001-04-10 05:04:59 +04:00
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sum = op1 + op2;
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/* now write sum back to destination, which is a register */
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AL = sum;
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SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD8);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::ADC_EbGb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op2, op1, sum;
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Boolean temp_CF;
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2002-09-22 22:22:24 +04:00
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temp_CF = !!get_CF();
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2001-04-10 05:04:59 +04:00
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2002-09-18 09:36:48 +04:00
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/* op2 is a register, RMAddr(i) is an index of a register */
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op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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/* op1 is a register or memory reference */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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}
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else {
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/* pointer, segment address pair */
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2002-09-18 09:36:48 +04:00
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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2001-04-10 05:04:59 +04:00
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}
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sum = op1 + op2 + temp_CF;
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/* now write sum back to destination */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), sum);
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2001-04-10 05:04:59 +04:00
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}
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else {
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2002-09-07 01:54:58 +04:00
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Write_RMW_virtual_byte(sum);
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2001-04-10 05:04:59 +04:00
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}
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SET_FLAGS_OSZAPC_8_CF(op1, op2, sum, BX_INSTR_ADC8, temp_CF);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::ADC_GbEb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op1, op2, sum;
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Boolean temp_CF;
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2002-09-22 22:22:24 +04:00
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temp_CF = !!get_CF();
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2001-04-10 05:04:59 +04:00
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2002-09-18 09:36:48 +04:00
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/* op1 is a register, RMAddr(i) is an index of a register */
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op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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/* op2 is a register or memory reference */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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}
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else {
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/* pointer, segment address pair */
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2002-09-18 09:36:48 +04:00
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read_virtual_byte(i->seg(), RMAddr(i), &op2);
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2001-04-10 05:04:59 +04:00
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}
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sum = op1 + op2 + temp_CF;
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SET_FLAGS_OSZAPC_8_CF(op1, op2, sum, BX_INSTR_ADC8,
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temp_CF);
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/* now write sum back to destination, which is a register */
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2002-09-18 09:36:48 +04:00
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), sum);
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2001-04-10 05:04:59 +04:00
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::ADC_ALIb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op1, op2, sum;
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Boolean temp_CF;
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2002-09-22 22:22:24 +04:00
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temp_CF = !!get_CF();
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2001-04-10 05:04:59 +04:00
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op1 = AL;
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2002-09-18 02:50:53 +04:00
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op2 = i->Ib();
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2001-04-10 05:04:59 +04:00
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sum = op1 + op2 + temp_CF;
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/* now write sum back to destination, which is a register */
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AL = sum;
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SET_FLAGS_OSZAPC_8_CF(op1, op2, sum, BX_INSTR_ADC8,
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temp_CF);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::SBB_EbGb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op2_8, op1_8, diff_8;
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Boolean temp_CF;
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2002-09-22 22:22:24 +04:00
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temp_CF = !!get_CF();
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2001-04-10 05:04:59 +04:00
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2002-09-18 09:36:48 +04:00
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/* op2 is a register, RMAddr(i) is an index of a register */
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op2_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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/* op1_8 is a register or memory reference */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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}
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else {
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/* pointer, segment address pair */
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2002-09-18 09:36:48 +04:00
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
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2001-04-10 05:04:59 +04:00
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}
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diff_8 = op1_8 - (op2_8 + temp_CF);
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/* now write diff back to destination */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), diff_8);
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2001-04-10 05:04:59 +04:00
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}
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else {
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2002-09-07 01:54:58 +04:00
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Write_RMW_virtual_byte(diff_8);
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2001-04-10 05:04:59 +04:00
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}
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SET_FLAGS_OSZAPC_8_CF(op1_8, op2_8, diff_8, BX_INSTR_SBB8,
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temp_CF);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::SBB_GbEb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op1_8, op2_8, diff_8;
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Boolean temp_CF;
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2002-09-22 22:22:24 +04:00
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temp_CF = !!get_CF();
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2001-04-10 05:04:59 +04:00
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2002-09-18 09:36:48 +04:00
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/* op1 is a register, RMAddr(i) is an index of a register */
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op1_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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/* op2 is a register or memory reference */
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 09:36:48 +04:00
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op2_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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}
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else {
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/* pointer, segment address pair */
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2002-09-18 09:36:48 +04:00
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read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
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2001-04-10 05:04:59 +04:00
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}
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diff_8 = op1_8 - (op2_8 + temp_CF);
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/* now write diff back to destination, which is a register */
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2002-09-18 09:36:48 +04:00
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), diff_8);
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2001-04-10 05:04:59 +04:00
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SET_FLAGS_OSZAPC_8_CF(op1_8, op2_8, diff_8, BX_INSTR_SBB8,
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temp_CF);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::SBB_ALIb(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit8u op1_8, op2_8, diff_8;
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Boolean temp_CF;
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2002-09-22 22:22:24 +04:00
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temp_CF = !!get_CF();
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2001-04-10 05:04:59 +04:00
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op1_8 = AL;
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2002-09-18 02:50:53 +04:00
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op2_8 = i->Ib();
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2001-04-10 05:04:59 +04:00
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diff_8 = op1_8 - (op2_8 + temp_CF);
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/* now write diff back to destination, which is a register */
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AL = diff_8;
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|
|
SET_FLAGS_OSZAPC_8_CF(op1_8, op2_8, diff_8, BX_INSTR_SBB8,
|
|
|
|
temp_CF);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::SBB_EbIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op2_8, op1_8, diff_8;
|
|
|
|
Boolean temp_CF;
|
|
|
|
|
2002-09-22 22:22:24 +04:00
|
|
|
temp_CF = !!get_CF();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2_8 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op1_8 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
diff_8 = op1_8 - (op2_8 + temp_CF);
|
|
|
|
|
|
|
|
/* now write diff back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8_CF(op1_8, op2_8, diff_8, BX_INSTR_SBB8,
|
|
|
|
temp_CF);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::SUB_EbGb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op2_8, op1_8, diff_8;
|
|
|
|
|
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
/* op2 is a register, RMAddr(i) is an index of a register */
|
|
|
|
op2_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op1_8 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
/* now write diff back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB8);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::SUB_GbEb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op1_8, op2_8, diff_8;
|
|
|
|
|
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
/* op1 is a register, RMAddr(i) is an index of a register */
|
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op2 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op2_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
/* now write diff back to destination, which is a register */
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB8);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::SUB_ALIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op1_8, op2_8, diff_8;
|
|
|
|
|
|
|
|
op1_8 = AL;
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2_8 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
/* now write diff back to destination, which is a register */
|
|
|
|
AL = diff_8;
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB8);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::CMP_EbGb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2002-09-23 02:22:16 +04:00
|
|
|
Bit8u op2_8, op1_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
op2_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2002-09-23 02:22:16 +04:00
|
|
|
#if (defined(__i386__) && defined(__GNUC__))
|
|
|
|
Bit32u flags32;
|
|
|
|
asm (
|
|
|
|
"cmpb %2, %1\n\t"
|
|
|
|
"pushfl \n\t"
|
|
|
|
"popl %0"
|
|
|
|
: "=g" (flags32)
|
2002-09-23 04:27:18 +04:00
|
|
|
: "q" (op1_8), "g" (op2_8)
|
2002-09-23 02:22:16 +04:00
|
|
|
: "cc"
|
|
|
|
);
|
|
|
|
BX_CPU_THIS_PTR eflags.val32 =
|
|
|
|
(BX_CPU_THIS_PTR eflags.val32 & ~0x000008d5) | (flags32 & 0x000008d5);
|
|
|
|
BX_CPU_THIS_PTR lf_flags_status = 0;
|
|
|
|
#else
|
|
|
|
Bit8u diff_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_CMP8);
|
2002-09-23 02:22:16 +04:00
|
|
|
#endif
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::CMP_GbEb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2002-09-23 02:22:16 +04:00
|
|
|
Bit8u op1_8, op2_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op2_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2002-09-23 02:22:16 +04:00
|
|
|
#if (defined(__i386__) && defined(__GNUC__))
|
|
|
|
Bit32u flags32;
|
|
|
|
asm (
|
|
|
|
"cmpb %2, %1\n\t"
|
|
|
|
"pushfl \n\t"
|
|
|
|
"popl %0"
|
|
|
|
: "=g" (flags32)
|
2002-09-23 04:27:18 +04:00
|
|
|
: "q" (op1_8), "g" (op2_8)
|
2002-09-23 02:22:16 +04:00
|
|
|
: "cc"
|
|
|
|
);
|
|
|
|
BX_CPU_THIS_PTR eflags.val32 =
|
|
|
|
(BX_CPU_THIS_PTR eflags.val32 & ~0x000008d5) | (flags32 & 0x000008d5);
|
|
|
|
BX_CPU_THIS_PTR lf_flags_status = 0;
|
|
|
|
#else
|
|
|
|
Bit8u diff_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_CMP8);
|
2002-09-23 02:22:16 +04:00
|
|
|
#endif
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::CMP_ALIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2002-09-23 02:22:16 +04:00
|
|
|
Bit8u op1_8, op2_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
op1_8 = AL;
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2_8 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-23 02:22:16 +04:00
|
|
|
#if (defined(__i386__) && defined(__GNUC__))
|
|
|
|
Bit32u flags32;
|
|
|
|
asm (
|
|
|
|
"cmpb %2, %1\n\t"
|
|
|
|
"pushfl \n\t"
|
|
|
|
"popl %0"
|
|
|
|
: "=g" (flags32)
|
2002-09-23 04:27:18 +04:00
|
|
|
: "q" (op1_8), "g" (op2_8)
|
2002-09-23 02:22:16 +04:00
|
|
|
: "cc"
|
|
|
|
);
|
|
|
|
BX_CPU_THIS_PTR eflags.val32 =
|
|
|
|
(BX_CPU_THIS_PTR eflags.val32 & ~0x000008d5) | (flags32 & 0x000008d5);
|
|
|
|
BX_CPU_THIS_PTR lf_flags_status = 0;
|
|
|
|
#else
|
|
|
|
Bit8u diff_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_CMP8);
|
2002-09-23 02:22:16 +04:00
|
|
|
#endif
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::XADD_EbGb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
#if (BX_CPU_LEVEL >= 4) || (BX_CPU_LEVEL_HACKED >= 4)
|
|
|
|
|
|
|
|
Bit8u op2, op1, sum;
|
|
|
|
|
|
|
|
/* XADD dst(r/m8), src(r8)
|
|
|
|
* temp <-- src + dst | sum = op2 + op1
|
|
|
|
* src <-- dst | op2 = op1
|
|
|
|
* dst <-- tmp | op1 = sum
|
|
|
|
*/
|
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
/* op2 is a register, RMAddr(i) is an index of a register */
|
|
|
|
op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op1 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
sum = op1 + op2;
|
|
|
|
|
|
|
|
/* now write sum back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2001-04-10 05:04:59 +04:00
|
|
|
// and write destination into source
|
|
|
|
// Note: if both op1 & op2 are registers, the last one written
|
|
|
|
// should be the sum, as op1 & op2 may be the same register.
|
|
|
|
// For example: XADD AL, AL
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
|
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), sum);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(sum);
|
2001-04-10 05:04:59 +04:00
|
|
|
/* and write destination into source */
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_XADD8);
|
|
|
|
#else
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("XADD_EbGb: not supported on < 80486"));
|
2001-04-10 05:04:59 +04:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::ADD_EbIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op2, op1, sum;
|
|
|
|
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op1 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
sum = op1 + op2;
|
|
|
|
|
|
|
|
/* now write sum back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), sum);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(sum);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD8);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::ADC_EbIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op2, op1, sum;
|
|
|
|
Boolean temp_CF;
|
|
|
|
|
2002-09-22 22:22:24 +04:00
|
|
|
temp_CF = !!get_CF();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op1 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
sum = op1 + op2 + temp_CF;
|
|
|
|
|
|
|
|
/* now write sum back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), sum);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(sum);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8_CF(op1, op2, sum, BX_INSTR_ADC8,
|
|
|
|
temp_CF);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::SUB_EbIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op2_8, op1_8, diff_8;
|
|
|
|
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2_8 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
/* op1_8 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
/* now write diff back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB8);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::CMP_EbIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2002-09-23 02:22:16 +04:00
|
|
|
Bit8u op2_8, op1_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
op2_8 = i->Ib();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2002-09-23 02:22:16 +04:00
|
|
|
#if (defined(__i386__) && defined(__GNUC__))
|
|
|
|
Bit32u flags32;
|
|
|
|
asm (
|
|
|
|
"cmpb %2, %1\n\t"
|
|
|
|
"pushfl \n\t"
|
|
|
|
"popl %0"
|
|
|
|
: "=g" (flags32)
|
2002-09-23 04:27:18 +04:00
|
|
|
: "q" (op1_8), "g" (op2_8)
|
2002-09-23 02:22:16 +04:00
|
|
|
: "cc"
|
|
|
|
);
|
|
|
|
BX_CPU_THIS_PTR eflags.val32 =
|
|
|
|
(BX_CPU_THIS_PTR eflags.val32 & ~0x000008d5) | (flags32 & 0x000008d5);
|
|
|
|
BX_CPU_THIS_PTR lf_flags_status = 0;
|
|
|
|
#else
|
|
|
|
Bit8u diff_8;
|
2001-04-10 05:04:59 +04:00
|
|
|
diff_8 = op1_8 - op2_8;
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_CMP8);
|
2002-09-23 02:22:16 +04:00
|
|
|
#endif
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::NEG_Eb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op1_8, diff_8;
|
|
|
|
|
|
|
|
/* op1_8 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
diff_8 = 0 - op1_8;
|
|
|
|
|
|
|
|
/* now write diff back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(diff_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(op1_8, 0, diff_8, BX_INSTR_NEG8);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::INC_Eb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op1;
|
|
|
|
|
|
|
|
/* op1 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
op1++;
|
|
|
|
|
|
|
|
/* now write sum back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(op1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAP_8(0, 0, op1, BX_INSTR_INC8);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::DEC_Eb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u op1_8;
|
|
|
|
|
|
|
|
/* op1_8 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
op1_8--;
|
|
|
|
|
|
|
|
/* now write sum back to destination */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAP_8(0, 0, op1_8, BX_INSTR_DEC8);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::CMPXCHG_EbGb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
#if (BX_CPU_LEVEL >= 4) || (BX_CPU_LEVEL_HACKED >= 4)
|
|
|
|
Bit8u op2_8, op1_8, diff_8;
|
|
|
|
|
|
|
|
|
|
|
|
/* op1_8 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
diff_8 = AL - op1_8;
|
|
|
|
|
|
|
|
SET_FLAGS_OSZAPC_8(AL, op1_8, diff_8, BX_INSTR_CMP8);
|
|
|
|
|
|
|
|
if (diff_8 == 0) { // if accumulator == dest
|
|
|
|
// ZF = 1
|
|
|
|
set_ZF(1);
|
|
|
|
// dest <-- src
|
2002-09-18 09:36:48 +04:00
|
|
|
op2_8 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 09:36:48 +04:00
|
|
|
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op2_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-07 01:54:58 +04:00
|
|
|
Write_RMW_virtual_byte(op2_8);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
// ZF = 0
|
|
|
|
set_ZF(0);
|
|
|
|
// accumulator <-- dest
|
|
|
|
AL = op1_8;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("CMPXCHG_EbGb:"));
|
2001-04-10 05:04:59 +04:00
|
|
|
#endif
|
|
|
|
}
|