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Changed "r" constraints to "q", so gcc will emit a byte addressable

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register for the x86 asm() tricks.
This commit is contained in:
Kevin Lawton 2002-09-23 00:27:18 +00:00
parent af215531f2
commit 9100d1ab1e
1 changed files with 5 additions and 5 deletions
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10
bochs/cpu/arith8.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith8.cc,v 1.13 2002-09-22 22:22:16 kevinlawton Exp $
// $Id: arith8.cc,v 1.14 2002-09-23 00:27:18 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -427,7 +427,7 @@ BX_CPU_C::CMP_EbGb(bxInstruction_c *i)
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_8), "g" (op2_8)
: "q" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
@ -463,7 +463,7 @@ BX_CPU_C::CMP_GbEb(bxInstruction_c *i)
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_8), "g" (op2_8)
: "q" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
@ -495,7 +495,7 @@ BX_CPU_C::CMP_ALIb(bxInstruction_c *i)
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_8), "g" (op2_8)
: "q" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
@ -675,7 +675,7 @@ BX_CPU_C::CMP_EbIb(bxInstruction_c *i)
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_8), "g" (op2_8)
: "q" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =