2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 01:05:47 +03:00
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// $Id$
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2018-02-02 22:04:59 +03:00
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// Copyright (C) 2001-2018 The Bochs Project
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2001-04-10 05:04:59 +04:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-02-08 12:05:52 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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2009-12-04 22:50:29 +03:00
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//
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2008-02-16 01:05:43 +03:00
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/////////////////////////////////////////////////////////////////////////
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2001-04-10 05:04:59 +04:00
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2011-01-26 02:29:08 +03:00
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// The original version of the SB16 support written and donated by Josef Drexler
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2001-04-10 05:04:59 +04:00
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2002-11-13 21:39:41 +03:00
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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2008-01-27 01:24:03 +03:00
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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2002-11-13 21:39:41 +03:00
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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2001-04-10 05:04:59 +04:00
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2004-06-19 19:20:15 +04:00
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#include "iodev.h"
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2010-02-26 17:18:19 +03:00
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2002-11-19 08:47:45 +03:00
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#if BX_SUPPORT_SB16
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2014-11-24 21:25:14 +03:00
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#include "soundlow.h"
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2017-02-20 21:21:19 +03:00
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#include "soundmod.h"
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2015-01-11 23:13:50 +03:00
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#include "sb16.h"
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2015-01-13 00:20:18 +03:00
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#include "opl.h"
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2004-09-05 14:30:19 +04:00
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2013-12-13 19:58:27 +04:00
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#include <math.h>
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2002-11-13 21:39:41 +03:00
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#define LOG_THIS theSB16Device->
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bx_sb16_c *theSB16Device = NULL;
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2015-01-08 22:12:01 +03:00
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Bit32u fmopl_callback(void *dev, Bit16u rate, Bit8u *buffer, Bit32u len);
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2012-01-12 22:03:20 +04:00
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// builtin configuration handling functions
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void sb16_init_options(void)
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{
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2015-02-19 21:45:43 +03:00
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static const char *sb16_mode_list[] = {
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2013-11-24 18:04:34 +04:00
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"0",
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"1",
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"2",
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"3",
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NULL
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};
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2012-01-12 22:03:20 +04:00
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bx_param_c *sound = SIM->get_param("sound");
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2012-02-12 22:43:20 +04:00
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bx_list_c *menu = new bx_list_c(sound, "sb16", "SB16 Configuration");
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2012-01-12 22:03:20 +04:00
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menu->set_options(menu->SHOW_PARENT);
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bx_param_bool_c *enabled = new bx_param_bool_c(menu,
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"enabled",
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"Enable SB16 emulation",
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"Enables the SB16 emulation",
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2013-12-30 18:37:04 +04:00
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1);
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2015-04-17 00:18:42 +03:00
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2015-02-19 21:45:43 +03:00
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bx_param_enum_c *midimode = new bx_param_enum_c(menu,
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2012-01-12 22:03:20 +04:00
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"midimode",
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"Midi mode",
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2015-02-19 21:45:43 +03:00
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"Controls the MIDI output switches.",
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sb16_mode_list,
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0, 0);
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2012-01-12 22:03:20 +04:00
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bx_param_filename_c *midifile = new bx_param_filename_c(menu,
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2015-04-17 21:37:51 +03:00
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"midifile",
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2012-01-12 22:03:20 +04:00
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"MIDI file",
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2015-04-17 00:18:42 +03:00
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"The filename is where the MIDI data is sent to in mode 2 or 3.",
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2012-01-12 22:03:20 +04:00
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"", BX_PATHNAME_LEN);
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2015-04-17 00:18:42 +03:00
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2013-11-24 18:04:34 +04:00
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bx_param_enum_c *wavemode = new bx_param_enum_c(menu,
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2012-01-12 22:03:20 +04:00
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"wavemode",
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"Wave mode",
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2015-02-19 21:45:43 +03:00
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"Controls the wave output switches.",
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sb16_mode_list,
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2013-11-24 18:04:34 +04:00
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0, 0);
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2012-01-12 22:03:20 +04:00
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bx_param_filename_c *wavefile = new bx_param_filename_c(menu,
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2015-04-17 21:37:51 +03:00
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"wavefile",
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2012-01-12 22:03:20 +04:00
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"Wave file",
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2013-07-06 19:12:04 +04:00
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"This is the file where the wave output is stored",
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2012-01-12 22:03:20 +04:00
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"", BX_PATHNAME_LEN);
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bx_param_num_c *loglevel = new bx_param_num_c(menu,
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"loglevel",
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"Log level",
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"Controls how verbose the SB16 emulation is (0 = no log, 5 = all errors and infos).",
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0, 5,
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0);
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bx_param_filename_c *logfile = new bx_param_filename_c(menu,
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2013-01-19 19:18:07 +04:00
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"log",
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2012-01-12 22:03:20 +04:00
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"Log file",
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"The file to write the SB16 emulator messages to.",
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"", BX_PATHNAME_LEN);
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logfile->set_extension("log");
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bx_param_num_c *dmatimer = new bx_param_num_c(menu,
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"dmatimer",
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"DMA timer",
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"Microseconds per second for a DMA cycle.",
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0, BX_MAX_BIT32U,
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0);
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2012-02-12 22:43:20 +04:00
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bx_list_c *deplist = new bx_list_c(NULL);
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2012-01-12 22:03:20 +04:00
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deplist->add(midimode);
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deplist->add(wavemode);
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deplist->add(loglevel);
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deplist->add(dmatimer);
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enabled->set_dependent_list(deplist);
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2012-02-12 22:43:20 +04:00
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deplist = new bx_list_c(NULL);
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2012-01-12 22:03:20 +04:00
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deplist->add(midifile);
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2015-02-19 21:45:43 +03:00
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midimode->set_dependent_list(deplist, 0);
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midimode->set_dependent_bitmap(2, 0x1);
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midimode->set_dependent_bitmap(3, 0x1);
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2012-02-12 22:43:20 +04:00
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deplist = new bx_list_c(NULL);
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2012-01-12 22:03:20 +04:00
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deplist->add(wavefile);
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2013-11-24 18:04:34 +04:00
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wavemode->set_dependent_list(deplist, 0);
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wavemode->set_dependent_bitmap(2, 0x1);
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wavemode->set_dependent_bitmap(3, 0x1);
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2012-02-12 22:43:20 +04:00
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deplist = new bx_list_c(NULL);
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2012-01-12 22:03:20 +04:00
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deplist->add(logfile);
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loglevel->set_dependent_list(deplist);
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2015-02-19 21:45:43 +03:00
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loglevel->set_options(loglevel->USE_SPIN_CONTROL);
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2012-01-12 22:03:20 +04:00
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}
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Bit32s sb16_options_parser(const char *context, int num_params, char *params[])
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{
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if (!strcmp(params[0], "sb16")) {
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bx_list_c *base = (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16);
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2013-01-26 22:17:23 +04:00
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int enable = 1;
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SIM->get_param_bool("enabled", base)->set(1);
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2012-01-12 22:03:20 +04:00
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for (int i = 1; i < num_params; i++) {
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if (!strncmp(params[i], "enabled=", 8)) {
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2018-02-02 22:04:59 +03:00
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SIM->get_param_bool("enabled", base)->parse_param(¶ms[i][8]);
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enable = SIM->get_param_bool("enabled", base)->get();
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2015-04-17 21:37:51 +03:00
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} else if (!strncmp(params[i], "midi=", 5)) {
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SIM->get_param_string("midifile", base)->set(¶ms[i][5]);
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} else if (!strncmp(params[i], "wave=", 5)) {
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SIM->get_param_string("wavefile", base)->set(¶ms[i][5]);
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2013-01-26 22:17:23 +04:00
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} else if (SIM->parse_param_from_list(context, params[i], base) < 0) {
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2012-01-12 22:03:20 +04:00
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BX_ERROR(("%s: unknown parameter for sb16 ignored.", context));
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}
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}
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2013-01-26 22:17:23 +04:00
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if ((enable != 0) && (SIM->get_param_num("dmatimer", base)->get() == 0)) {
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2012-01-12 22:03:20 +04:00
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SIM->get_param_bool("enabled", base)->set(0);
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2013-01-26 22:17:23 +04:00
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}
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2012-01-12 22:03:20 +04:00
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} else {
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BX_PANIC(("%s: unknown directive '%s'", context, params[0]));
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}
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return 0;
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}
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Bit32s sb16_options_save(FILE *fp)
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{
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2013-01-20 02:37:15 +04:00
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return SIM->write_param_list(fp, (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16), NULL, 0);
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2012-01-12 22:03:20 +04:00
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}
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// device plugin entry points
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2017-01-28 12:52:09 +03:00
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int CDECL libsb16_LTX_plugin_init(plugin_t *plugin, plugintype_t type)
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2002-11-13 21:39:41 +03:00
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{
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2006-09-10 21:18:44 +04:00
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theSB16Device = new bx_sb16_c();
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2002-11-13 21:39:41 +03:00
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, theSB16Device, BX_PLUGIN_SB16);
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2012-01-12 22:03:20 +04:00
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// add new configuration parameter for the config interface
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sb16_init_options();
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// register add-on option for bochsrc and command line
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SIM->register_addon_option("sb16", sb16_options_parser, sb16_options_save);
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2002-11-13 21:39:41 +03:00
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return(0); // Success
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}
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2014-06-08 12:40:08 +04:00
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void CDECL libsb16_LTX_plugin_fini(void)
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2002-11-13 21:39:41 +03:00
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{
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2006-09-10 21:18:44 +04:00
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delete theSB16Device;
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2012-01-12 22:03:20 +04:00
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SIM->unregister_addon_option("sb16");
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((bx_list_c*)SIM->get_param("sound"))->remove("sb16");
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2002-11-13 21:39:41 +03:00
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}
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2001-04-10 05:04:59 +04:00
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// some shortcuts to save typing
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#define LOGFILE BX_SB16_THIS logfile
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#define MPU BX_SB16_THIS mpu401
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#define DSP BX_SB16_THIS dsp
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#define MIXER BX_SB16_THIS mixer
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#define EMUL BX_SB16_THIS emuldata
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#define OPL BX_SB16_THIS opl
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2015-02-19 21:45:43 +03:00
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#define BX_SB16_WAVEOUT1 BX_SB16_THIS waveout[0]
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#define BX_SB16_WAVEOUT2 BX_SB16_THIS waveout[1]
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#define BX_SB16_WAVEIN BX_SB16_THIS wavein
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#define BX_SB16_MIDIOUT1 BX_SB16_THIS midiout[0]
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#define BX_SB16_MIDIOUT2 BX_SB16_THIS midiout[1]
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2001-04-10 05:04:59 +04:00
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2001-05-18 00:58:31 +04:00
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// here's a safe way to print out null pointeres
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#define MIGHT_BE_NULL(x) ((x==NULL)? "(null)" : x)
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2012-01-12 22:03:20 +04:00
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// the device object
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2001-04-10 05:04:59 +04:00
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bx_sb16_c::bx_sb16_c(void)
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{
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2001-06-27 23:16:01 +04:00
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put("SB16");
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2012-02-05 14:08:56 +04:00
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memset(&mpu401, 0, sizeof(mpu401));
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memset(&dsp, 0, sizeof(dsp));
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memset(&opl, 0, sizeof(opl));
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2012-02-10 22:08:17 +04:00
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currentdma8 = 0;
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currentdma16 = 0;
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2002-11-13 21:39:41 +03:00
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mpu401.timer_handle = BX_NULL_TIMER_HANDLE;
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dsp.timer_handle = BX_NULL_TIMER_HANDLE;
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opl.timer_handle = BX_NULL_TIMER_HANDLE;
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2015-02-19 21:45:43 +03:00
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waveout[0] = NULL;
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waveout[1] = NULL;
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2015-02-14 20:25:39 +03:00
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wavein = NULL;
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2015-02-19 21:45:43 +03:00
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midiout[0] = NULL;
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midiout[1] = NULL;
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2006-03-03 23:29:50 +03:00
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wavemode = 0;
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2015-04-17 00:18:42 +03:00
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midimode = 0;
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2006-03-03 23:29:50 +03:00
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loglevel = 0;
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2012-04-09 12:48:10 +04:00
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logfile = NULL;
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2015-08-23 10:04:56 +03:00
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rt_conf_id = -1;
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2001-04-10 05:04:59 +04:00
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}
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bx_sb16_c::~bx_sb16_c(void)
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{
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2015-08-23 10:04:56 +03:00
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SIM->unregister_runtime_config_handler(rt_conf_id);
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2013-11-22 22:28:21 +04:00
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closemidioutput();
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2001-04-10 05:04:59 +04:00
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2015-02-19 21:45:43 +03:00
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if (BX_SB16_WAVEOUT1 != NULL) {
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BX_SB16_WAVEOUT1->unregister_wave_callback(fmopl_callback_id);
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2015-01-10 22:36:50 +03:00
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}
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2013-11-24 18:04:34 +04:00
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closewaveoutput();
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2001-04-10 05:04:59 +04:00
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2002-04-10 00:12:39 +04:00
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delete [] DSP.dma.chunk;
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2001-04-10 05:04:59 +04:00
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2013-11-29 00:47:34 +04:00
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if (LOGFILE != NULL)
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2001-04-10 05:04:59 +04:00
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fclose(LOGFILE);
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2006-09-10 21:18:44 +04:00
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2012-08-19 12:16:20 +04:00
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SIM->get_bochs_root()->remove("sb16");
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2013-02-19 00:52:19 +04:00
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bx_list_c *misc_rt = (bx_list_c*)SIM->get_param(BXPN_MENU_RUNTIME_MISC);
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2013-11-21 01:37:43 +04:00
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misc_rt->remove("sb16");
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2006-09-10 21:18:44 +04:00
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BX_DEBUG(("Exit"));
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2001-04-10 05:04:59 +04:00
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}
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2002-10-25 01:07:56 +04:00
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void bx_sb16_c::init(void)
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2001-04-10 05:04:59 +04:00
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{
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2003-12-20 20:04:08 +03:00
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unsigned addr, i;
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2001-04-10 05:04:59 +04:00
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2012-01-12 22:03:20 +04:00
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// Read in values from config interface
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bx_list_c *base = (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16);
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// Check if the device is disabled or not configured
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if (!SIM->get_param_bool("enabled", base)->get()) {
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BX_INFO(("SB16 disabled"));
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2012-07-06 21:19:32 +04:00
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// mark unused plugin for removal
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((bx_param_bool_c*)((bx_list_c*)SIM->get_param(BXPN_PLUGIN_CTRL))->get_by_name("sb16"))->set(0);
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2012-01-12 22:03:20 +04:00
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|
|
return;
|
|
|
|
}
|
2013-11-29 00:47:34 +04:00
|
|
|
create_logfile();
|
2015-04-17 00:18:42 +03:00
|
|
|
BX_SB16_THIS midimode = SIM->get_param_enum("midimode", base)->get();
|
2013-11-24 18:04:34 +04:00
|
|
|
BX_SB16_THIS wavemode = SIM->get_param_enum("wavemode", base)->get();
|
2006-03-03 23:29:50 +03:00
|
|
|
BX_SB16_THIS dmatimer = SIM->get_param_num("dmatimer", base)->get();
|
|
|
|
BX_SB16_THIS loglevel = SIM->get_param_num("loglevel", base)->get();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2013-11-24 18:04:34 +04:00
|
|
|
// always initialize lowlevel driver
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_WAVEOUT1 = DEV_sound_get_waveout(0);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_WAVEOUT1 == NULL) {
|
2015-02-17 21:28:25 +03:00
|
|
|
BX_PANIC(("Couldn't initialize waveout driver"));
|
2015-02-20 19:36:26 +03:00
|
|
|
BX_SB16_THIS wavemode &= ~1;
|
|
|
|
} else {
|
|
|
|
BX_SB16_THIS fmopl_callback_id = BX_SB16_WAVEOUT1->register_wave_callback(BX_SB16_THISP, fmopl_callback);
|
2015-02-14 20:25:39 +03:00
|
|
|
}
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS wavemode & 2) {
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_WAVEOUT2 = DEV_sound_get_waveout(1);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_WAVEOUT2 == NULL) {
|
|
|
|
BX_PANIC(("Couldn't initialize wave file driver"));
|
|
|
|
}
|
|
|
|
}
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_WAVEIN = DEV_sound_get_wavein();
|
2015-02-14 20:25:39 +03:00
|
|
|
if (BX_SB16_WAVEIN == NULL) {
|
2015-02-17 21:28:25 +03:00
|
|
|
BX_PANIC(("Couldn't initialize wavein driver"));
|
2015-02-13 14:30:46 +03:00
|
|
|
}
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_MIDIOUT1 = DEV_sound_get_midiout(0);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_MIDIOUT1 == NULL) {
|
|
|
|
BX_PANIC(("Couldn't initialize midiout driver"));
|
|
|
|
}
|
|
|
|
if (BX_SB16_THIS midimode & 2) {
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_MIDIOUT2 = DEV_sound_get_midiout(1);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_MIDIOUT2 == NULL) {
|
|
|
|
BX_PANIC(("Couldn't initialize midi file driver"));
|
2015-02-17 21:28:25 +03:00
|
|
|
}
|
2015-02-15 21:32:36 +03:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2011-03-20 21:02:12 +03:00
|
|
|
DSP.dma.chunk = new Bit8u[BX_SOUNDLOW_WAVEPACKETSIZE];
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.chunkindex = 0;
|
2013-11-24 18:04:34 +04:00
|
|
|
|
2015-02-19 21:45:43 +03:00
|
|
|
DSP.outputinit = (BX_SB16_THIS wavemode & 1);
|
2011-04-11 01:12:30 +04:00
|
|
|
DSP.inputinit = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
MPU.outputinit = 0;
|
|
|
|
|
|
|
|
if (DSP.dma.chunk == NULL)
|
2006-03-03 23:29:50 +03:00
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(2), "Couldn't allocate wave buffer - wave output disabled.");
|
2006-03-03 23:29:50 +03:00
|
|
|
BX_SB16_THIS wavemode = 0;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2015-02-17 11:33:07 +03:00
|
|
|
BX_INFO(("midi=%d,'%s' wave=%d,'%s' log=%d,'%s' dmatimer=%d",
|
2015-04-17 21:37:51 +03:00
|
|
|
BX_SB16_THIS midimode, MIGHT_BE_NULL(SIM->get_param_string("midifile", base)->getptr()),
|
|
|
|
BX_SB16_THIS wavemode, MIGHT_BE_NULL(SIM->get_param_string("wavefile", base)->getptr()),
|
2013-01-19 19:18:07 +04:00
|
|
|
BX_SB16_THIS loglevel, MIGHT_BE_NULL(SIM->get_param_string("log", base)->getptr()),
|
2006-03-03 23:29:50 +03:00
|
|
|
BX_SB16_THIS dmatimer));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// allocate the FIFO buffers - except for the MPUMIDICMD buffer
|
|
|
|
// these sizes are generous, 16 or 8 would probably be sufficient
|
2008-02-16 01:05:43 +03:00
|
|
|
MPU.datain.init((int) 64); // the input
|
|
|
|
MPU.dataout.init((int) 64); // and output
|
|
|
|
MPU.cmd.init((int) 64); // and command buffers
|
|
|
|
MPU.midicmd.init((int) 256); // and the midi command buffer (note- large SYSEX'es have to fit!)
|
|
|
|
DSP.datain.init((int) 64); // the DSP input
|
|
|
|
DSP.dataout.init((int) 64); // and output buffers
|
|
|
|
EMUL.datain.init((int) 64); // the emulator ports
|
|
|
|
EMUL.dataout.init((int) 64); // for changing emulator settings
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// reset all parts of the hardware by
|
|
|
|
// triggering their reset functions
|
|
|
|
|
|
|
|
// reset the Emulator port
|
|
|
|
emul_write(0x00);
|
|
|
|
|
|
|
|
// reset the MPU401
|
|
|
|
mpu_command(0xff);
|
|
|
|
MPU.last_delta_time = 0xffffffff;
|
|
|
|
|
|
|
|
// reset the DSP
|
2003-04-07 21:08:38 +04:00
|
|
|
DSP.dma.highspeed = 0;
|
|
|
|
DSP.dma.mode = 0;
|
|
|
|
DSP.irqpending = 0;
|
|
|
|
DSP.midiuartmode = 0;
|
2018-05-13 21:10:23 +03:00
|
|
|
DSP.nondma_mode = 0;
|
2018-05-15 21:51:41 +03:00
|
|
|
DSP.nondma_count = 0;
|
2018-05-13 21:10:23 +03:00
|
|
|
DSP.samplebyte = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.resetport = 1; // so that one call to dsp_reset is sufficient
|
|
|
|
dsp_reset(0); // (reset is 1 to 0 transition)
|
2003-11-15 17:56:30 +03:00
|
|
|
DSP.testreg = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
BX_SB16_IRQ = -1; // will be initialized later by the mixer reset
|
|
|
|
|
2003-12-20 20:04:08 +03:00
|
|
|
for (i=0; i<BX_SB16_MIX_REG; i++)
|
|
|
|
MIXER.reg[i] = 0xff;
|
|
|
|
MIXER.reg[0x00] = 0; // reset register
|
2002-01-13 20:07:14 +03:00
|
|
|
MIXER.reg[0x80] = 2; // IRQ 5
|
|
|
|
MIXER.reg[0x81] = 2; // 8-bit DMA 1, no 16-bit DMA
|
2005-02-04 22:50:50 +03:00
|
|
|
MIXER.reg[0x82] = 2 << 5; // no IRQ pending
|
2003-12-20 20:04:08 +03:00
|
|
|
MIXER.reg[0xfd] = 16; // ???
|
|
|
|
MIXER.reg[0xfe] = 6; // ???
|
2002-01-13 20:07:14 +03:00
|
|
|
set_irq_dma(); // set the IRQ and DMA
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
// call the mixer reset
|
|
|
|
mixer_writeregister(0x00);
|
|
|
|
mixer_writedata(0x00);
|
|
|
|
|
|
|
|
// reset the FM emulation
|
2003-04-07 21:08:38 +04:00
|
|
|
OPL.timer_running = 0;
|
2015-01-15 23:25:27 +03:00
|
|
|
for (i=0; i<2; i++) {
|
|
|
|
OPL.tmask[i] = 0;
|
|
|
|
OPL.tflag[i] = 0;
|
|
|
|
}
|
|
|
|
for (i=0; i<4; i++) {
|
|
|
|
OPL.timer[i] = 0;
|
|
|
|
OPL.timerinit[i] = 0;
|
|
|
|
}
|
2015-01-13 00:20:18 +03:00
|
|
|
adlib_init(44100);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2005-02-04 22:50:50 +03:00
|
|
|
// csp
|
|
|
|
memset(&BX_SB16_THIS csp_reg[0], 0, sizeof(BX_SB16_THIS csp_reg));
|
|
|
|
BX_SB16_THIS csp_reg[5] = 0x01;
|
|
|
|
BX_SB16_THIS csp_reg[9] = 0xf8;
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
// Allocate the IO addresses, 2x0..2xf, 3x0..3x4 and 388..38b
|
|
|
|
for (addr=BX_SB16_IO; addr<BX_SB16_IO+BX_SB16_IOLEN; addr++) {
|
2006-05-06 19:19:57 +04:00
|
|
|
DEV_register_ioread_handler(this, &read_handler, addr, "SB16", 1);
|
|
|
|
DEV_register_iowrite_handler(this, &write_handler, addr, "SB16", 1);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
for (addr=BX_SB16_IOMPU; addr<BX_SB16_IOMPU+BX_SB16_IOMPULEN; addr++) {
|
2006-05-06 19:19:57 +04:00
|
|
|
DEV_register_ioread_handler(this, &read_handler, addr, "SB16", 1);
|
|
|
|
DEV_register_iowrite_handler(this, &write_handler, addr, "SB16", 1);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
for (addr=BX_SB16_IOADLIB; addr<BX_SB16_IOADLIB+BX_SB16_IOADLIBLEN; addr++) {
|
2006-05-06 19:19:57 +04:00
|
|
|
DEV_register_ioread_handler(this, read_handler, addr, "SB16", 1);
|
|
|
|
DEV_register_iowrite_handler(this, write_handler, addr, "SB16", 1);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2005-08-27 12:17:13 +04:00
|
|
|
writelog(BOTHLOG(1),
|
2006-05-06 19:19:57 +04:00
|
|
|
"SB16 emulation initialised, IRQ %d, IO %03x/%03x/%03x, DMA %d/%d",
|
|
|
|
BX_SB16_IRQ, BX_SB16_IO, BX_SB16_IOMPU, BX_SB16_IOADLIB,
|
|
|
|
BX_SB16_DMAL, BX_SB16_DMAH);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// initialize the timers
|
2002-10-06 23:04:47 +04:00
|
|
|
if (MPU.timer_handle == BX_NULL_TIMER_HANDLE) {
|
2017-03-30 21:08:15 +03:00
|
|
|
MPU.timer_handle = DEV_register_timer
|
2002-10-06 23:04:47 +04:00
|
|
|
(BX_SB16_THISP, mpu_timer, 500000 / 384, 1, 1, "sb16.mpu");
|
|
|
|
// midi timer: active, continuous, 500000 / 384 seconds (384 = delta time, 500000 = sec per beat at 120 bpm. Don't change this!)
|
|
|
|
}
|
|
|
|
|
|
|
|
if (DSP.timer_handle == BX_NULL_TIMER_HANDLE) {
|
2017-03-30 21:08:15 +03:00
|
|
|
DSP.timer_handle = DEV_register_timer
|
2002-10-06 23:04:47 +04:00
|
|
|
(BX_SB16_THISP, dsp_dmatimer, 1, 1, 0, "sb16.dsp");
|
2005-10-23 11:17:01 +04:00
|
|
|
// dma timer: inactive, continuous, frequency variable
|
2002-10-06 23:04:47 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (OPL.timer_handle == BX_NULL_TIMER_HANDLE) {
|
2017-03-30 21:08:15 +03:00
|
|
|
OPL.timer_handle = DEV_register_timer
|
2002-10-06 23:04:47 +04:00
|
|
|
(BX_SB16_THISP, opl_timer, 80, 1, 0, "sb16.opl");
|
2005-10-23 11:17:01 +04:00
|
|
|
// opl timer: inactive, continuous, frequency 80us
|
2002-10-06 23:04:47 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
writelog(MIDILOG(4), "Timers initialized, midi %d, dma %d, opl %d",
|
2008-02-16 01:05:43 +03:00
|
|
|
MPU.timer_handle, DSP.timer_handle, OPL.timer_handle);
|
2001-04-10 05:04:59 +04:00
|
|
|
MPU.current_timer = 0;
|
2006-03-03 23:29:50 +03:00
|
|
|
|
|
|
|
// init runtime parameters
|
2012-01-12 22:03:20 +04:00
|
|
|
bx_list_c *misc_rt = (bx_list_c*)SIM->get_param(BXPN_MENU_RUNTIME_MISC);
|
2013-11-22 22:28:21 +04:00
|
|
|
bx_list_c *menu = new bx_list_c(misc_rt, "sb16", "SB16 Runtime Options");
|
2013-11-21 01:37:43 +04:00
|
|
|
menu->set_options(menu->SHOW_PARENT | menu->USE_BOX_TITLE);
|
2013-11-24 18:04:34 +04:00
|
|
|
|
2013-11-22 22:28:21 +04:00
|
|
|
menu->add(SIM->get_param("midimode", base));
|
2015-04-17 21:37:51 +03:00
|
|
|
menu->add(SIM->get_param("midifile", base));
|
2013-11-29 00:47:34 +04:00
|
|
|
menu->add(SIM->get_param("wavemode", base));
|
2015-04-17 21:37:51 +03:00
|
|
|
menu->add(SIM->get_param("wavefile", base));
|
2013-11-21 01:37:43 +04:00
|
|
|
menu->add(SIM->get_param("loglevel", base));
|
2013-11-29 00:47:34 +04:00
|
|
|
menu->add(SIM->get_param("log", base));
|
|
|
|
menu->add(SIM->get_param("dmatimer", base));
|
2013-11-24 18:04:34 +04:00
|
|
|
SIM->get_param_enum("wavemode", base)->set_handler(sb16_param_handler);
|
2015-04-17 21:37:51 +03:00
|
|
|
SIM->get_param_string("wavefile", base)->set_handler(sb16_param_string_handler);
|
2013-11-22 22:28:21 +04:00
|
|
|
SIM->get_param_num("midimode", base)->set_handler(sb16_param_handler);
|
2015-04-17 21:37:51 +03:00
|
|
|
SIM->get_param_string("midifile", base)->set_handler(sb16_param_string_handler);
|
2013-01-19 19:18:07 +04:00
|
|
|
SIM->get_param_num("dmatimer", base)->set_handler(sb16_param_handler);
|
|
|
|
SIM->get_param_num("loglevel", base)->set_handler(sb16_param_handler);
|
2013-11-29 00:47:34 +04:00
|
|
|
SIM->get_param_string("log", base)->set_handler(sb16_param_string_handler);
|
2013-11-22 22:28:21 +04:00
|
|
|
// register handler for correct sb16 parameter handling after runtime config
|
2015-08-23 10:04:56 +03:00
|
|
|
BX_SB16_THIS rt_conf_id = SIM->register_runtime_config_handler(this, runtime_config_handler);
|
2013-11-22 22:28:21 +04:00
|
|
|
BX_SB16_THIS midi_changed = 0;
|
2013-11-24 18:04:34 +04:00
|
|
|
BX_SB16_THIS wave_changed = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2002-08-27 23:54:46 +04:00
|
|
|
void bx_sb16_c::reset(unsigned type)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2006-05-27 19:54:49 +04:00
|
|
|
void bx_sb16_c::register_state(void)
|
|
|
|
{
|
2015-01-15 23:25:27 +03:00
|
|
|
unsigned i;
|
2006-05-27 19:54:49 +04:00
|
|
|
char name[8];
|
2015-01-15 23:25:27 +03:00
|
|
|
bx_list_c *chip, *ins_map, *patch;
|
2006-05-27 19:54:49 +04:00
|
|
|
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *list = new bx_list_c(SIM->get_bochs_root(), "sb16", "SB16 State");
|
|
|
|
bx_list_c *mpu = new bx_list_c(list, "mpu");
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_bool_c(mpu, "uartmode", &MPU.uartmode);
|
|
|
|
new bx_shadow_bool_c(mpu, "irqpending", &MPU.irqpending);
|
|
|
|
new bx_shadow_bool_c(mpu, "forceuartmode", &MPU.forceuartmode);
|
|
|
|
new bx_shadow_bool_c(mpu, "singlecommand", &MPU.singlecommand);
|
|
|
|
new bx_shadow_num_c(mpu, "current_timer", &MPU.current_timer);
|
|
|
|
new bx_shadow_num_c(mpu, "last_delta_time", &MPU.last_delta_time);
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *patchtbl = new bx_list_c(mpu, "patchtable");
|
2015-04-06 19:03:04 +03:00
|
|
|
for (i=0; i<16; i++) {
|
2006-05-27 19:54:49 +04:00
|
|
|
sprintf(name, "0x%02x", i);
|
2012-02-12 22:43:20 +04:00
|
|
|
patch = new bx_list_c(patchtbl, name);
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(patch, "banklsb", &MPU.banklsb[i]);
|
|
|
|
new bx_shadow_num_c(patch, "bankmsb", &MPU.bankmsb[i]);
|
|
|
|
new bx_shadow_num_c(patch, "program", &MPU.program[i]);
|
|
|
|
}
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *dsp = new bx_list_c(list, "dsp");
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(dsp, "resetport", &DSP.resetport, BASE_HEX);
|
|
|
|
new bx_shadow_num_c(dsp, "speaker", &DSP.speaker, BASE_HEX);
|
|
|
|
new bx_shadow_num_c(dsp, "prostereo", &DSP.prostereo, BASE_HEX);
|
|
|
|
new bx_shadow_bool_c(dsp, "irqpending", &DSP.irqpending);
|
|
|
|
new bx_shadow_bool_c(dsp, "midiuartmode", &DSP.midiuartmode);
|
2018-05-13 21:10:23 +03:00
|
|
|
new bx_shadow_bool_c(dsp, "nondma_mode", &DSP.nondma_mode);
|
2018-05-15 21:51:41 +03:00
|
|
|
new bx_shadow_num_c(dsp, "nondma_count", &DSP.nondma_count);
|
|
|
|
new bx_shadow_num_c(dsp, "samplebyte", &DSP.samplebyte, BASE_HEX);
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(dsp, "testreg", &DSP.testreg, BASE_HEX);
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *dma = new bx_list_c(dsp, "dma");
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(dma, "mode", &DSP.dma.mode);
|
|
|
|
new bx_shadow_num_c(dma, "bps", &DSP.dma.bps);
|
|
|
|
new bx_shadow_num_c(dma, "timer", &DSP.dma.timer);
|
|
|
|
new bx_shadow_bool_c(dma, "fifo", &DSP.dma.fifo);
|
|
|
|
new bx_shadow_bool_c(dma, "output", &DSP.dma.output);
|
|
|
|
new bx_shadow_bool_c(dma, "highspeed", &DSP.dma.highspeed);
|
|
|
|
new bx_shadow_num_c(dma, "count", &DSP.dma.count);
|
|
|
|
new bx_shadow_num_c(dma, "chunkindex", &DSP.dma.chunkindex);
|
|
|
|
new bx_shadow_num_c(dma, "chunkcount", &DSP.dma.chunkcount);
|
|
|
|
new bx_shadow_num_c(dma, "timeconstant", &DSP.dma.timeconstant);
|
|
|
|
new bx_shadow_num_c(dma, "blocklength", &DSP.dma.blocklength);
|
2015-01-11 23:13:50 +03:00
|
|
|
new bx_shadow_num_c(dma, "samplerate", &DSP.dma.param.samplerate);
|
2015-01-27 22:33:28 +03:00
|
|
|
new bx_shadow_num_c(dma, "bits", &DSP.dma.param.bits);
|
|
|
|
new bx_shadow_num_c(dma, "channels", &DSP.dma.param.channels);
|
|
|
|
new bx_shadow_num_c(dma, "format", &DSP.dma.param.format);
|
|
|
|
new bx_shadow_num_c(dma, "volume", &DSP.dma.param.volume);
|
2015-03-27 18:49:40 +03:00
|
|
|
new bx_shadow_num_c(list, "fm_volume", &fm_volume);
|
2011-03-20 21:02:12 +03:00
|
|
|
new bx_shadow_data_c(list, "chunk", DSP.dma.chunk, BX_SOUNDLOW_WAVEPACKETSIZE);
|
2015-10-06 21:20:16 +03:00
|
|
|
new bx_shadow_data_c(list, "csp_reg", BX_SB16_THIS csp_reg, 256, 1);
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *opl = new bx_list_c(list, "opl");
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(opl, "timer_running", &OPL.timer_running);
|
|
|
|
for (i=0; i<2; i++) {
|
|
|
|
sprintf(name, "chip%d", i+1);
|
2012-02-12 22:43:20 +04:00
|
|
|
chip = new bx_list_c(opl, name);
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(chip, "index", &OPL.index[i]);
|
|
|
|
new bx_shadow_num_c(chip, "timer1", &OPL.timer[i*2]);
|
|
|
|
new bx_shadow_num_c(chip, "timer2", &OPL.timer[i*2+1]);
|
|
|
|
new bx_shadow_num_c(chip, "timerinit1", &OPL.timerinit[i*2]);
|
|
|
|
new bx_shadow_num_c(chip, "timerinit2", &OPL.timerinit[i*2+1]);
|
|
|
|
new bx_shadow_num_c(chip, "tmask", &OPL.tmask[i]);
|
|
|
|
new bx_shadow_num_c(chip, "tflag", &OPL.tflag[i]);
|
|
|
|
}
|
|
|
|
new bx_shadow_num_c(list, "mixer_regindex", &MIXER.regindex, BASE_HEX);
|
2015-10-06 21:20:16 +03:00
|
|
|
new bx_shadow_data_c(list, "mixer_reg", MIXER.reg, BX_SB16_MIX_REG, 1);
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *emul = new bx_list_c(list, "emul");
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(emul, "remaps", &EMUL.remaps);
|
2012-02-12 22:43:20 +04:00
|
|
|
bx_list_c *remap = new bx_list_c(emul, "remaplist");
|
2015-04-17 14:58:15 +03:00
|
|
|
for (i=0; i<BX_SB16_MAX_REMAPS; i++) {
|
2006-05-27 19:54:49 +04:00
|
|
|
sprintf(name, "0x%02x", i);
|
2012-02-12 22:43:20 +04:00
|
|
|
ins_map = new bx_list_c(remap, name);
|
2006-05-27 19:54:49 +04:00
|
|
|
new bx_shadow_num_c(ins_map, "oldbankmsb", &EMUL.remaplist[i].oldbankmsb);
|
|
|
|
new bx_shadow_num_c(ins_map, "oldbanklsb", &EMUL.remaplist[i].oldbanklsb);
|
|
|
|
new bx_shadow_num_c(ins_map, "oldprogch", &EMUL.remaplist[i].oldprogch);
|
|
|
|
new bx_shadow_num_c(ins_map, "newbankmsb", &EMUL.remaplist[i].newbankmsb);
|
|
|
|
new bx_shadow_num_c(ins_map, "newbanklsb", &EMUL.remaplist[i].newbanklsb);
|
|
|
|
new bx_shadow_num_c(ins_map, "newprogch", &EMUL.remaplist[i].newprogch);
|
|
|
|
}
|
2015-01-15 23:25:27 +03:00
|
|
|
adlib_register_state(list);
|
2006-05-27 19:54:49 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_c::after_restore_state(void)
|
|
|
|
{
|
|
|
|
set_irq_dma();
|
2015-03-19 19:47:25 +03:00
|
|
|
adlib_after_restore_state();
|
2006-05-27 19:54:49 +04:00
|
|
|
}
|
|
|
|
|
2013-11-22 22:28:21 +04:00
|
|
|
void bx_sb16_c::runtime_config_handler(void *this_ptr)
|
|
|
|
{
|
|
|
|
bx_sb16_c *class_ptr = (bx_sb16_c *) this_ptr;
|
|
|
|
class_ptr->runtime_config();
|
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_c::runtime_config(void)
|
|
|
|
{
|
|
|
|
bx_list_c *base = (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16);
|
2015-02-17 21:28:25 +03:00
|
|
|
if (BX_SB16_THIS midi_changed != 0) {
|
2013-11-22 22:28:21 +04:00
|
|
|
BX_SB16_THIS closemidioutput();
|
2015-02-17 21:28:25 +03:00
|
|
|
if (BX_SB16_THIS midi_changed & 1) {
|
|
|
|
BX_SB16_THIS midimode = SIM->get_param_num("midimode", base)->get();
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS midimode & 2) {
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_MIDIOUT2 = DEV_sound_get_midiout(1);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_MIDIOUT2 == NULL) {
|
|
|
|
BX_PANIC(("Couldn't initialize midi file driver"));
|
2015-02-17 21:28:25 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2013-11-22 22:28:21 +04:00
|
|
|
// writemidicommand() re-opens the output device / file on demand
|
|
|
|
BX_SB16_THIS midi_changed = 0;
|
|
|
|
}
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS wave_changed != 0) {
|
|
|
|
if (BX_SB16_THIS wavemode & 2) {
|
|
|
|
BX_SB16_THIS closewaveoutput();
|
|
|
|
}
|
|
|
|
if (BX_SB16_THIS wave_changed & 1) {
|
|
|
|
BX_SB16_THIS wavemode = SIM->get_param_enum("wavemode", base)->get();
|
|
|
|
DSP.outputinit = (BX_SB16_THIS wavemode & 1);
|
|
|
|
if (BX_SB16_THIS wavemode & 2) {
|
2015-03-07 01:54:30 +03:00
|
|
|
BX_SB16_WAVEOUT2 = DEV_sound_get_waveout(1);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_WAVEOUT2 == NULL) {
|
|
|
|
BX_PANIC(("Couldn't initialize wave file driver"));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2013-11-24 18:04:34 +04:00
|
|
|
// dsp_dma() re-opens the output file on demand
|
|
|
|
BX_SB16_THIS wave_changed = 0;
|
|
|
|
}
|
2013-11-22 22:28:21 +04:00
|
|
|
}
|
|
|
|
|
2007-09-28 23:52:08 +04:00
|
|
|
// the timer functions
|
2006-05-27 19:54:49 +04:00
|
|
|
void bx_sb16_c::mpu_timer (void *this_ptr)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
((bx_sb16_c *) this_ptr)->mpu401.current_timer++;
|
|
|
|
}
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
void bx_sb16_c::dsp_dmatimer(void *this_ptr)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
bx_sb16_c *This = (bx_sb16_c *) this_ptr;
|
|
|
|
|
2011-04-11 01:12:30 +04:00
|
|
|
// raise the DRQ line. It is then lowered by the dma read / write functions
|
|
|
|
// when the next byte has been sent / received.
|
2001-04-10 05:04:59 +04:00
|
|
|
// However, don't do this if the next byte/word will fill up the
|
2011-04-11 01:12:30 +04:00
|
|
|
// output buffer and the output functions are not ready yet
|
|
|
|
// or if buffer is empty in input mode.
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2018-05-13 21:10:23 +03:00
|
|
|
if (!This->dsp.nondma_mode) {
|
|
|
|
if ((This->dsp.dma.chunkindex + 1 < BX_SOUNDLOW_WAVEPACKETSIZE) &&
|
2015-02-19 21:45:43 +03:00
|
|
|
(This->dsp.dma.count > 0)) {
|
2018-05-13 21:10:23 +03:00
|
|
|
if (((This->dsp.dma.output == 0) && (This->dsp.dma.chunkcount > 0)) ||
|
|
|
|
(This->dsp.dma.output == 1)) {
|
|
|
|
if ((DSP.dma.param.bits == 8) || (BX_SB16_DMAH == 0)) {
|
|
|
|
DEV_dma_set_drq(BX_SB16_DMAL, 1);
|
|
|
|
} else {
|
|
|
|
DEV_dma_set_drq(BX_SB16_DMAH, 1);
|
|
|
|
}
|
2011-04-11 01:12:30 +04:00
|
|
|
}
|
2002-01-05 13:30:24 +03:00
|
|
|
}
|
2018-05-13 21:10:23 +03:00
|
|
|
} else {
|
2018-05-15 21:51:41 +03:00
|
|
|
dsp_getsamplebyte(0);
|
|
|
|
dsp_getsamplebyte(This->dsp.samplebyte);
|
|
|
|
dsp_getsamplebyte(0);
|
|
|
|
dsp_getsamplebyte(This->dsp.samplebyte);
|
|
|
|
This->dsp.nondma_count++;
|
2005-08-27 12:17:13 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_c::opl_timer (void *this_ptr)
|
|
|
|
{
|
|
|
|
((bx_sb16_c *) this_ptr)->opl_timerevent();
|
|
|
|
}
|
|
|
|
|
2007-09-28 23:52:08 +04:00
|
|
|
// the various IO handlers
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2007-09-28 23:52:08 +04:00
|
|
|
// The DSP/FM music part
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// dsp_reset() resets the DSP after the sequence 1/0. Returns
|
|
|
|
// 0xaa on the data port
|
|
|
|
void bx_sb16_c::dsp_reset(Bit32u value)
|
|
|
|
{
|
|
|
|
writelog(WAVELOG(4), "DSP Reset port write value %x", value);
|
|
|
|
|
2018-05-15 21:51:41 +03:00
|
|
|
dsp_disable_nondma();
|
2018-05-13 21:10:23 +03:00
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
// just abort high speed mode if it is set
|
|
|
|
if (DSP.dma.highspeed != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.highspeed = 0;
|
|
|
|
writelog(WAVELOG(4), "High speed mode aborted");
|
|
|
|
return;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((DSP.resetport == 1) && (value == 0))
|
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
// 1-0 sequences to reset port, do one of the following:
|
|
|
|
// if in UART MIDI mode, abort it, don't reset
|
|
|
|
// if in Highspeed mode (not SB16!), abort it, don't reset
|
|
|
|
// otherwise reset
|
|
|
|
|
|
|
|
if (DSP.midiuartmode != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // abort UART MIDI mode
|
|
|
|
DSP.midiuartmode = 0;
|
|
|
|
writelog(MIDILOG(4), "DSP UART MIDI mode aborted");
|
|
|
|
return;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// do the reset
|
|
|
|
writelog(WAVELOG(4), "DSP resetting...");
|
|
|
|
|
|
|
|
if (DSP.irqpending != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
DEV_pic_lower_irq(BX_SB16_IRQ);
|
|
|
|
writelog(WAVELOG(4), "DSP reset: IRQ untriggered");
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
if (DSP.dma.mode != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
writelog(WAVELOG(4), "DSP reset: DMA aborted");
|
|
|
|
DSP.dma.mode = 1; // no auto init anymore
|
|
|
|
dsp_dmadone();
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
DSP.resetport = 0;
|
|
|
|
DSP.speaker = 0;
|
|
|
|
DSP.irqpending = 0;
|
|
|
|
DSP.midiuartmode = 0;
|
|
|
|
DSP.prostereo = 0;
|
|
|
|
|
|
|
|
DSP.dma.mode = 0;
|
|
|
|
DSP.dma.fifo = 0;
|
|
|
|
DSP.dma.output = 0;
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.channels = 1;
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.count = 0;
|
|
|
|
DSP.dma.highspeed = 0;
|
|
|
|
DSP.dma.chunkindex = 0;
|
|
|
|
|
|
|
|
DSP.dataout.reset(); // clear the buffers
|
|
|
|
DSP.datain.reset();
|
|
|
|
|
|
|
|
DSP.dataout.put(0xaa); // acknowledge the reset
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
|
|
|
DSP.resetport = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
// dsp_dataread() reads the data port of the DSP
|
|
|
|
Bit32u bx_sb16_c::dsp_dataread()
|
|
|
|
{
|
|
|
|
Bit8u value = 0xff;
|
|
|
|
|
|
|
|
// if we are in MIDI UART mode, call the mpu401 part instead
|
|
|
|
if (DSP.midiuartmode != 0)
|
|
|
|
value = mpu_dataread();
|
|
|
|
else
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
// default behaviour: if none available, return last byte again
|
|
|
|
// if (DSP.dataout.empty() == 0)
|
|
|
|
DSP.dataout.get(&value);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
writelog(WAVELOG(4), "DSP Data port read, result = %x", value);
|
|
|
|
|
|
|
|
return(value);
|
|
|
|
}
|
|
|
|
|
|
|
|
// dsp_datawrite() writes a command or data byte to the data port
|
|
|
|
void bx_sb16_c::dsp_datawrite(Bit32u value)
|
|
|
|
{
|
|
|
|
int bytesneeded;
|
2007-04-08 19:02:50 +04:00
|
|
|
Bit8u index = 0, mode = 0, value8 = 0;
|
|
|
|
Bit16u length = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
writelog(WAVELOG(4), "DSP Data port write, value %x", value);
|
|
|
|
|
|
|
|
// in high speed mode, any data passed to DSP is a sample
|
|
|
|
if (DSP.dma.highspeed != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
dsp_getsamplebyte(value);
|
|
|
|
return;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// route information to mpu401 part if in MIDI UART mode
|
|
|
|
if (DSP.midiuartmode != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
mpu_datawrite(value);
|
|
|
|
return;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (DSP.datain.hascommand() == 1) // already a command pending, add to argument list
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
if (DSP.datain.put(value) == 0)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(3), "DSP command buffer overflow for command %02x",
|
|
|
|
DSP.datain.currentcommand());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
|
|
|
else // no command pending, set one up
|
|
|
|
{
|
|
|
|
bytesneeded = 0; // find out how many arguments the command takes
|
|
|
|
switch (value)
|
|
|
|
{ // all fallbacks intended!
|
|
|
|
case 0x04:
|
|
|
|
case 0x0f:
|
|
|
|
case 0x10:
|
|
|
|
case 0x40:
|
|
|
|
case 0x38:
|
|
|
|
case 0xe0:
|
2018-05-10 18:50:25 +03:00
|
|
|
case 0xe2:
|
2006-05-06 19:19:57 +04:00
|
|
|
case 0xe4:
|
|
|
|
case 0xf9:
|
|
|
|
bytesneeded = 1;
|
|
|
|
break;
|
|
|
|
case 0x05:
|
|
|
|
case 0x0e:
|
|
|
|
case 0x14:
|
|
|
|
case 0x16:
|
|
|
|
case 0x17:
|
|
|
|
case 0x41:
|
|
|
|
case 0x42:
|
|
|
|
case 0x48:
|
|
|
|
case 0x74:
|
|
|
|
case 0x75:
|
|
|
|
case 0x76:
|
|
|
|
case 0x77:
|
|
|
|
case 0x80:
|
|
|
|
bytesneeded = 2;
|
|
|
|
break;
|
2001-04-10 05:04:59 +04:00
|
|
|
// 0xb0 ... 0xbf:
|
2006-05-06 19:19:57 +04:00
|
|
|
case 0xb0:
|
|
|
|
case 0xb1:
|
|
|
|
case 0xb2:
|
|
|
|
case 0xb3:
|
|
|
|
case 0xb4:
|
|
|
|
case 0xb5:
|
|
|
|
case 0xb6:
|
|
|
|
case 0xb7:
|
|
|
|
case 0xb8:
|
|
|
|
case 0xb9:
|
|
|
|
case 0xba:
|
|
|
|
case 0xbb:
|
|
|
|
case 0xbc:
|
|
|
|
case 0xbd:
|
|
|
|
case 0xbe:
|
|
|
|
case 0xbf:
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// 0xc0 ... 0xcf:
|
2006-05-06 19:19:57 +04:00
|
|
|
case 0xc0:
|
|
|
|
case 0xc1:
|
|
|
|
case 0xc2:
|
|
|
|
case 0xc3:
|
|
|
|
case 0xc4:
|
|
|
|
case 0xc5:
|
|
|
|
case 0xc6:
|
|
|
|
case 0xc7:
|
|
|
|
case 0xc8:
|
|
|
|
case 0xc9:
|
|
|
|
case 0xca:
|
|
|
|
case 0xcb:
|
|
|
|
case 0xcc:
|
|
|
|
case 0xcd:
|
|
|
|
case 0xce:
|
|
|
|
case 0xcf:
|
|
|
|
bytesneeded = 3;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
DSP.datain.newcommand(value, bytesneeded);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (DSP.datain.commanddone() == 1) // command is complete, process it
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
writelog(WAVELOG(4), "DSP command %x with %d arg bytes",
|
2006-05-06 19:19:57 +04:00
|
|
|
DSP.datain.currentcommand(), DSP.datain.bytes());
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
switch (DSP.datain.currentcommand())
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
// DSP commands - comments are the parameters for
|
|
|
|
// this command, and/or the output
|
|
|
|
|
|
|
|
// ASP commands (Advanced Signal Processor)
|
|
|
|
// undocumented (?), just from looking what an SB16 does
|
|
|
|
case 0x04:
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x05:
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x0e:
|
|
|
|
DSP.datain.get(&index);
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
BX_SB16_THIS csp_reg[index] = value;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x0f:
|
|
|
|
DSP.datain.get(&index);
|
|
|
|
DSP.dataout.put(BX_SB16_THIS csp_reg[index]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// direct mode DAC
|
|
|
|
case 0x10:
|
|
|
|
// 1: 8bit sample
|
2018-05-13 21:10:23 +03:00
|
|
|
if (!DSP.nondma_mode) {
|
|
|
|
DSP.dma.param.samplerate = 22050;
|
2018-05-15 21:51:41 +03:00
|
|
|
DSP.dma.param.bits = 16;
|
|
|
|
DSP.dma.param.channels = 2;
|
2018-05-13 21:10:23 +03:00
|
|
|
DSP.dma.param.format = 1;
|
2018-05-15 21:51:41 +03:00
|
|
|
DSP.dma.chunkcount = 8820;
|
2018-05-13 21:10:23 +03:00
|
|
|
DSP.dma.chunkindex = 0;
|
|
|
|
bx_pc_system.activate_timer(DSP.timer_handle, 45, 1);
|
|
|
|
DSP.nondma_mode = 1;
|
2018-05-15 21:51:41 +03:00
|
|
|
DSP.nondma_count = 0;
|
2018-05-13 21:10:23 +03:00
|
|
|
}
|
|
|
|
DSP.datain.get(&DSP.samplebyte);
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
// uncomp'd, normal DAC DMA
|
|
|
|
case 0x14:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 2-bit comp'd, normal DAC DMA, no ref byte
|
|
|
|
case 0x16:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 2);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 2-bit comp'd, normal DAC DMA, 1 ref byte
|
|
|
|
case 0x17:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 2|8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// uncomp'd, auto DAC DMA
|
|
|
|
case 0x1c:
|
|
|
|
// none
|
|
|
|
dsp_dma(0xc4, 0x00, DSP.dma.blocklength, 0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 2-bit comp'd, auto DAC DMA, 1 ref byte
|
|
|
|
case 0x1f:
|
|
|
|
// none
|
|
|
|
dsp_dma(0xc4, 0x00, DSP.dma.blocklength, 2|8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// direct mode ADC
|
|
|
|
case 0x20:
|
|
|
|
// o1: 8bit sample
|
|
|
|
DSP.dataout.put(0x80); // put a silence, for now.
|
|
|
|
break;
|
|
|
|
|
|
|
|
// uncomp'd, normal ADC DMA
|
|
|
|
case 0x24:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc8, 0x00, length, 0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// uncomp'd, auto ADC DMA
|
|
|
|
case 0x2c:
|
|
|
|
// none
|
|
|
|
dsp_dma(0xcc, 0x00, DSP.dma.blocklength, 0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// ? polling mode MIDI input
|
|
|
|
case 0x30:
|
|
|
|
break;
|
|
|
|
|
|
|
|
// ? interrupt mode MIDI input
|
|
|
|
case 0x31:
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 0x34..0x37: UART mode MIDI output
|
|
|
|
case 0x34:
|
|
|
|
|
|
|
|
// UART mode MIDI input/output
|
|
|
|
case 0x35:
|
|
|
|
|
|
|
|
// UART polling mode MIDI IO with time stamp
|
|
|
|
case 0x36:
|
|
|
|
|
|
|
|
// UART interrupt mode MIDI IO with time stamp
|
|
|
|
case 0x37:
|
|
|
|
// Fallbacks intended - all set the midi uart mode
|
|
|
|
DSP.midiuartmode = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
// MIDI output
|
|
|
|
case 0x38:
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
// route to mpu401 part
|
|
|
|
mpu_datawrite(value8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// set time constant
|
|
|
|
case 0x40:
|
|
|
|
// 1: timeconstant
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
DSP.dma.timeconstant = value8 << 8;
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.samplerate = (Bit32u) 256000000L / ((Bit32u) 65536L - (Bit32u) DSP.dma.timeconstant);
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
// set samplerate for input
|
|
|
|
case 0x41:
|
|
|
|
// (fallback intended)
|
|
|
|
|
|
|
|
// set samplerate for output
|
|
|
|
case 0x42:
|
|
|
|
// 1,2: hi(frq) lo(frq)
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.datain.getw1(&(DSP.dma.param.samplerate));
|
|
|
|
DSP.dma.timeconstant = 65536 - (Bit32u) 256000000 / (Bit32u) DSP.dma.param.samplerate;
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
// set block length
|
|
|
|
case 0x48:
|
|
|
|
// 1,2: lo(blk len) hi(blk len)
|
2008-02-16 01:05:43 +03:00
|
|
|
DSP.datain.getw(&(DSP.dma.blocklength));
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
// 4-bit comp'd, normal DAC DMA, no ref byte
|
|
|
|
case 0x74:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 4);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 4-bit comp'd, normal DAC DMA, 1 ref byte
|
|
|
|
case 0x75:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 4|8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 3-bit comp'd, normal DAC DMA, no ref byte
|
|
|
|
case 0x76:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 3);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 3-bit comp'd, normal DAC DMA, 1 ref byte
|
|
|
|
case 0x77:
|
|
|
|
// 1,2: lo(length) hi(length)
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(0xc0, 0x00, length, 3|8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 4-bit comp'd, auto DAC DMA, 1 ref byte
|
|
|
|
case 0x7d:
|
|
|
|
// none
|
|
|
|
dsp_dma(0xc4, 0x00, DSP.dma.blocklength, 4|8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 3-bit comp'd, auto DAC DMA, 1 ref byte
|
|
|
|
case 0x7f:
|
|
|
|
// none
|
|
|
|
dsp_dma(0xc4, 0x00, DSP.dma.blocklength, 3|8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// silence period
|
|
|
|
case 0x80:
|
|
|
|
// 1,2: lo(silence) hi(silence) (len in samples)
|
|
|
|
DSP.datain.getw(&length);
|
2015-02-19 21:45:43 +03:00
|
|
|
// TODO
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
// 8-bit auto DAC DMA, highspeed
|
|
|
|
case 0x90:
|
|
|
|
//none
|
|
|
|
dsp_dma(0xc4, 0x00, DSP.dma.blocklength, 16);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 8-bit normal DAC DMA, highspeed
|
|
|
|
case 0x91:
|
|
|
|
//none
|
|
|
|
dsp_dma(0xc0, 0x00, DSP.dma.blocklength, 16);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// 8-bit auto ADC DMA, highspeed
|
|
|
|
case 0x98:
|
|
|
|
//none
|
|
|
|
dsp_dma(0xcc, 0x00, DSP.dma.blocklength, 16);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x99: // 8-bit normal DMA
|
|
|
|
//none
|
|
|
|
dsp_dma(0xc8, 0x00, DSP.dma.blocklength, 16);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// switch to mono for SBPro DAC/ADC
|
|
|
|
case 0xa0:
|
|
|
|
// none
|
|
|
|
DSP.prostereo = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
// switch to stereo for SBPro DAC/ADC
|
|
|
|
case 0xa8:
|
|
|
|
//// none
|
|
|
|
DSP.prostereo = 2;
|
|
|
|
break;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// 0xb0 ... 0xbf:
|
|
|
|
// 16 bit DAC/ADC DMA, general commands
|
|
|
|
// fallback intended
|
|
|
|
case 0xb0:
|
|
|
|
case 0xb1:
|
|
|
|
case 0xb2:
|
|
|
|
case 0xb3:
|
|
|
|
case 0xb4:
|
|
|
|
case 0xb5:
|
|
|
|
case 0xb6:
|
|
|
|
case 0xb7:
|
|
|
|
case 0xb8:
|
|
|
|
case 0xb9:
|
|
|
|
case 0xba:
|
|
|
|
case 0xbb:
|
|
|
|
case 0xbc:
|
|
|
|
case 0xbd:
|
|
|
|
case 0xbe:
|
|
|
|
case 0xbf:
|
|
|
|
|
|
|
|
// 0xc0 ... 0xcf:
|
|
|
|
// 8 bit DAC/ADC DMA, general commands
|
|
|
|
case 0xc0:
|
|
|
|
case 0xc1:
|
|
|
|
case 0xc2:
|
|
|
|
case 0xc3:
|
|
|
|
case 0xc4:
|
|
|
|
case 0xc5:
|
|
|
|
case 0xc6:
|
|
|
|
case 0xc7:
|
|
|
|
case 0xc8:
|
|
|
|
case 0xc9:
|
|
|
|
case 0xca:
|
|
|
|
case 0xcb:
|
|
|
|
case 0xcc:
|
|
|
|
case 0xcd:
|
|
|
|
case 0xce:
|
|
|
|
case 0xcf:
|
2006-05-06 19:19:57 +04:00
|
|
|
DSP.datain.get(&mode);
|
|
|
|
DSP.datain.getw(&length);
|
|
|
|
dsp_dma(DSP.datain.currentcommand(), mode, length, 0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// pause 8 bit DMA transfer
|
|
|
|
case 0xd0:
|
|
|
|
// none
|
|
|
|
if (DSP.dma.mode != 0)
|
|
|
|
dsp_disabledma();
|
|
|
|
break;
|
|
|
|
|
|
|
|
// speaker on
|
|
|
|
case 0xd1:
|
|
|
|
// none
|
|
|
|
DSP.speaker = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
// speaker off
|
|
|
|
case 0xd3:
|
|
|
|
// none
|
|
|
|
DSP.speaker = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
// continue 8 bit DMA, see 0xd0
|
|
|
|
case 0xd4:
|
|
|
|
// none
|
|
|
|
if (DSP.dma.mode != 0)
|
|
|
|
dsp_enabledma();
|
|
|
|
break;
|
|
|
|
|
|
|
|
// pause 16 bit DMA
|
|
|
|
case 0xd5:
|
|
|
|
// none
|
|
|
|
if (DSP.dma.mode != 0)
|
|
|
|
dsp_disabledma();
|
|
|
|
break;
|
|
|
|
|
|
|
|
// continue 16 bit DMA, see 0xd5
|
|
|
|
case 0xd6:
|
|
|
|
// none
|
|
|
|
if (DSP.dma.mode != 0)
|
|
|
|
dsp_enabledma();
|
|
|
|
break;
|
|
|
|
|
|
|
|
// read speaker on/off (out ff=on, 00=off)
|
|
|
|
case 0xd8:
|
|
|
|
// none, o1: speaker; ff/00
|
2008-02-16 01:05:43 +03:00
|
|
|
DSP.dataout.put((DSP.speaker == 1)?0xff:0x00);
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
// stop 16 bit auto DMA
|
|
|
|
case 0xd9:
|
|
|
|
// none
|
|
|
|
if (DSP.dma.mode != 0)
|
|
|
|
{
|
|
|
|
DSP.dma.mode = 1; // no auto init anymore
|
|
|
|
dsp_dmadone();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
// stop 8 bit auto DMA
|
|
|
|
case 0xda:
|
|
|
|
// none
|
|
|
|
if (DSP.dma.mode != 0)
|
|
|
|
{
|
|
|
|
DSP.dma.mode = 1; // no auto init anymore
|
|
|
|
dsp_dmadone();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
// DSP identification
|
|
|
|
case 0xe0:
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
DSP.dataout.put(~value8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// get version, out 2 bytes (major, minor)
|
|
|
|
case 0xe1:
|
|
|
|
// none, o1/2: version major.minor
|
|
|
|
DSP.dataout.put(4);
|
2008-01-27 01:24:03 +03:00
|
|
|
if (DSP.dataout.put(5) == 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
writelog(WAVELOG(3), "DSP version couldn't be written - buffer overflow");
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2018-05-10 18:50:25 +03:00
|
|
|
case 0xe2:
|
|
|
|
DSP.datain.get(&value8);
|
|
|
|
// TODO
|
|
|
|
writelog(WAVELOG(3), "undocumented DSP command %x ignored (value = 0x%02x)",
|
|
|
|
DSP.datain.currentcommand(), value8);
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
case 0xe3:
|
|
|
|
// none, output: Copyright string
|
|
|
|
// the Windows driver needs the exact text, otherwise it
|
|
|
|
// won't load. Same for diagnose.exe
|
|
|
|
DSP.dataout.puts("COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.");
|
|
|
|
DSP.dataout.put(0); // need extra string end
|
|
|
|
break;
|
|
|
|
|
|
|
|
// write test register
|
2008-01-27 01:24:03 +03:00
|
|
|
case 0xe4:
|
2006-05-06 19:19:57 +04:00
|
|
|
DSP.datain.get(&DSP.testreg);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// read test register
|
2008-01-27 01:24:03 +03:00
|
|
|
case 0xe8:
|
2006-05-06 19:19:57 +04:00
|
|
|
DSP.dataout.put(DSP.testreg);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// Trigger 8-bit IRQ
|
|
|
|
case 0xf2:
|
|
|
|
DSP.dataout.put(0xaa);
|
|
|
|
DSP.irqpending = 1;
|
|
|
|
MIXER.reg[0x82] |= 1; // reg 82 shows the kind of IRQ
|
|
|
|
DEV_pic_raise_irq(BX_SB16_IRQ);
|
|
|
|
break;
|
|
|
|
|
|
|
|
// ??? - Win98 needs this
|
2008-01-27 01:24:03 +03:00
|
|
|
case 0xf9:
|
2005-02-04 22:50:50 +03:00
|
|
|
DSP.datain.get(&value8);
|
|
|
|
switch (value8) {
|
|
|
|
case 0x0e:
|
|
|
|
DSP.dataout.put(0xff);
|
|
|
|
break;
|
|
|
|
case 0x0f:
|
|
|
|
DSP.dataout.put(0x07);
|
|
|
|
break;
|
|
|
|
case 0x37:
|
|
|
|
DSP.dataout.put(0x38);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
DSP.dataout.put(0x00);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// unknown command
|
2008-01-27 01:24:03 +03:00
|
|
|
default:
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(3), "unknown DSP command %x, ignored",
|
|
|
|
DSP.datain.currentcommand());
|
|
|
|
break;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.datain.clearcommand();
|
|
|
|
DSP.datain.flush();
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// dsp_dma() initiates all kinds of dma transfers
|
|
|
|
void bx_sb16_c::dsp_dma(Bit8u command, Bit8u mode, Bit16u length, Bit8u comp)
|
|
|
|
{
|
2008-07-13 19:37:19 +04:00
|
|
|
int ret;
|
2008-07-14 21:44:55 +04:00
|
|
|
bx_list_c *base;
|
2015-01-11 23:13:50 +03:00
|
|
|
bx_bool issigned;
|
2008-07-13 19:37:19 +04:00
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
// command: 8bit, 16bit, in/out, single/auto, fifo
|
|
|
|
// mode: mono/stereo, signed/unsigned
|
2008-01-27 01:24:03 +03:00
|
|
|
// (for info on command and mode see sound blaster programmer's manual,
|
2001-04-10 05:04:59 +04:00
|
|
|
// cmds bx and cx)
|
|
|
|
// length: number of samples - not number of bytes
|
|
|
|
// comp: bit-coded are: type of compression; ref-byte; highspeed
|
|
|
|
// D0..D2: 0=none, 2,3,4 bits ADPCM
|
|
|
|
// D3: ref-byte
|
|
|
|
// D6: highspeed
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(4), "DMA initialized. Cmd %02x, mode %02x, length %d, comp %d",
|
|
|
|
command, mode, length, comp);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2018-05-15 21:51:41 +03:00
|
|
|
dsp_disable_nondma();
|
|
|
|
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((command >> 4) == 0xb) // 0xb? = 16 bit DMA
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.bits = 16;
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.bps = 2;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
else // 0xc? = 8 bit DMA
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.bits = 8;
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.bps = 1;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// Prevent division by zero in some instances
|
2015-01-11 23:13:50 +03:00
|
|
|
if (DSP.dma.param.samplerate == 0)
|
|
|
|
DSP.dma.param.samplerate = 10752;
|
2001-04-10 05:04:59 +04:00
|
|
|
command &= 0x0f;
|
|
|
|
DSP.dma.output = 1 - (command >> 3); // 1=output, 0=input
|
2008-02-16 01:05:43 +03:00
|
|
|
DSP.dma.mode = 1 + ((command >> 2) & 1); // 0=none, 1=normal, 2=auto
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.fifo = (command >> 1) & 1; // ? not sure what this is
|
|
|
|
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.channels = ((mode >> 5) & 1) + 1;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2015-01-11 23:13:50 +03:00
|
|
|
if (DSP.dma.param.channels == 2)
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.bps *= 2;
|
|
|
|
|
|
|
|
DSP.dma.blocklength = length;
|
2015-01-11 23:13:50 +03:00
|
|
|
issigned = (mode >> 4) & 1;
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.highspeed = (comp >> 4) & 1;
|
|
|
|
|
|
|
|
DSP.dma.chunkindex = 0;
|
|
|
|
DSP.dma.chunkcount = 0;
|
|
|
|
|
2015-01-11 23:13:50 +03:00
|
|
|
Bit32u sampledatarate = (Bit32u) DSP.dma.param.samplerate * (Bit32u) DSP.dma.bps;
|
|
|
|
if (DSP.dma.param.bits == 8 || (DSP.dma.param.bits == 16 && BX_SB16_DMAH != 0)) {
|
2014-05-24 01:39:03 +04:00
|
|
|
DSP.dma.count = DSP.dma.blocklength;
|
2006-02-10 00:59:42 +03:00
|
|
|
} else {
|
2014-05-24 01:39:03 +04:00
|
|
|
DSP.dma.count = ((DSP.dma.blocklength + 1) << 1) - 1;
|
2006-02-10 00:59:42 +03:00
|
|
|
}
|
2013-07-07 23:19:59 +04:00
|
|
|
DSP.dma.timer = BX_SB16_THIS dmatimer * BX_DMA_BUFFER_SIZE / sampledatarate;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(5), "DMA is %db, %dHz, %s, %s, mode %d, %s, %s, %d bps, %d usec/DMA",
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.bits, DSP.dma.param.samplerate,
|
|
|
|
(DSP.dma.param.channels == 2)?"stereo":"mono",
|
2006-05-06 19:19:57 +04:00
|
|
|
(DSP.dma.output == 1)?"output":"input", DSP.dma.mode,
|
2015-01-11 23:13:50 +03:00
|
|
|
(issigned == 1)?"signed":"unsigned",
|
2006-05-06 19:19:57 +04:00
|
|
|
(DSP.dma.highspeed == 1)?"highspeed":"normal speed",
|
|
|
|
sampledatarate, DSP.dma.timer);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2015-01-11 23:13:50 +03:00
|
|
|
DSP.dma.param.format = issigned | ((comp & 7) << 1) | ((comp & 8) << 4);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2008-07-13 19:37:19 +04:00
|
|
|
// write the output to the device/file
|
|
|
|
if (DSP.dma.output == 1) {
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS wavemode & 2) {
|
|
|
|
if ((DSP.outputinit & 2) == 0) {
|
|
|
|
base = (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16);
|
2015-04-17 21:37:51 +03:00
|
|
|
bx_param_string_c *waveparam = SIM->get_param_string("wavefile", base);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_WAVEOUT2->openwaveoutput(waveparam->getptr()) == BX_SOUNDLOW_OK)
|
|
|
|
DSP.outputinit |= 2;
|
|
|
|
else
|
|
|
|
DSP.outputinit &= ~2;
|
|
|
|
if (((DSP.outputinit & BX_SB16_THIS wavemode) & 2) == 0) {
|
|
|
|
writelog(WAVELOG(2), "Error opening file %s. Wave file output disabled.",
|
2013-11-24 18:04:34 +04:00
|
|
|
waveparam->getptr());
|
2015-02-19 21:45:43 +03:00
|
|
|
BX_SB16_THIS wavemode = DSP.outputinit;
|
2013-11-19 23:04:21 +04:00
|
|
|
}
|
2008-07-14 21:44:55 +04:00
|
|
|
}
|
2008-07-13 19:37:19 +04:00
|
|
|
}
|
2011-04-26 22:35:43 +04:00
|
|
|
DSP.dma.chunkcount = sampledatarate / 10; // 0.1 sec
|
|
|
|
if (DSP.dma.chunkcount > BX_SOUNDLOW_WAVEPACKETSIZE) {
|
|
|
|
DSP.dma.chunkcount = BX_SOUNDLOW_WAVEPACKETSIZE;
|
|
|
|
}
|
2011-04-11 01:12:30 +04:00
|
|
|
} else {
|
2013-11-24 18:04:34 +04:00
|
|
|
if (DSP.inputinit == 0) {
|
2015-02-14 20:25:39 +03:00
|
|
|
ret = BX_SB16_WAVEIN->openwaveinput(SIM->get_param_string(BXPN_SOUND_WAVEIN)->getptr(), sb16_adc_handler);
|
2013-11-24 18:04:34 +04:00
|
|
|
if (ret != BX_SOUNDLOW_OK) {
|
|
|
|
writelog(WAVELOG(2), "Error: Could not open wave input device.");
|
|
|
|
} else {
|
|
|
|
DSP.inputinit = 1;
|
2011-04-25 12:47:19 +04:00
|
|
|
}
|
2013-11-24 18:04:34 +04:00
|
|
|
}
|
|
|
|
if (DSP.inputinit == 1) {
|
2015-02-14 20:25:39 +03:00
|
|
|
ret = BX_SB16_WAVEIN->startwaverecord(&DSP.dma.param);
|
2013-11-24 18:04:34 +04:00
|
|
|
if (ret != BX_SOUNDLOW_OK) {
|
|
|
|
writelog(WAVELOG(2), "Error: Could not start wave record.");
|
2011-04-11 01:12:30 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
DSP.dma.chunkcount = 0;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
dsp_enabledma();
|
|
|
|
}
|
|
|
|
|
2011-04-11 01:12:30 +04:00
|
|
|
Bit32u bx_sb16_c::sb16_adc_handler(void *this_ptr, Bit32u buflen)
|
|
|
|
{
|
|
|
|
bx_sb16_c *class_ptr = (bx_sb16_c*)this_ptr;
|
|
|
|
class_ptr->dsp_adc_handler(buflen);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
Bit32u bx_sb16_c::dsp_adc_handler(Bit32u buflen)
|
|
|
|
{
|
|
|
|
Bit32u len;
|
|
|
|
|
|
|
|
len = DSP.dma.chunkcount - DSP.dma.chunkindex;
|
|
|
|
if (len > 0) {
|
2014-12-14 21:53:16 +03:00
|
|
|
memmove(DSP.dma.chunk, DSP.dma.chunk+DSP.dma.chunkindex, len);
|
2011-04-11 01:12:30 +04:00
|
|
|
DSP.dma.chunkcount = len;
|
|
|
|
}
|
|
|
|
DSP.dma.chunkindex = 0;
|
|
|
|
if ((DSP.dma.chunkcount + buflen) > BX_SOUNDLOW_WAVEPACKETSIZE) {
|
|
|
|
DSP.dma.chunkcount = BX_SOUNDLOW_WAVEPACKETSIZE;
|
|
|
|
len = DSP.dma.chunkcount + buflen - BX_SOUNDLOW_WAVEPACKETSIZE;
|
|
|
|
BX_DEBUG(("dsp_adc_handler(): unhandled len=%d", len));
|
|
|
|
} else {
|
|
|
|
DSP.dma.chunkcount += buflen;
|
|
|
|
len = 0;
|
|
|
|
}
|
2015-02-14 20:25:39 +03:00
|
|
|
BX_SB16_WAVEIN->getwavepacket(DSP.dma.chunkcount, DSP.dma.chunk);
|
2011-04-11 01:12:30 +04:00
|
|
|
return len;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// dsp_enabledma(): Start the DMA timer and thus the transfer
|
|
|
|
|
|
|
|
void bx_sb16_c::dsp_enabledma()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
bx_pc_system.activate_timer(DSP.timer_handle, DSP.dma.timer, 1);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// dsp_disabledma(): Stop the DMA timer and thus the transfer, but don't abort it
|
|
|
|
void bx_sb16_c::dsp_disabledma()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
bx_pc_system.deactivate_timer(DSP.timer_handle);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2018-05-15 21:51:41 +03:00
|
|
|
void bx_sb16_c::dsp_disable_nondma()
|
|
|
|
{
|
|
|
|
if (DSP.nondma_mode) {
|
|
|
|
bx_pc_system.deactivate_timer(DSP.timer_handle);
|
|
|
|
DSP.nondma_mode = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
// dsp_bufferstatus() checks if the DSP is ready for data/commands
|
|
|
|
Bit32u bx_sb16_c::dsp_bufferstatus()
|
|
|
|
{
|
|
|
|
Bit32u result = 0x7f;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// MSB set -> not ready for commands
|
2001-04-10 05:04:59 +04:00
|
|
|
if (DSP.datain.full() == 1) result |= 0x80;
|
|
|
|
|
|
|
|
writelog(WAVELOG(4), "DSP Buffer status read, result %x", result);
|
|
|
|
|
|
|
|
return(result);
|
|
|
|
}
|
|
|
|
|
|
|
|
// dsp_status() checks if the DSP is ready to send data
|
|
|
|
Bit32u bx_sb16_c::dsp_status()
|
|
|
|
{
|
|
|
|
Bit32u result = 0x7f;
|
|
|
|
|
|
|
|
// read might be to acknowledge IRQ
|
2006-05-06 19:19:57 +04:00
|
|
|
if (DSP.irqpending != 0)
|
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x82] &= (~0x01);
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(4), "8-bit DMA or SBMIDI IRQ acknowledged");
|
2005-02-04 22:50:50 +03:00
|
|
|
if ((MIXER.reg[0x82] & 0x07) == 0) {
|
2002-01-25 23:31:42 +03:00
|
|
|
DSP.irqpending = 0;
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_pic_lower_irq(BX_SB16_IRQ);
|
2002-01-25 23:31:42 +03:00
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// if buffer is not empty, there is data to be read
|
|
|
|
if (DSP.dataout.empty() == 0) result |= 0x80;
|
|
|
|
|
|
|
|
writelog(WAVELOG(4), "DSP output status read, result %x", result);
|
|
|
|
|
|
|
|
return(result);
|
|
|
|
}
|
|
|
|
|
|
|
|
// dsp_irq16ack() notifies that the 16bit DMA IRQ has been acknowledged
|
|
|
|
Bit32u bx_sb16_c::dsp_irq16ack()
|
|
|
|
{
|
|
|
|
Bit32u result = 0xff;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if (DSP.irqpending != 0)
|
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x82] &= (~0x02);
|
2005-02-04 22:50:50 +03:00
|
|
|
if ((MIXER.reg[0x82] & 0x07) == 0) {
|
2002-01-25 23:31:42 +03:00
|
|
|
DSP.irqpending = 0;
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_pic_lower_irq(BX_SB16_IRQ);
|
2002-01-25 23:31:42 +03:00
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(4), "16-bit DMA IRQ acknowledged");
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(3), "16-bit DMA IRQ acknowledged but not active!");
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// the DMA handlers
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// highlevel input and output handlers - rerouting to/from file,device
|
|
|
|
|
|
|
|
// write a wave packet to the output device
|
|
|
|
void bx_sb16_c::dsp_sendwavepacket()
|
|
|
|
{
|
2018-05-15 21:51:41 +03:00
|
|
|
if (DSP.nondma_mode) {
|
|
|
|
if (DSP.nondma_count == 0) {
|
|
|
|
dsp_disable_nondma();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
DSP.nondma_count = 0;
|
|
|
|
}
|
|
|
|
|
2013-11-19 23:04:21 +04:00
|
|
|
if (DSP.dma.chunkindex == 0)
|
|
|
|
return;
|
|
|
|
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS wavemode & 1) {
|
|
|
|
BX_SB16_WAVEOUT1->sendwavepacket(DSP.dma.chunkindex, DSP.dma.chunk, &DSP.dma.param);
|
|
|
|
}
|
|
|
|
if (BX_SB16_THIS wavemode & 2) {
|
|
|
|
BX_SB16_WAVEOUT2->sendwavepacket(DSP.dma.chunkindex, DSP.dma.chunk, &DSP.dma.param);
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.chunkindex = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
// put a sample byte into the output buffer
|
|
|
|
void bx_sb16_c::dsp_getsamplebyte(Bit8u value)
|
|
|
|
{
|
2011-04-26 22:35:43 +04:00
|
|
|
if (DSP.dma.chunkindex < DSP.dma.chunkcount)
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.chunk[DSP.dma.chunkindex++] = value;
|
|
|
|
|
2011-04-26 22:35:43 +04:00
|
|
|
if (DSP.dma.chunkindex >= DSP.dma.chunkcount)
|
2001-04-10 05:04:59 +04:00
|
|
|
dsp_sendwavepacket();
|
|
|
|
}
|
|
|
|
|
|
|
|
// read a sample byte from the input buffer
|
|
|
|
Bit8u bx_sb16_c::dsp_putsamplebyte()
|
|
|
|
{
|
2011-04-11 01:12:30 +04:00
|
|
|
Bit8u value = DSP.dma.chunk[DSP.dma.chunkindex++];
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2011-04-11 01:12:30 +04:00
|
|
|
if (DSP.dma.chunkindex >= DSP.dma.chunkcount) {
|
|
|
|
DSP.dma.chunkcount = 0;
|
|
|
|
DSP.dma.chunkindex = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return value;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// called when the last byte of a DMA transfer has been received/sent
|
|
|
|
void bx_sb16_c::dsp_dmadone()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(4), "DMA transfer done, triggering IRQ");
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2008-07-12 19:21:36 +04:00
|
|
|
if ((DSP.dma.output == 1) && (DSP.dma.mode != 2)) {
|
|
|
|
dsp_sendwavepacket(); // flush the output
|
2011-04-11 01:12:30 +04:00
|
|
|
} else if ((DSP.dma.output == 0) && (DSP.dma.mode != 2)) {
|
2015-02-19 21:45:43 +03:00
|
|
|
BX_SB16_WAVEIN->stopwaverecord();
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// generate the appropriate IRQ
|
2015-01-11 23:13:50 +03:00
|
|
|
if (DSP.dma.param.bits == 8)
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x82] |= 1;
|
2006-05-06 19:19:57 +04:00
|
|
|
else
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x82] |= 2;
|
|
|
|
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_pic_raise_irq(BX_SB16_IRQ);
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.irqpending = 1;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// if auto-DMA, reinitialize
|
2001-04-10 05:04:59 +04:00
|
|
|
if (DSP.dma.mode == 2)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2015-01-11 23:13:50 +03:00
|
|
|
if (DSP.dma.param.bits == 8 || (DSP.dma.param.bits == 16 && BX_SB16_DMAH != 0)) {
|
2014-05-24 01:39:03 +04:00
|
|
|
DSP.dma.count = DSP.dma.blocklength;
|
2006-02-10 00:59:42 +03:00
|
|
|
} else {
|
2014-05-24 01:39:03 +04:00
|
|
|
DSP.dma.count = ((DSP.dma.blocklength + 1) << 1) - 1;
|
2006-02-10 00:59:42 +03:00
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(WAVELOG(4), "auto-DMA reinitializing to length %d", DSP.dma.count);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
DSP.dma.mode = 0;
|
|
|
|
dsp_disabledma();
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// now the actual transfer routines, called by the DMA controller
|
|
|
|
// note that read = from application to soundcard (output),
|
|
|
|
// and write = from soundcard to application (input)
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u bx_sb16_c::dma_read8(Bit8u *buffer, Bit16u maxlen)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u len = 0;
|
|
|
|
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_dma_set_drq(BX_SB16_DMAL, 0); // the timer will raise it again
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
writelog(WAVELOG(5), "Received 8-bit DMA: 0x%02x, %d remaining ",
|
|
|
|
buffer[0], DSP.dma.count);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
do {
|
|
|
|
dsp_getsamplebyte(buffer[len++]);
|
|
|
|
DSP.dma.count--;
|
|
|
|
} while ((len < maxlen) && (DSP.dma.count != 0xffff));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (DSP.dma.count == 0xffff) // last byte received
|
|
|
|
dsp_dmadone();
|
2012-07-13 01:20:46 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
return len;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u bx_sb16_c::dma_write8(Bit8u *buffer, Bit16u maxlen)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u len = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
DEV_dma_set_drq(BX_SB16_DMAL, 0); // the timer will raise it again
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
do {
|
|
|
|
buffer[len++] = dsp_putsamplebyte();
|
|
|
|
DSP.dma.count--;
|
|
|
|
} while ((len < maxlen) && (DSP.dma.count != 0xffff));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
writelog(WAVELOG(5), "Sent 8-bit DMA: 0x%02x, %d remaining ",
|
|
|
|
buffer[0], DSP.dma.count);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (DSP.dma.count == 0xffff) // last byte sent
|
|
|
|
dsp_dmadone();
|
2012-07-13 01:20:46 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
return len;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u bx_sb16_c::dma_read16(Bit16u *buffer, Bit16u maxlen)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u len = 0;
|
|
|
|
Bit8u *buf8;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
DEV_dma_set_drq(BX_SB16_DMAH, 0); // the timer will raise it again
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
writelog(WAVELOG(5), "Received 16-bit DMA: 0x%04x, %d remaining ",
|
|
|
|
buffer[0], DSP.dma.count);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
do {
|
|
|
|
buf8 = (Bit8u*)(buffer+len);
|
|
|
|
dsp_getsamplebyte(buf8[0]);
|
|
|
|
dsp_getsamplebyte(buf8[1]);
|
|
|
|
len++;
|
|
|
|
DSP.dma.count--;
|
|
|
|
} while ((len < maxlen) && (DSP.dma.count != 0xffff));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-02-10 00:59:42 +03:00
|
|
|
if (DSP.dma.count == 0xffff) // last word received
|
2001-04-10 05:04:59 +04:00
|
|
|
dsp_dmadone();
|
2012-07-13 01:20:46 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
return len;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u bx_sb16_c::dma_write16(Bit16u *buffer, Bit16u maxlen)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2012-07-14 18:20:36 +04:00
|
|
|
Bit16u len = 0;
|
|
|
|
Bit8u *buf8;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_dma_set_drq(BX_SB16_DMAH, 0); // the timer will raise it again
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
do {
|
|
|
|
buf8 = (Bit8u*)(buffer+len);
|
|
|
|
buf8[0] = dsp_putsamplebyte();
|
|
|
|
buf8[1] = dsp_putsamplebyte();
|
|
|
|
len++;
|
|
|
|
DSP.dma.count--;
|
|
|
|
} while ((len < maxlen) && (DSP.dma.count != 0xffff));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
writelog(WAVELOG(5), "Sent 16-bit DMA: 0x%4x, %d remaining ",
|
|
|
|
buffer[0], DSP.dma.count);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-02-10 00:59:42 +03:00
|
|
|
if (DSP.dma.count == 0xffff) // last word sent
|
2001-04-10 05:04:59 +04:00
|
|
|
dsp_dmadone();
|
2012-07-13 01:20:46 +04:00
|
|
|
|
2012-07-14 18:20:36 +04:00
|
|
|
return len;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2015-03-27 18:49:40 +03:00
|
|
|
Bit16u bx_sb16_c::calc_output_volume(Bit8u reg1, Bit8u reg2, bx_bool shift)
|
|
|
|
{
|
|
|
|
Bit8u vol1, vol2;
|
2015-03-31 21:01:52 +03:00
|
|
|
float fvol1, fvol2;
|
2015-03-27 18:49:40 +03:00
|
|
|
Bit16u result;
|
|
|
|
|
|
|
|
vol1 = (MIXER.reg[reg1] >> 3);
|
|
|
|
vol2 = (MIXER.reg[reg2] >> 3);
|
2015-03-31 21:01:52 +03:00
|
|
|
fvol1 = pow(10.0f, (float)(31-vol1)*-0.065f);
|
|
|
|
fvol2 = pow(10.0f, (float)(31-vol2)*-0.065f);
|
|
|
|
result = (Bit8u)(255 * fvol1 * fvol2);
|
2015-03-27 18:49:40 +03:00
|
|
|
if (shift) result <<= 8;
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// the mixer, supported type is CT1745 (as in an SB16)
|
2001-04-10 05:04:59 +04:00
|
|
|
void bx_sb16_c::mixer_writedata(Bit32u value)
|
|
|
|
{
|
|
|
|
int i;
|
2015-03-31 21:01:52 +03:00
|
|
|
Bit8u set_output_vol = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// do some action depending on what register was written
|
2008-01-27 01:24:03 +03:00
|
|
|
switch (MIXER.regindex)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
case 0: // initialize mixer
|
|
|
|
writelog(BOTHLOG(4), "Initializing mixer...");
|
2003-12-20 20:04:08 +03:00
|
|
|
MIXER.reg[0x04] = 0xcc;
|
|
|
|
MIXER.reg[0x0a] = 0x00;
|
|
|
|
MIXER.reg[0x22] = 0xcc;
|
|
|
|
MIXER.reg[0x26] = 0xcc;
|
|
|
|
MIXER.reg[0x28] = 0x00;
|
|
|
|
MIXER.reg[0x2e] = 0x00;
|
|
|
|
MIXER.reg[0x3c] = 0x1f;
|
|
|
|
MIXER.reg[0x3d] = 0x15;
|
|
|
|
MIXER.reg[0x3e] = 0x0b;
|
|
|
|
for (i=0x30; i<=0x35; i++)
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[i] = 0xc0;
|
2003-12-20 20:04:08 +03:00
|
|
|
for (i=0x36; i<=0x3b; i++)
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[i] = 0x00;
|
2003-12-20 20:04:08 +03:00
|
|
|
for (i=0x3f; i<=0x43; i++)
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[i] = 0x00;
|
2003-12-20 20:04:08 +03:00
|
|
|
for (i=0x44; i<=0x47; i++)
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[i] = 0x80;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
MIXER.regindex = 0; // next mixer register read is register 0
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 3;
|
2015-04-03 15:18:53 +03:00
|
|
|
break;
|
2003-12-20 20:04:08 +03:00
|
|
|
|
|
|
|
case 0x04: // DAC level
|
|
|
|
MIXER.reg[0x32] = (value & 0xf0) | 0x08;
|
|
|
|
MIXER.reg[0x33] = ((value & 0x0f) << 4) | 0x08;
|
2015-03-27 18:49:40 +03:00
|
|
|
set_output_vol = 1;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x0a: // microphone level
|
|
|
|
MIXER.reg[0x3a] = (value << 5) | 0x18;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x22: // master volume
|
|
|
|
MIXER.reg[0x30] = (value & 0xf0) | 0x08;
|
|
|
|
MIXER.reg[0x31] = ((value & 0x0f) << 4) | 0x08;
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 3;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x26: // FM level
|
|
|
|
MIXER.reg[0x34] = (value & 0xf0) | 0x08;
|
|
|
|
MIXER.reg[0x35] = ((value & 0x0f) << 4) | 0x08;
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 2;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x28: // CD audio level
|
|
|
|
MIXER.reg[0x36] = (value & 0xf0) | 0x08;
|
|
|
|
MIXER.reg[0x37] = ((value & 0x0f) << 4) | 0x08;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x2e: // line in level
|
|
|
|
MIXER.reg[0x38] = (value & 0xf0) | 0x08;
|
|
|
|
MIXER.reg[0x39] = ((value & 0x0f) << 4) | 0x08;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x30: // master volume left
|
|
|
|
MIXER.reg[0x22] &= 0x0f;
|
|
|
|
MIXER.reg[0x22] |= (value & 0xf0);
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 3;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x31: // master volume right
|
|
|
|
MIXER.reg[0x22] &= 0xf0;
|
|
|
|
MIXER.reg[0x22] |= (value >> 4);
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 3;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x32: // DAC level left
|
|
|
|
MIXER.reg[0x04] &= 0x0f;
|
|
|
|
MIXER.reg[0x04] |= (value & 0xf0);
|
2015-03-27 18:49:40 +03:00
|
|
|
set_output_vol = 1;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x33: // DAC level right
|
|
|
|
MIXER.reg[0x04] &= 0xf0;
|
|
|
|
MIXER.reg[0x04] |= (value >> 4);
|
2015-03-27 18:49:40 +03:00
|
|
|
set_output_vol = 1;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x34: // FM level left
|
|
|
|
MIXER.reg[0x26] &= 0x0f;
|
|
|
|
MIXER.reg[0x26] |= (value & 0xf0);
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 2;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x35: // FM level right
|
|
|
|
MIXER.reg[0x26] &= 0xf0;
|
|
|
|
MIXER.reg[0x26] |= (value >> 4);
|
2015-03-31 21:01:52 +03:00
|
|
|
set_output_vol = 2;
|
2003-12-20 20:04:08 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x36: // CD audio level left
|
|
|
|
MIXER.reg[0x28] &= 0x0f;
|
|
|
|
MIXER.reg[0x28] |= (value & 0xf0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x37: // CD audio level right
|
|
|
|
MIXER.reg[0x28] &= 0xf0;
|
|
|
|
MIXER.reg[0x28] |= (value >> 4);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x38: // line in level left
|
|
|
|
MIXER.reg[0x2e] &= 0x0f;
|
|
|
|
MIXER.reg[0x2e] |= (value & 0xf0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x39: // line in level right
|
|
|
|
MIXER.reg[0x2e] &= 0xf0;
|
|
|
|
MIXER.reg[0x2e] |= (value >> 4);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x3a: // microphone level
|
|
|
|
MIXER.reg[0x0a] = (value >> 5);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x3b:
|
|
|
|
case 0x3c:
|
|
|
|
case 0x3d:
|
|
|
|
case 0x3e:
|
|
|
|
case 0x3f:
|
|
|
|
case 0x40:
|
|
|
|
case 0x41:
|
|
|
|
case 0x42:
|
|
|
|
case 0x43:
|
|
|
|
case 0x44:
|
|
|
|
case 0x45:
|
|
|
|
case 0x46:
|
|
|
|
case 0x47:
|
2001-04-10 05:04:59 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x80: // IRQ mask
|
|
|
|
case 0x81: // DMA mask
|
2003-12-20 20:04:08 +03:00
|
|
|
MIXER.reg[MIXER.regindex] = value;
|
2001-04-10 05:04:59 +04:00
|
|
|
set_irq_dma(); // both 0x80 and 0x81 handled
|
2003-12-20 20:04:08 +03:00
|
|
|
return;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2003-12-20 20:04:08 +03:00
|
|
|
default: // ignore read-only registers
|
|
|
|
return;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
|
|
|
|
2003-12-20 20:04:08 +03:00
|
|
|
// store the value
|
2015-04-03 15:18:53 +03:00
|
|
|
if (MIXER.regindex != 0) {
|
|
|
|
MIXER.reg[MIXER.regindex] = value;
|
|
|
|
}
|
2003-12-20 20:04:08 +03:00
|
|
|
|
2015-03-31 21:01:52 +03:00
|
|
|
if (set_output_vol & 1) {
|
2015-03-27 18:49:40 +03:00
|
|
|
DSP.dma.param.volume = calc_output_volume(0x30, 0x32, 0);
|
|
|
|
DSP.dma.param.volume |= calc_output_volume(0x31, 0x33, 1);
|
2015-03-31 21:01:52 +03:00
|
|
|
}
|
|
|
|
if (set_output_vol & 2) {
|
2015-03-27 18:49:40 +03:00
|
|
|
BX_SB16_THIS fm_volume = calc_output_volume(0x30, 0x34, 0);
|
|
|
|
BX_SB16_THIS fm_volume |= calc_output_volume(0x31, 0x35, 1);
|
2013-12-13 19:58:27 +04:00
|
|
|
}
|
|
|
|
|
2003-12-20 20:04:08 +03:00
|
|
|
writelog(BOTHLOG(4), "mixer register %02x set to %02x",
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.regindex, MIXER.reg[MIXER.regindex]);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
Bit32u bx_sb16_c::mixer_readdata()
|
|
|
|
{
|
2003-12-20 20:04:08 +03:00
|
|
|
writelog(BOTHLOG(4), "read from mixer register %02x returns %02x",
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.regindex, MIXER.reg[MIXER.regindex]);
|
2001-04-10 05:04:59 +04:00
|
|
|
return(MIXER.reg[MIXER.regindex]);
|
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_c::mixer_writeregister(Bit32u value)
|
|
|
|
{
|
|
|
|
MIXER.regindex = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_c::set_irq_dma()
|
|
|
|
{
|
2002-10-25 15:44:41 +04:00
|
|
|
static bx_bool isInitialized=0;
|
2001-04-10 05:04:59 +04:00
|
|
|
int newirq;
|
2002-06-16 19:02:28 +04:00
|
|
|
int oldDMA8, oldDMA16;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// set the IRQ according to the value in mixer register 0x80
|
2008-01-27 01:24:03 +03:00
|
|
|
switch (MIXER.reg[0x80])
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
case 1:
|
|
|
|
newirq = 2;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
newirq = 5;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
newirq = 7;
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
newirq = 10;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
newirq = 5;
|
2008-01-27 01:24:03 +03:00
|
|
|
writelog(BOTHLOG(3), "Bad value %02x in mixer register 0x80. IRQ set to %d",
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[0x80], newirq);
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x80] = 2;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
if (newirq != BX_SB16_IRQ) // a different IRQ was set
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
if (BX_SB16_IRQ > 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
DEV_unregister_irq(BX_SB16_IRQ, "SB16");
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
BX_SB16_IRQ = newirq;
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_register_irq(BX_SB16_IRQ, "SB16");
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// set the 8 bit DMA
|
2002-06-16 19:02:28 +04:00
|
|
|
oldDMA8=BX_SB16_DMAL;
|
2001-04-10 05:04:59 +04:00
|
|
|
switch (MIXER.reg[0x81] & 0x0f)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2008-01-27 01:24:03 +03:00
|
|
|
case 1:
|
2001-04-10 05:04:59 +04:00
|
|
|
BX_SB16_DMAL = 0;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
BX_SB16_DMAL = 1;
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
BX_SB16_DMAL = 3;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BX_SB16_DMAL = 1;
|
|
|
|
writelog(BOTHLOG(3), "Bad value %02x in mixer register 0x81. DMA8 set to %d",
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[0x81], BX_SB16_DMAL);
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x81] &= (~0x0f);
|
|
|
|
MIXER.reg[0x81] |= (1 << BX_SB16_DMAL);
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-06-16 19:02:28 +04:00
|
|
|
// Unregister the previous DMA if initialized
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((isInitialized) && (oldDMA8 != BX_SB16_DMAL))
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_dma_unregister_channel(oldDMA8);
|
2002-06-16 19:02:28 +04:00
|
|
|
|
|
|
|
// And register the new 8bits DMA Channel
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((!isInitialized) || (oldDMA8 != BX_SB16_DMAL))
|
2002-11-13 21:39:41 +03:00
|
|
|
DEV_dma_register_8bit_channel(BX_SB16_DMAL, dma_read8, dma_write8, "SB16");
|
2002-06-16 19:02:28 +04:00
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
// and the 16 bit DMA
|
2002-06-16 19:02:28 +04:00
|
|
|
oldDMA16=BX_SB16_DMAH;
|
2001-04-10 05:04:59 +04:00
|
|
|
switch (MIXER.reg[0x81] >> 4)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
case 0:
|
|
|
|
BX_SB16_DMAH = 0; // no 16-bit DMA
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
BX_SB16_DMAH = 5;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
BX_SB16_DMAH = 6;
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
BX_SB16_DMAH = 7;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BX_SB16_DMAH = 0;
|
|
|
|
writelog(BOTHLOG(3), "Bad value %02x in mixer register 0x81. DMA16 set to %d",
|
2006-05-06 19:19:57 +04:00
|
|
|
MIXER.reg[0x81], BX_SB16_DMAH);
|
2001-04-10 05:04:59 +04:00
|
|
|
MIXER.reg[0x81] &= (~0xf0);
|
|
|
|
// MIXER.reg[0x81] |= (1 << BX_SB16_DMAH);
|
|
|
|
// no default 16 bit channel!
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-06-16 19:02:28 +04:00
|
|
|
// Unregister the previous DMA if initialized
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((isInitialized) && (oldDMA16 != 0) && (oldDMA16 != BX_SB16_DMAH))
|
2002-10-25 01:07:56 +04:00
|
|
|
DEV_dma_unregister_channel(oldDMA16);
|
2002-06-16 19:02:28 +04:00
|
|
|
|
|
|
|
// And register the new 16bits DMA Channel
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((BX_SB16_DMAH != 0) && (oldDMA16 != BX_SB16_DMAH))
|
2002-11-13 21:39:41 +03:00
|
|
|
DEV_dma_register_16bit_channel(BX_SB16_DMAH, dma_read16, dma_write16, "SB16");
|
2002-06-16 19:02:28 +04:00
|
|
|
|
|
|
|
// If not already initialized
|
|
|
|
if(!isInitialized) {
|
|
|
|
isInitialized=1;
|
2005-08-27 12:17:13 +04:00
|
|
|
} else {
|
2008-01-27 01:24:03 +03:00
|
|
|
writelog(BOTHLOG(1), "Resources set to I%d D%d H%d",
|
2005-08-27 12:17:13 +04:00
|
|
|
BX_SB16_IRQ, BX_SB16_DMAL, BX_SB16_DMAH);
|
2002-06-16 19:02:28 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// now the MPU 401 part
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// the MPU 401 status port shows if input or output are ready
|
|
|
|
// Note that the bits are inverse to their meaning
|
|
|
|
|
|
|
|
Bit32u bx_sb16_c::mpu_status()
|
|
|
|
{
|
|
|
|
Bit32u result = 0;
|
|
|
|
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((MPU.datain.full() == 1) ||
|
2015-02-19 21:45:43 +03:00
|
|
|
((BX_SB16_THIS midimode & 1) &&
|
|
|
|
(BX_SB16_MIDIOUT1->midiready() == BX_SOUNDLOW_ERR)))
|
2006-05-06 19:19:57 +04:00
|
|
|
result |= 0x40; // output not ready
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.dataout.empty() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
result |= 0x80; // no input available
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
writelog(MIDILOG(4), "MPU status port, result %02x", result);
|
|
|
|
|
|
|
|
return(result);
|
|
|
|
}
|
|
|
|
|
|
|
|
// the MPU 401 command port
|
|
|
|
|
|
|
|
void bx_sb16_c::mpu_command(Bit32u value)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
int bytesneeded;
|
|
|
|
|
|
|
|
if (MPU.cmd.hascommand() == 1) // already a command pending, abort that one
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
if ((MPU.cmd.currentcommand() != value) ||
|
2008-02-16 01:05:43 +03:00
|
|
|
(MPU.cmd.commanddone() == 0))
|
2006-05-06 19:19:57 +04:00
|
|
|
// it's a different command, or the old one isn't done yet, abort it
|
|
|
|
{
|
|
|
|
MPU.cmd.clearcommand();
|
|
|
|
MPU.cmd.flush();
|
|
|
|
}
|
|
|
|
|
|
|
|
// if it's the same one, and we just completed the argument list,
|
|
|
|
// we leave it as it is and process it here
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (MPU.cmd.hascommand() == 0) // no command pending, set one up
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
bytesneeded = 0;
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((value >> 4) == 14) bytesneeded = 1;
|
2001-04-10 05:04:59 +04:00
|
|
|
MPU.cmd.newcommand(value, bytesneeded);
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (MPU.cmd.commanddone() == 1) // command is complete, process it
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
switch (MPU.cmd.currentcommand())
|
|
|
|
{
|
|
|
|
case 0x3f:
|
|
|
|
writelog(MIDILOG(5), "MPU cmd: UART mode on");
|
|
|
|
MPU.uartmode=1;
|
|
|
|
MPU.irqpending=1;
|
|
|
|
MPU.singlecommand=0;
|
|
|
|
if (BX_SB16_IRQMPU != -1) {
|
|
|
|
MIXER.reg[0x82] |= 4;
|
|
|
|
DEV_pic_raise_irq(BX_SB16_IRQMPU);
|
|
|
|
}
|
|
|
|
break;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
case 0xff:
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(4), "MPU cmd: Master reset of device");
|
|
|
|
MPU.uartmode=MPU.forceuartmode;
|
|
|
|
MPU.singlecommand=0;
|
|
|
|
for (i=0; i<16; i++)
|
|
|
|
{
|
|
|
|
MPU.banklsb[i] = 0;
|
|
|
|
MPU.bankmsb[i] = 0;
|
|
|
|
MPU.program[i] = 0;
|
|
|
|
}
|
|
|
|
MPU.cmd.reset();
|
|
|
|
MPU.dataout.reset();
|
|
|
|
MPU.datain.reset();
|
|
|
|
MPU.midicmd.reset();
|
|
|
|
break;
|
|
|
|
case 0xd0: // d0 and df: prefix for midi command
|
|
|
|
case 0xdf: // like uart mode, but only a single command
|
|
|
|
MPU.singlecommand = 1;
|
2008-01-27 01:24:03 +03:00
|
|
|
writelog(MIDILOG(4), "MPU: prefix %02x received",
|
2006-05-06 19:19:57 +04:00
|
|
|
MPU.cmd.currentcommand());
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
writelog(MIDILOG(3), "MPU cmd: unknown command %02x ignored",
|
|
|
|
MPU.cmd.currentcommand());
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Need to put an MPU_ACK into the data port if command successful
|
2008-01-27 01:24:03 +03:00
|
|
|
// we'll fake it even if we didn't process the command, so as to
|
2006-05-06 19:19:57 +04:00
|
|
|
// allow detection of the MPU 401.
|
|
|
|
if (MPU.dataout.put(0xfe) == 0)
|
|
|
|
writelog(MIDILOG(3), "MPU_ACK error - output buffer full");
|
|
|
|
MPU.cmd.clearcommand(); // clear the command from the buffer
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// MPU 401 data port/read: contains an MPU_ACK after receiving a command
|
|
|
|
// Will contain other data as well when other than UART mode is supported
|
|
|
|
|
|
|
|
Bit32u bx_sb16_c::mpu_dataread()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
Bit8u res8bit;
|
|
|
|
Bit32u result;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// also acknowledge IRQ?
|
|
|
|
if (MPU.irqpending != 0)
|
|
|
|
{
|
|
|
|
MPU.irqpending = 0;
|
|
|
|
MIXER.reg[0x82] &= (~4);
|
|
|
|
if ((MIXER.reg[0x82] & 0x07) == 0)
|
|
|
|
DEV_pic_lower_irq(BX_SB16_IRQMPU);
|
|
|
|
writelog(MIDILOG(4), "MPU IRQ acknowledged");
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if (MPU.dataout.get(&res8bit) == 0) {
|
|
|
|
writelog(MIDILOG(3), "MPU data port not ready - no data in buffer");
|
|
|
|
result = 0xff;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
result = (Bit32u) res8bit;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(4), "MPU data port, result %02x", result);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
return(result);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// MPU 401 data port/write: This is where the midi stream comes from,
|
|
|
|
// as well as arguments to any pending command
|
|
|
|
|
|
|
|
void bx_sb16_c::mpu_datawrite(Bit32u value)
|
|
|
|
{
|
|
|
|
writelog(MIDILOG(4), "write to MPU data port, value %02x", value);
|
|
|
|
|
|
|
|
if (MPU.cmd.hascommand() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // there is a command pending, add arguments to it
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.cmd.put(value) == 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(3), "MPU Command arguments too long - buffer full");
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.cmd.commanddone() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
BX_SB16_THIS mpu_command(MPU.cmd.currentcommand());
|
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
else if ((MPU.uartmode == 0) && (MPU.singlecommand == 0))
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
// Hm? No UART mode, but still data? Maybe should send it
|
|
|
|
// to the command port... Only SBMPU401.EXE does this...
|
|
|
|
writelog(MIDILOG(4), "MPU Data %02x received but no UART mode. Assuming it's a command.", value);
|
|
|
|
mpu_command(value);
|
|
|
|
return;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else // no MPU command pending, in UART mode, this has to be midi data
|
|
|
|
mpu_mididata(value);
|
|
|
|
}
|
|
|
|
|
|
|
|
// A byte of midi data has been received
|
|
|
|
void bx_sb16_c::mpu_mididata(Bit32u value)
|
|
|
|
{
|
|
|
|
// first, find out if it is a midi command or midi data
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool ismidicommand = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
if (value >= 0x80)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // bit 8 usually denotes a midi command...
|
2001-04-10 05:04:59 +04:00
|
|
|
ismidicommand = 1;
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((value == 0xf7) && (MPU.midicmd.currentcommand() == 0xf0))
|
|
|
|
// ...except if it is a continuing SYSEX message, then it just
|
|
|
|
// denotes the end of a SYSEX chunk, not the start of a message
|
|
|
|
{
|
|
|
|
ismidicommand = 0; // first, it's not a command
|
2008-01-27 01:24:03 +03:00
|
|
|
MPU.midicmd.newcommand(MPU.midicmd.currentcommand(),
|
2006-05-06 19:19:57 +04:00
|
|
|
MPU.midicmd.bytes());
|
|
|
|
// Then, set needed bytes to current buffer
|
|
|
|
// because we didn't know the length before
|
|
|
|
}
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
if (ismidicommand == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // this is a command, check if an old one is pending
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.midicmd.hascommand() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
writelog(MIDILOG(3), "Midi command %02x incomplete, has %d of %d bytes.",
|
2008-01-27 01:24:03 +03:00
|
|
|
MPU.midicmd.currentcommand(), MPU.midicmd.bytes(),
|
2008-02-16 01:05:43 +03:00
|
|
|
MPU.midicmd.commandbytes());
|
2006-05-06 19:19:57 +04:00
|
|
|
// write as much as we can. Should we do this?
|
|
|
|
processmidicommand(0);
|
|
|
|
// clear the pending command
|
|
|
|
MPU.midicmd.clearcommand();
|
|
|
|
MPU.midicmd.flush();
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// find the number of arguments to the command
|
|
|
|
static const signed eventlength[] = { 2, 2, 2, 2, 1, 1, 2, 255};
|
|
|
|
// note - length 255 commands have unknown length
|
2008-02-16 01:05:43 +03:00
|
|
|
MPU.midicmd.newcommand(value, eventlength[(value & 0x70) >> 4]);
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else // no command, just arguments to the old command
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.midicmd.hascommand() == 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // no command pending, ignore the data
|
|
|
|
writelog(MIDILOG(3), "Midi data %02x received, but no command pending?", value);
|
|
|
|
return;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// just some data to the command
|
|
|
|
if (MPU.midicmd.put(value) == 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(3), "Midi buffer overflow!");
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.midicmd.commanddone() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
// the command is complete, process it
|
2008-01-27 01:24:03 +03:00
|
|
|
writelog(MIDILOG(5), "Midi command %02x complete, has %d bytes.",
|
2008-02-16 01:05:43 +03:00
|
|
|
MPU.midicmd.currentcommand(), MPU.midicmd.bytes());
|
2006-05-06 19:19:57 +04:00
|
|
|
processmidicommand(0);
|
|
|
|
// and remove the command from the buffer
|
|
|
|
MPU.midicmd.clearcommand();
|
|
|
|
MPU.midicmd.flush();
|
|
|
|
}
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// The emulator port/read: See if commands were successful
|
|
|
|
|
|
|
|
Bit32u bx_sb16_c::emul_read()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
Bit8u res8bit;
|
|
|
|
Bit32u result;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if (EMUL.datain.get(&res8bit) == 0)
|
|
|
|
{
|
|
|
|
writelog(3, "emulator port not ready - no data in buffer");
|
|
|
|
result = 0x00;
|
|
|
|
}
|
|
|
|
else result = (Bit32u) res8bit;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(4, "emulator port, result %02x", result);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
return(result);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Emulator port/write: Changing instrument mapping etc.
|
|
|
|
|
|
|
|
void bx_sb16_c::emul_write(Bit32u value)
|
|
|
|
{
|
2007-04-08 19:02:50 +04:00
|
|
|
Bit8u value8 = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
writelog(4, "write to emulator port, value %02x", value);
|
|
|
|
|
|
|
|
if (EMUL.dataout.hascommand() == 0) // no command pending, set it up
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
static signed char cmdlength[] = { 0, 0, 4, 2, 6, 1, 0, 0, 1, 1, 0, 1};
|
|
|
|
if (value > 11)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(3, "emulator command %02x unknown, ignored.", value);
|
|
|
|
return;
|
2008-01-27 01:24:03 +03:00
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(5, "emulator command %02x, needs %d arguments",
|
|
|
|
value, cmdlength[value]);
|
|
|
|
EMUL.dataout.newcommand(value, cmdlength[value]);
|
|
|
|
EMUL.datain.reset();
|
|
|
|
EMUL.datain.put(0xfe);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
|
|
|
EMUL.dataout.put(value); // otherwise just add data
|
|
|
|
|
|
|
|
if (EMUL.dataout.commanddone() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // process the command
|
|
|
|
writelog(4, "executing emulator command %02x with %d arguments",
|
|
|
|
EMUL.dataout.currentcommand(), EMUL.dataout.bytes());
|
|
|
|
switch (EMUL.dataout.currentcommand())
|
|
|
|
{
|
|
|
|
case 0: // reinit of emulator
|
|
|
|
writelog(4, "Emulator reinitialized");
|
|
|
|
EMUL.remaps = 0;
|
|
|
|
EMUL.dataout.reset();
|
|
|
|
EMUL.datain.reset();
|
|
|
|
EMUL.datain.put(0xfe);
|
|
|
|
break;
|
|
|
|
case 1: // dummy command to reset state of emulator port
|
|
|
|
// just give a few times to end any commands
|
|
|
|
break;
|
|
|
|
case 2: // map bank
|
2015-04-06 19:03:04 +03:00
|
|
|
if (EMUL.remaps >= BX_SB16_MAX_REMAPS) break;
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].oldbankmsb));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].oldbanklsb));
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldprogch = 0xff;
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].newbankmsb));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].newbanklsb));
|
|
|
|
EMUL.remaplist[EMUL.remaps].newprogch = 0xff;
|
|
|
|
EMUL.datain.put(4);
|
|
|
|
writelog(4, "Map bank command received, from %d %d to %d %d",
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldbankmsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldbanklsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].newbankmsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].newbanklsb);
|
|
|
|
EMUL.remaps++;
|
|
|
|
break;
|
|
|
|
case 3: // map program change
|
2015-04-06 19:03:04 +03:00
|
|
|
if (EMUL.remaps >= BX_SB16_MAX_REMAPS) break;
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.remaplist[EMUL.remaps].oldbankmsb = 0xff;
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldbanklsb = 0xff;
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].oldprogch));
|
|
|
|
EMUL.remaplist[EMUL.remaps].newbankmsb = 0xff;
|
|
|
|
EMUL.remaplist[EMUL.remaps].newbanklsb = 0xff;
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].newprogch));
|
|
|
|
EMUL.datain.put(2);
|
|
|
|
writelog(4, "Map program change received, from %d to %d",
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldprogch,
|
|
|
|
EMUL.remaplist[EMUL.remaps].newprogch);
|
|
|
|
EMUL.remaps++;
|
|
|
|
break;
|
|
|
|
case 4: // map bank and program change
|
2015-04-06 19:03:04 +03:00
|
|
|
if (EMUL.remaps >= BX_SB16_MAX_REMAPS) break;
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].oldbankmsb));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].oldbanklsb));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].oldprogch));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].newbankmsb));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].newbanklsb));
|
|
|
|
EMUL.dataout.get (& (EMUL.remaplist[EMUL.remaps].newprogch));
|
|
|
|
EMUL.datain.put(6);
|
|
|
|
writelog(4, "Complete remap received, from %d %d %d to %d %d %d",
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldbankmsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldbanklsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].oldprogch,
|
|
|
|
EMUL.remaplist[EMUL.remaps].newbankmsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].newbanklsb,
|
|
|
|
EMUL.remaplist[EMUL.remaps].newprogch);
|
|
|
|
|
|
|
|
EMUL.remaps++;
|
|
|
|
break;
|
|
|
|
case 5: EMUL.dataout.get(&value8); // dump emulator state
|
|
|
|
switch (value8)
|
|
|
|
{
|
2008-01-27 01:24:03 +03:00
|
|
|
case 0:
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.datain.puts("SB16 Emulator for Bochs\n");
|
|
|
|
break;
|
2008-01-27 01:24:03 +03:00
|
|
|
case 1:
|
|
|
|
EMUL.datain.puts("UART mode=%d (force=%d)\n",
|
2006-05-06 19:19:57 +04:00
|
|
|
MPU.uartmode, MPU.forceuartmode);
|
|
|
|
break;
|
2008-01-27 01:24:03 +03:00
|
|
|
case 2:
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.datain.puts("timer=%d\n", MPU.current_timer);
|
|
|
|
break;
|
2008-01-27 01:24:03 +03:00
|
|
|
case 3:
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.datain.puts("%d remappings active\n", EMUL.remaps);
|
|
|
|
break;
|
2008-01-27 01:24:03 +03:00
|
|
|
case 4:
|
2006-05-06 19:19:57 +04:00
|
|
|
EMUL.datain.puts("Resources are A%3x I%d D%d H%d T%d P%3x; Adlib at %3x\n",
|
|
|
|
BX_SB16_IO, BX_SB16_IRQ, BX_SB16_DMAL,
|
|
|
|
BX_SB16_DMAH, 6, BX_SB16_IOMPU, BX_SB16_IOADLIB);
|
|
|
|
break;
|
2008-01-27 01:24:03 +03:00
|
|
|
default:
|
2015-01-15 23:25:27 +03:00
|
|
|
EMUL.datain.puts("no info. Only slots 0..4 have values.\n");
|
2006-05-06 19:19:57 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2013-11-24 18:04:34 +04:00
|
|
|
case 6: // close midi and wave files and/or output
|
|
|
|
BX_SB16_THIS closemidioutput();
|
|
|
|
BX_SB16_THIS midimode = 0;
|
|
|
|
BX_SB16_THIS closewaveoutput();
|
|
|
|
BX_SB16_THIS wavemode = 0;
|
|
|
|
break;
|
|
|
|
case 7: // clear bank/program mappings
|
|
|
|
EMUL.remaps = 0;
|
|
|
|
writelog(4, "Bank/program mappings cleared.");
|
|
|
|
break;
|
|
|
|
case 8: // set force uart mode on/off
|
|
|
|
EMUL.dataout.get(&value8);
|
|
|
|
MPU.forceuartmode = value8;
|
|
|
|
if (value8 != 0)
|
|
|
|
MPU.uartmode = MPU.forceuartmode;
|
|
|
|
writelog(4, "Force UART mode = %d", MPU.forceuartmode);
|
|
|
|
break;
|
|
|
|
case 9: // enter specific OPL2/3 mode
|
2015-01-15 23:25:27 +03:00
|
|
|
// this feature has been removed
|
2013-11-24 18:04:34 +04:00
|
|
|
break;
|
|
|
|
case 10: // check emulator present
|
|
|
|
EMUL.datain.put(0x55);
|
|
|
|
break;
|
|
|
|
case 11: // send data to midi device
|
|
|
|
EMUL.dataout.get(&value8);
|
|
|
|
mpu_mididata(value8);
|
|
|
|
}
|
|
|
|
EMUL.dataout.clearcommand();
|
|
|
|
EMUL.dataout.flush();
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// and finally the OPL (FM emulation) part
|
|
|
|
|
|
|
|
// this is called whenever one of the timer elapses
|
|
|
|
void bx_sb16_c::opl_timerevent()
|
|
|
|
{
|
2008-07-27 19:41:43 +04:00
|
|
|
Bit16u mask;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
for (int i=0; i<4; i++) {
|
2008-07-27 19:41:43 +04:00
|
|
|
if ((OPL.tmask[i/2] & (1 << (i % 2))) != 0) { // only running timers
|
|
|
|
if ((i % 2) == 0) {
|
|
|
|
mask = 0xff;
|
|
|
|
} else {
|
|
|
|
mask = 0x3ff;
|
|
|
|
}
|
2014-12-31 15:27:32 +03:00
|
|
|
if (((++OPL.timer[i]) & mask) == 0) { // overflow occured, set flags accordingly
|
2008-07-27 19:41:43 +04:00
|
|
|
OPL.timer[i] = OPL.timerinit[i]; // reset the counter
|
|
|
|
if ((OPL.tmask[i/2] >> (6 - (i % 2))) == 0) { // set flags only if unmasked
|
|
|
|
writelog(MIDILOG(5), "OPL Timer Interrupt: Chip %d, Timer %d", i/2, 1 << (i % 2));
|
|
|
|
OPL.tflag[i/2] |= 1 << (6 - (i % 2)); // set the overflow flag
|
|
|
|
OPL.tflag[i/2] |= 1 << 7; // set the IRQ flag
|
|
|
|
}
|
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// return the status of one of the OPL2's, or the
|
|
|
|
// base status of the OPL3
|
|
|
|
Bit32u bx_sb16_c::opl_status(int chipid)
|
|
|
|
{
|
|
|
|
Bit32u status = OPL.tflag[chipid];
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(5), "OPL status of chip %d is %02x", chipid, status);
|
2001-04-10 05:04:59 +04:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
// write to the data port
|
|
|
|
void bx_sb16_c::opl_data(Bit32u value, int chipid)
|
|
|
|
{
|
|
|
|
int index = OPL.index[chipid];
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(4), "Write to OPL(%d) register %02x: %02x",
|
|
|
|
chipid, index, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2015-01-15 23:25:27 +03:00
|
|
|
switch (index & 0xff) {
|
2006-05-06 19:19:57 +04:00
|
|
|
// the two timer counts
|
2001-04-10 05:04:59 +04:00
|
|
|
case 0x02:
|
2008-07-27 19:41:43 +04:00
|
|
|
OPL.timerinit[chipid * 2] = OPL.timer[chipid * 2] = value;
|
|
|
|
break;
|
2001-04-10 05:04:59 +04:00
|
|
|
case 0x03:
|
2008-07-27 19:41:43 +04:00
|
|
|
OPL.timerinit[chipid * 2 + 1] = OPL.timer[chipid * 2 + 1] = (value << 2);
|
2001-04-10 05:04:59 +04:00
|
|
|
break;
|
|
|
|
|
2015-01-15 23:25:27 +03:00
|
|
|
// the timer masks
|
2001-04-10 05:04:59 +04:00
|
|
|
case 0x04:
|
2015-01-15 23:25:27 +03:00
|
|
|
if (chipid == 0) {
|
2006-05-06 19:19:57 +04:00
|
|
|
opl_settimermask(value, chipid);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
break;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// called for a write to port 4 of either chip
|
|
|
|
void bx_sb16_c::opl_settimermask(int value, int chipid)
|
|
|
|
{
|
2015-01-15 23:25:27 +03:00
|
|
|
if ((value & 0x80) != 0) { // reset IRQ and timer flags
|
|
|
|
// all other bits ignored!
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(5), "IRQ Reset called");
|
2001-04-10 05:04:59 +04:00
|
|
|
OPL.tflag[chipid] = 0;
|
|
|
|
return;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
OPL.tmask[chipid] = value & 0x63;
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(5), "New timer mask for chip %d is %02x",
|
|
|
|
chipid, OPL.tmask[chipid]);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// do we have to activate or deactivate the timer?
|
2015-01-15 23:25:27 +03:00
|
|
|
if (((value & 0x03) != 0) ^ (OPL.timer_running != 0)) {
|
|
|
|
if ((value & 0x03) != 0) { // yes, it's different. Start or stop?
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(5), "Starting timers");
|
2008-07-27 19:41:43 +04:00
|
|
|
bx_pc_system.activate_timer(OPL.timer_handle, 80, 1);
|
2006-05-06 19:19:57 +04:00
|
|
|
OPL.timer_running = 1;
|
2015-01-15 23:25:27 +03:00
|
|
|
} else {
|
2006-05-06 19:19:57 +04:00
|
|
|
writelog(MIDILOG(5), "Stopping timers");
|
2008-02-16 01:05:43 +03:00
|
|
|
bx_pc_system.deactivate_timer(OPL.timer_handle);
|
2006-05-06 19:19:57 +04:00
|
|
|
OPL.timer_running = 0;
|
|
|
|
}
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2015-01-08 22:12:01 +03:00
|
|
|
Bit32u bx_sb16_c::fmopl_generator(Bit16u rate, Bit8u *buffer, Bit32u len)
|
|
|
|
{
|
2015-03-27 18:49:40 +03:00
|
|
|
bx_bool ret = adlib_getsample(rate, (Bit16s*)buffer, len / 4, BX_SB16_THIS fm_volume);
|
2015-01-11 23:13:50 +03:00
|
|
|
return ret ? len : 0;
|
2015-01-08 22:12:01 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
Bit32u fmopl_callback(void *dev, Bit16u rate, Bit8u *buffer, Bit32u len)
|
|
|
|
{
|
|
|
|
return ((bx_sb16_c*)dev)->fmopl_generator(rate, buffer, len);
|
|
|
|
}
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
/* Handlers for the midi commands/midi file output */
|
|
|
|
|
|
|
|
// write the midi command to the midi file
|
2008-01-27 01:24:03 +03:00
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
void bx_sb16_c::writemidicommand(int command, int length, Bit8u data[])
|
|
|
|
{
|
2015-02-17 21:28:25 +03:00
|
|
|
bx_param_string_c *midiparam;
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
/* We need to determine the time elapsed since the last MIDI command */
|
|
|
|
int deltatime = currentdeltatime();
|
|
|
|
|
2015-02-17 21:28:25 +03:00
|
|
|
/* Initialize output device/file if necessary and not done yet */
|
|
|
|
if (BX_SB16_THIS midimode > 0) {
|
2015-02-19 21:45:43 +03:00
|
|
|
if ((MPU.outputinit & BX_SB16_THIS midimode) != BX_SB16_THIS midimode) {
|
2008-07-14 21:44:55 +04:00
|
|
|
writelog(MIDILOG(4), "Initializing Midi output.");
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS midimode & 1) {
|
2015-02-17 21:28:25 +03:00
|
|
|
midiparam = SIM->get_param_string(BXPN_SOUND_MIDIOUT);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_MIDIOUT1->openmidioutput(midiparam->getptr()) == BX_SOUNDLOW_OK)
|
|
|
|
MPU.outputinit |= 1;
|
|
|
|
else
|
|
|
|
MPU.outputinit &= ~1;
|
|
|
|
}
|
|
|
|
if (BX_SB16_THIS midimode & 2) {
|
2015-02-17 21:28:25 +03:00
|
|
|
bx_list_c *base = (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16);
|
2015-04-17 21:37:51 +03:00
|
|
|
midiparam = SIM->get_param_string("midifile", base);
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_MIDIOUT2->openmidioutput(midiparam->getptr()) == BX_SOUNDLOW_OK)
|
|
|
|
MPU.outputinit |= 2;
|
|
|
|
else
|
|
|
|
MPU.outputinit &= ~2;
|
2015-02-17 21:28:25 +03:00
|
|
|
}
|
2015-02-19 21:45:43 +03:00
|
|
|
if ((MPU.outputinit & BX_SB16_THIS midimode) != BX_SB16_THIS midimode) {
|
2008-07-14 21:44:55 +04:00
|
|
|
writelog(MIDILOG(2), "Error: Couldn't open midi output. Midi disabled.");
|
2015-02-19 21:45:43 +03:00
|
|
|
BX_SB16_THIS midimode = MPU.outputinit;
|
2008-07-14 21:44:55 +04:00
|
|
|
return;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2008-07-14 21:44:55 +04:00
|
|
|
}
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS midimode & 1) {
|
|
|
|
BX_SB16_MIDIOUT1->sendmidicommand(deltatime, command, length, data);
|
|
|
|
}
|
|
|
|
if (BX_SB16_THIS midimode & 2) {
|
|
|
|
BX_SB16_MIDIOUT2->sendmidicommand(deltatime, command, length, data);
|
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// determine how many delta times have passed since
|
|
|
|
// this function was called last
|
|
|
|
|
|
|
|
int bx_sb16_c::currentdeltatime()
|
|
|
|
{
|
|
|
|
int deltatime;
|
|
|
|
|
|
|
|
// counting starts at first access
|
2008-01-27 01:24:03 +03:00
|
|
|
if (MPU.last_delta_time == 0xffffffff)
|
2001-04-10 05:04:59 +04:00
|
|
|
MPU.last_delta_time = MPU.current_timer;
|
2008-01-27 01:24:03 +03:00
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
deltatime = MPU.current_timer - MPU.last_delta_time;
|
|
|
|
MPU.last_delta_time = MPU.current_timer;
|
|
|
|
|
|
|
|
return deltatime;
|
|
|
|
}
|
|
|
|
|
|
|
|
// process the midi command stored in MPU.midicmd.to the midi driver
|
|
|
|
|
2002-10-25 15:44:41 +04:00
|
|
|
void bx_sb16_c::processmidicommand(bx_bool force)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
int i, channel;
|
|
|
|
Bit8u value;
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool needremap = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
channel = MPU.midicmd.currentcommand() & 0xf;
|
|
|
|
|
|
|
|
// we need to log bank changes and program changes
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((MPU.midicmd.currentcommand() >> 4) == 0xc)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // a program change
|
2001-04-10 05:04:59 +04:00
|
|
|
value = MPU.midicmd.peek(0);
|
|
|
|
writelog(MIDILOG(1), "* ProgramChange channel %d to %d",
|
2006-05-06 19:19:57 +04:00
|
|
|
channel, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
MPU.program[channel] = value;
|
|
|
|
needremap = 1;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
else if ((MPU.midicmd.currentcommand() >> 4) == 0xb)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // a control change, could be a bank change
|
2001-04-10 05:04:59 +04:00
|
|
|
if (MPU.midicmd.peek(0) == 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // bank select MSB
|
|
|
|
value = MPU.midicmd.peek(1);
|
|
|
|
writelog(MIDILOG(1), "* BankSelectMSB (%x %x %x) channel %d to %d",
|
|
|
|
MPU.midicmd.peek(0), MPU.midicmd.peek(1), MPU.midicmd.peek(2),
|
|
|
|
channel, value);
|
|
|
|
MPU.bankmsb[channel] = value;
|
|
|
|
needremap = 1;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else if (MPU.midicmd.peek(0) == 32)
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // bank select LSB
|
|
|
|
value = MPU.midicmd.peek(1);
|
|
|
|
writelog(MIDILOG(1), "* BankSelectLSB channel %d to %d",
|
|
|
|
channel, value);
|
|
|
|
MPU.banklsb[channel] = value;
|
|
|
|
needremap = 1;
|
|
|
|
}
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
Bit8u temparray[256];
|
|
|
|
i = 0;
|
|
|
|
while (MPU.midicmd.empty() == 0)
|
2008-02-16 01:05:43 +03:00
|
|
|
MPU.midicmd.get(&(temparray[i++]));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
writemidicommand(MPU.midicmd.currentcommand(), i, temparray);
|
|
|
|
|
|
|
|
// if single command, revert to command mode
|
|
|
|
if (MPU.singlecommand != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
MPU.singlecommand = 0;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((force == 0) && (needremap == 1))
|
2001-04-10 05:04:59 +04:00
|
|
|
// have to check the remap lists, and remap program change if necessary
|
|
|
|
midiremapprogram(channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
// check if a program change has to be remapped, and do it if necessary
|
|
|
|
|
|
|
|
void bx_sb16_c::midiremapprogram(int channel)
|
|
|
|
{
|
|
|
|
int bankmsb,banklsb,program;
|
|
|
|
Bit8u commandbytes[2];
|
|
|
|
|
|
|
|
bankmsb = MPU.bankmsb[channel];
|
|
|
|
banklsb = MPU.banklsb[channel];
|
|
|
|
program = MPU.program[channel];
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
for(int i = 0; i < EMUL.remaps; i++)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (((EMUL.remaplist[i].oldbankmsb == bankmsb) ||
|
|
|
|
(EMUL.remaplist[i].oldbankmsb == 0xff)) &&
|
|
|
|
((EMUL.remaplist[i].oldbanklsb == banklsb) ||
|
|
|
|
(EMUL.remaplist[i].oldbanklsb == 0xff)) &&
|
|
|
|
((EMUL.remaplist[i].oldprogch == program) ||
|
|
|
|
(EMUL.remaplist[i].oldprogch == 0xff)))
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
writelog(5, "Remapping instrument for channel %d", channel);
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((EMUL.remaplist[i].newbankmsb != bankmsb) &&
|
|
|
|
(EMUL.remaplist[i].newbankmsb != 0xff))
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // write control change bank msb
|
|
|
|
MPU.bankmsb[channel] = EMUL.remaplist[i].newbankmsb;
|
|
|
|
commandbytes[0] = 0;
|
|
|
|
commandbytes[1] = EMUL.remaplist[i].newbankmsb;
|
|
|
|
writemidicommand(0xb0 | channel, 2, commandbytes);
|
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((EMUL.remaplist[i].newbanklsb != banklsb) &&
|
|
|
|
(EMUL.remaplist[i].newbanklsb != 0xff))
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // write control change bank lsb
|
|
|
|
MPU.banklsb[channel] = EMUL.remaplist[i].newbanklsb;
|
|
|
|
commandbytes[0] = 32;
|
|
|
|
commandbytes[1] = EMUL.remaplist[i].newbanklsb;
|
|
|
|
writemidicommand(0xb0 | channel, 2, commandbytes);
|
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
if ((EMUL.remaplist[i].newprogch != program) &&
|
|
|
|
(EMUL.remaplist[i].newprogch != 0xff))
|
2006-05-06 19:19:57 +04:00
|
|
|
{ // write program change
|
|
|
|
MPU.program[channel] = EMUL.remaplist[i].newprogch;
|
|
|
|
commandbytes[0] = EMUL.remaplist[i].newprogch;
|
|
|
|
writemidicommand(0xc0 | channel, 1, commandbytes);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2013-11-22 22:28:21 +04:00
|
|
|
void bx_sb16_c::closemidioutput()
|
|
|
|
{
|
2015-02-17 21:28:25 +03:00
|
|
|
if (BX_SB16_THIS midimode > 0) {
|
2015-02-19 21:45:43 +03:00
|
|
|
if (MPU.outputinit & 1) {
|
|
|
|
BX_SB16_MIDIOUT1->closemidioutput();
|
|
|
|
MPU.outputinit &= ~1;
|
|
|
|
}
|
|
|
|
if (MPU.outputinit & 2) {
|
|
|
|
BX_SB16_MIDIOUT2->closemidioutput();
|
|
|
|
MPU.outputinit &= ~2;
|
2015-02-17 21:28:25 +03:00
|
|
|
}
|
2013-11-22 22:28:21 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-11-24 18:04:34 +04:00
|
|
|
void bx_sb16_c::closewaveoutput()
|
|
|
|
{
|
2015-02-19 21:45:43 +03:00
|
|
|
if (BX_SB16_THIS wavemode > 0) {
|
|
|
|
if (DSP.outputinit & 2) {
|
|
|
|
BX_SB16_WAVEOUT2->closewaveoutput();
|
|
|
|
DSP.outputinit &= ~2;
|
|
|
|
}
|
2013-11-24 18:04:34 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// static IO port read callback handler
|
|
|
|
// redirects to non-static class handler to avoid virtual functions
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
Bit32u bx_sb16_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
|
|
|
|
{
|
|
|
|
#if !BX_USE_SB16_SMF
|
|
|
|
bx_sb16_c *class_ptr = (bx_sb16_c *) this_ptr;
|
2006-05-06 19:19:57 +04:00
|
|
|
return class_ptr->read(address, io_len);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
Bit32u bx_sb16_c::read(Bit32u address, unsigned io_len)
|
|
|
|
{
|
|
|
|
#else
|
|
|
|
UNUSED(this_ptr);
|
|
|
|
#endif // !BX_USE_SB16_SMF
|
|
|
|
|
2014-12-31 15:27:32 +03:00
|
|
|
bx_pc_system.isa_bus_delay();
|
|
|
|
|
|
|
|
switch (address) {
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x0: FM Music Status Port
|
|
|
|
// 2x8 and 388 are aliases
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x00:
|
|
|
|
case BX_SB16_IO + 0x08:
|
|
|
|
case BX_SB16_IOADLIB + 0x00:
|
|
|
|
return opl_status(0);
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x1: reserved (w: FM Music Data Port)
|
|
|
|
// 2x9 and 389 are aliases
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x01:
|
|
|
|
case BX_SB16_IO + 0x09:
|
|
|
|
case BX_SB16_IOADLIB + 0x01:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x2: Advanced Music Status Port
|
|
|
|
// or (for SBPro1) FM Music Status Port 2
|
|
|
|
// 38a is an alias
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x02:
|
|
|
|
case BX_SB16_IOADLIB + 0x02:
|
|
|
|
return opl_status(1);
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x3: reserved (w: Adv. FM Music Data Port)
|
|
|
|
// or (for SBPro1) FM Music Data Port 2
|
|
|
|
// 38b is an alias
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x03:
|
|
|
|
case BX_SB16_IOADLIB + 0x03:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x4: reserved (w: Mixer Register Port)
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x04:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x5: Mixer Data Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x05:
|
|
|
|
return mixer_readdata();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x6: reserved (w: DSP Reset)
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x06:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x7: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x07:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x8: FM Music Status Port (OPL-2)
|
|
|
|
// handled above
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x9: reserved (w: FM Music Data Port)
|
|
|
|
// handled above
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xa: DSP Read Data Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0a:
|
|
|
|
return dsp_dataread();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xb: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0b:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xc: DSP Buffer Status Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0c:
|
|
|
|
return dsp_bufferstatus();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xd: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0d:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xe: DSP Data Status Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0e:
|
|
|
|
return dsp_status();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xf: DSP Acknowledge 16bit DMA IRQ
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0f:
|
|
|
|
return dsp_irq16ack();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x0: MPU Data Port Read
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x00:
|
|
|
|
return mpu_dataread();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x1: MPU Status Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x01:
|
|
|
|
return mpu_status();
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x2: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x02:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x3: *Emulator* Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x03:
|
|
|
|
return emul_read();
|
2003-02-24 21:35:48 +03:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// If we get here, the port wasn't valid
|
2005-08-27 12:17:13 +04:00
|
|
|
writelog(3, "Read access to 0x%04x: unsupported port!", address);
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
return(0xff);
|
|
|
|
}
|
|
|
|
|
|
|
|
// static IO port write callback handler
|
|
|
|
// redirects to non-static class handler to avoid virtual functions
|
|
|
|
|
|
|
|
void bx_sb16_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
|
|
|
|
{
|
|
|
|
#if !BX_USE_SB16_SMF
|
|
|
|
bx_sb16_c *class_ptr = (bx_sb16_c *) this_ptr;
|
|
|
|
class_ptr->write(address, value, io_len);
|
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_c::write(Bit32u address, Bit32u value, unsigned io_len)
|
|
|
|
{
|
|
|
|
#else
|
|
|
|
UNUSED(this_ptr);
|
|
|
|
#endif // !BX_USE_SB16_SMF
|
|
|
|
|
2014-12-31 15:27:32 +03:00
|
|
|
bx_pc_system.isa_bus_delay();
|
|
|
|
|
|
|
|
switch (address) {
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x0: FM Music Register Port
|
|
|
|
// 2x8 and 388 are aliases
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x00:
|
|
|
|
case BX_SB16_IO + 0x08:
|
|
|
|
case BX_SB16_IOADLIB + 0x00:
|
2015-01-11 23:13:50 +03:00
|
|
|
OPL.index[0] = value;
|
2015-01-13 00:20:18 +03:00
|
|
|
adlib_write_index(address, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x1: FM Music Data Port
|
|
|
|
// 2x9 and 389 are aliases
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x01:
|
|
|
|
case BX_SB16_IO + 0x09:
|
|
|
|
case BX_SB16_IOADLIB + 0x01:
|
|
|
|
opl_data(value, 0);
|
2015-01-13 00:20:18 +03:00
|
|
|
adlib_write(opl_index, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x2: Advanced FM Music Register Port
|
|
|
|
// or (for SBPro1) FM Music Register Port 2
|
|
|
|
// 38a is an alias
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x02:
|
|
|
|
case BX_SB16_IOADLIB + 0x02:
|
2015-01-11 23:13:50 +03:00
|
|
|
OPL.index[1] = value;
|
2015-01-13 00:20:18 +03:00
|
|
|
adlib_write_index(address, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x3: Advanced FM Music Data Port
|
|
|
|
// or (for SBPro1) FM Music Data Port 2
|
|
|
|
// 38b is an alias
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x03:
|
|
|
|
case BX_SB16_IOADLIB + 0x03:
|
|
|
|
opl_data(value, 1);
|
2015-01-13 00:20:18 +03:00
|
|
|
adlib_write(opl_index, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x4: Mixer Register Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x04:
|
|
|
|
mixer_writeregister(value);
|
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x5: Mixer Data Portr,
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x05:
|
|
|
|
mixer_writedata(value);
|
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x6: DSP Reset
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x06:
|
|
|
|
dsp_reset(value);
|
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x7: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x07:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x8: FM Music Register Port (OPL-2)
|
|
|
|
// handled above
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2x9: FM Music Data Port
|
|
|
|
// handled above
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xa: reserved (r: DSP Data Port)
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0a:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xb: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0b:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xc: DSP Write Command/Data
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0c:
|
|
|
|
dsp_datawrite(value);
|
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xd: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0d:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xe: reserved (r: DSP Buffer Status)
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0e:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 2xf: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IO + 0x0f:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x0: MPU Command Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x00:
|
|
|
|
mpu_datawrite(value);
|
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x1: MPU Data Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x01:
|
|
|
|
mpu_command(value);
|
|
|
|
return;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x2: reserved
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x02:
|
|
|
|
break;
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
// 3x3: *Emulator* Port
|
2001-04-10 05:04:59 +04:00
|
|
|
case BX_SB16_IOMPU + 0x03:
|
|
|
|
emul_write(value);
|
|
|
|
return;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
// if we arrive here, the port is unsupported
|
2005-08-27 12:17:13 +04:00
|
|
|
writelog(3, "Write access to 0x%04x (value = 0x%02x): unsupported port!",
|
2006-05-06 19:19:57 +04:00
|
|
|
address, value);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2013-11-29 00:47:34 +04:00
|
|
|
void bx_sb16_c::create_logfile(void)
|
|
|
|
{
|
|
|
|
bx_list_c *base = (bx_list_c*) SIM->get_param(BXPN_SOUND_SB16);
|
|
|
|
bx_param_string_c *logfile = SIM->get_param_string("log", base);
|
|
|
|
|
|
|
|
if (logfile->isempty()) {
|
|
|
|
SIM->get_param_num("loglevel", base)->set(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (SIM->get_param_num("loglevel", base)->get() > 0) {
|
|
|
|
LOGFILE = fopen(logfile->getptr(),"w"); // logfile for errors etc.
|
|
|
|
if (LOGFILE == NULL) {
|
|
|
|
BX_ERROR(("Error opening file %s. Logging disabled.", logfile->getptr()));
|
|
|
|
SIM->get_param_num("loglevel", base)->set(0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2006-03-03 23:29:50 +03:00
|
|
|
void bx_sb16_c::writelog(int loglev, const char *str, ...)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2013-11-29 00:47:34 +04:00
|
|
|
if ((LOGFILE == NULL) && (BX_SB16_THIS loglevel != 0)) {
|
|
|
|
create_logfile();
|
|
|
|
}
|
2006-05-06 19:19:57 +04:00
|
|
|
// append a line to the log file, if desired
|
2013-11-29 00:47:34 +04:00
|
|
|
if (BX_SB16_THIS loglevel >= loglev) {
|
2006-03-03 23:29:50 +03:00
|
|
|
fprintf(LOGFILE, FMT_TICK, bx_pc_system.time_ticks());
|
|
|
|
fprintf(LOGFILE, " (%d) ", loglev);
|
|
|
|
va_list ap;
|
|
|
|
va_start(ap, str);
|
|
|
|
vfprintf(LOGFILE, str, ap);
|
|
|
|
va_end(ap);
|
|
|
|
fprintf(LOGFILE, "\n");
|
|
|
|
fflush(LOGFILE);
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// the round-robin FIFO buffers of the SB16
|
|
|
|
bx_sb16_buffer::bx_sb16_buffer()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
length = 0; // total bytes in buffer
|
|
|
|
head = 0; // pointer to next slot available for new data
|
|
|
|
tail = 0; // pointer to next slot to be read from
|
|
|
|
buffer = NULL; // pointer to the actual data
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_buffer::init(int bufferlen)
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
if (buffer != NULL) // Was it initialized before?
|
2001-04-10 05:04:59 +04:00
|
|
|
delete buffer;
|
|
|
|
|
|
|
|
length = bufferlen;
|
|
|
|
buffer = new Bit8u[length];
|
|
|
|
if (buffer == NULL)
|
2006-05-06 19:19:57 +04:00
|
|
|
length = 0; // This will be checked later
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
reset();
|
|
|
|
}
|
|
|
|
|
|
|
|
void bx_sb16_buffer::reset()
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
head = 0; // Reset the pointers
|
2001-04-10 05:04:59 +04:00
|
|
|
tail = 0;
|
|
|
|
|
|
|
|
clearcommand(); // no current command set
|
|
|
|
}
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
bx_sb16_buffer::~bx_sb16_buffer()
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (buffer != NULL)
|
2002-04-10 00:12:39 +04:00
|
|
|
delete [] buffer;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
buffer = NULL;
|
|
|
|
length = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Report how many bytes are available
|
|
|
|
int bx_sb16_buffer::bytes(void)
|
|
|
|
{
|
|
|
|
if (empty() != 0)
|
|
|
|
return 0; // empty / not initialized
|
|
|
|
|
|
|
|
int bytes = head - tail;
|
|
|
|
if (bytes < 0) bytes += length;
|
|
|
|
return (bytes);
|
|
|
|
}
|
|
|
|
|
|
|
|
// This puts one byte into the buffer
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::put(Bit8u data)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (full() != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
return 0; // buffer full
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
buffer[head++] = data; // Write data, and increase write pointer
|
|
|
|
head %= length; // wrap it around so it stays inside the data
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
return 1; // put was successful
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// This writes a formatted string to the buffer
|
2008-12-11 21:01:56 +03:00
|
|
|
bx_bool bx_sb16_buffer::puts(const char *data, ...)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (data == NULL)
|
|
|
|
return 0; // invalid string
|
|
|
|
|
|
|
|
//char string[length];
|
|
|
|
char *string;
|
|
|
|
int index = 0;
|
|
|
|
|
2017-02-18 14:13:56 +03:00
|
|
|
string = new char[length];
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
va_list ap;
|
|
|
|
va_start(ap, data);
|
|
|
|
vsprintf(string, data, ap);
|
|
|
|
va_end(ap);
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if ((int) strlen(string) >= length)
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("bx_sb16_buffer: puts() too long!"));
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
while (string[index] != 0)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (put((Bit8u) string[index]) == 0)
|
2015-01-03 16:53:52 +03:00
|
|
|
{
|
2017-02-18 14:13:56 +03:00
|
|
|
delete [] string;
|
2015-01-03 16:53:52 +03:00
|
|
|
return 0; // buffer full
|
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
index++;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2017-02-18 14:13:56 +03:00
|
|
|
delete [] string;
|
2001-04-10 05:04:59 +04:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
// This returns if the buffer is full, i.e. if a put will fail
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::full(void)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (length == 0)
|
|
|
|
return 1; // not initialized
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
if (((head + 1) % length) == tail)
|
2001-04-10 05:04:59 +04:00
|
|
|
return 1; // buffer full
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
return 0; // buffer has some space left
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// This reads the next available byte from the buffer
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::get(Bit8u *data)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (empty() != 0)
|
2008-01-27 01:24:03 +03:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
// Buffer is empty. Still, if it was initialized, return
|
|
|
|
// the last byte again.
|
2008-02-16 01:05:43 +03:00
|
|
|
if (length > 0)
|
|
|
|
(*data) = buffer[ (tail - 1) % length ];
|
2006-05-06 19:19:57 +04:00
|
|
|
return 0; // buffer empty
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
(*data) = buffer[tail++]; // read data and increase read pointer
|
|
|
|
tail %= length; // and wrap it around to stay inside the data
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
return 1; // get was successful
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Read a word in lo/hi order
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::getw(Bit16u *data)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u dummy;
|
|
|
|
if (bytes() < 2)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
if (bytes() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
get(&dummy);
|
|
|
|
*data = (Bit16u) dummy;
|
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
2006-05-06 19:19:57 +04:00
|
|
|
dummy = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
return 0;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
get(&dummy);
|
|
|
|
*data = (Bit16u) dummy;
|
|
|
|
get(&dummy);
|
2008-02-16 01:05:43 +03:00
|
|
|
*data |= ((Bit16u) dummy) << 8;
|
2001-04-10 05:04:59 +04:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Read a word in hi/lo order
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::getw1(Bit16u *data)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit8u dummy;
|
|
|
|
if (bytes() < 2)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
2001-04-10 05:04:59 +04:00
|
|
|
if (bytes() == 1)
|
2006-05-06 19:19:57 +04:00
|
|
|
{
|
|
|
|
get(&dummy);
|
2008-02-16 01:05:43 +03:00
|
|
|
*data = ((Bit16u) dummy) << 8;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
2006-05-06 19:19:57 +04:00
|
|
|
dummy = 0;
|
2001-04-10 05:04:59 +04:00
|
|
|
return 0;
|
2006-05-06 19:19:57 +04:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
get(&dummy);
|
2008-02-16 01:05:43 +03:00
|
|
|
*data = ((Bit16u) dummy) << 8;
|
2001-04-10 05:04:59 +04:00
|
|
|
get(&dummy);
|
|
|
|
*data |= (Bit16u) dummy;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
// This returns if the buffer is empty, i.e. if a get will fail
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::empty(void)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (length == 0)
|
|
|
|
return 1; // not inialized
|
|
|
|
|
|
|
|
if (head == tail)
|
|
|
|
return 1; // buffer empty
|
|
|
|
|
2006-05-06 19:19:57 +04:00
|
|
|
return 0; // buffer contains data
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Flushes the buffer
|
|
|
|
void bx_sb16_buffer::flush(void)
|
|
|
|
{
|
|
|
|
tail = head;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Peeks ahead in the buffer
|
|
|
|
// Warning: No checking if result is valid. Must call bytes() to check that!
|
|
|
|
Bit8u bx_sb16_buffer::peek(int offset)
|
|
|
|
{
|
2006-05-06 19:19:57 +04:00
|
|
|
return buffer[(tail + offset) % length];
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Set a new active command
|
|
|
|
void bx_sb16_buffer::newcommand(Bit8u newcmd, int bytes)
|
|
|
|
{
|
|
|
|
command = newcmd;
|
|
|
|
havecommand = 1;
|
|
|
|
bytesneeded = bytes;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Return the currently active command
|
|
|
|
Bit8u bx_sb16_buffer::currentcommand(void)
|
|
|
|
{
|
|
|
|
return command;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Clear the active command
|
|
|
|
void bx_sb16_buffer::clearcommand(void)
|
|
|
|
{
|
|
|
|
command = 0;
|
|
|
|
havecommand = 0;
|
|
|
|
bytesneeded = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
// return if the command has received all necessary bytes
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::commanddone(void)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
if (hascommand() == 0)
|
|
|
|
return 0; // no command pending - not done then
|
|
|
|
|
|
|
|
if (bytes() >= bytesneeded)
|
|
|
|
return 1; // yes, it's done
|
|
|
|
|
|
|
|
return 0; // no, it's not
|
|
|
|
}
|
|
|
|
|
|
|
|
// return if there is a command pending
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool bx_sb16_buffer::hascommand(void)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
return havecommand;
|
|
|
|
}
|
|
|
|
|
|
|
|
int bx_sb16_buffer::commandbytes(void)
|
|
|
|
{
|
|
|
|
return bytesneeded;
|
|
|
|
}
|
|
|
|
|
2013-11-19 23:04:21 +04:00
|
|
|
// runtime parameter handlers
|
2006-03-03 23:29:50 +03:00
|
|
|
Bit64s bx_sb16_c::sb16_param_handler(bx_param_c *param, int set, Bit64s val)
|
|
|
|
{
|
|
|
|
if (set) {
|
2013-11-22 22:28:21 +04:00
|
|
|
const char *pname = param->get_name();
|
|
|
|
if (!strcmp(pname, "dmatimer")) {
|
2006-03-03 23:29:50 +03:00
|
|
|
BX_SB16_THIS dmatimer = (Bit32u)val;
|
2013-11-22 22:28:21 +04:00
|
|
|
} else if (!strcmp(pname, "loglevel")) {
|
2006-03-03 23:29:50 +03:00
|
|
|
BX_SB16_THIS loglevel = (int)val;
|
2013-11-22 22:28:21 +04:00
|
|
|
} else if (!strcmp(pname, "midimode")) {
|
|
|
|
if (val != BX_SB16_THIS midimode) {
|
2015-02-17 21:28:25 +03:00
|
|
|
BX_SB16_THIS midi_changed |= 1;
|
2013-11-22 22:28:21 +04:00
|
|
|
}
|
2013-11-24 18:04:34 +04:00
|
|
|
} else if (!strcmp(pname, "wavemode")) {
|
|
|
|
if (val != BX_SB16_THIS wavemode) {
|
2015-02-19 21:45:43 +03:00
|
|
|
BX_SB16_THIS wave_changed |= 1;
|
2013-11-24 18:04:34 +04:00
|
|
|
}
|
2006-03-03 23:29:50 +03:00
|
|
|
} else {
|
|
|
|
BX_PANIC(("sb16_param_handler called with unexpected parameter '%s'", pname));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2013-11-19 23:04:21 +04:00
|
|
|
const char* bx_sb16_c::sb16_param_string_handler(bx_param_string_c *param, int set,
|
|
|
|
const char *oldval, const char *val,
|
|
|
|
int maxlen)
|
|
|
|
{
|
|
|
|
if ((set) && (strcmp(val, oldval))) {
|
|
|
|
const char *pname = param->get_name();
|
2015-04-17 21:37:51 +03:00
|
|
|
if (!strcmp(pname, "wavefile")) {
|
2015-02-19 21:45:43 +03:00
|
|
|
BX_SB16_THIS wave_changed |= 2;
|
2015-04-17 21:37:51 +03:00
|
|
|
} else if (!strcmp(pname, "midifile")) {
|
2015-02-17 21:28:25 +03:00
|
|
|
BX_SB16_THIS midi_changed |= 2;
|
2013-11-29 00:47:34 +04:00
|
|
|
} else if (!strcmp(pname, "log")) {
|
|
|
|
if (LOGFILE != NULL) {
|
|
|
|
fclose(LOGFILE);
|
|
|
|
LOGFILE = NULL;
|
|
|
|
}
|
|
|
|
// writelog() re-opens the log file on demand
|
2013-11-19 23:04:21 +04:00
|
|
|
} else {
|
|
|
|
BX_PANIC(("sb16_param_string_handler called with unexpected parameter '%s'", pname));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2002-11-19 08:47:45 +03:00
|
|
|
#endif /* if BX_SUPPORT_SB16 */
|