- set device state structure to 0 with memset() for some devices
- cleaned up vga core init code after adding memset() - floppy: removed structures that had been used for win95 direct access
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90e6c88c55
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@ -111,6 +111,7 @@ Bit64u muldiv64(Bit64u a, Bit32u b, Bit32u c)
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bx_acpi_ctrl_c::bx_acpi_ctrl_c()
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{
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put("ACPI");
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memset(&s, 0, sizeof(s));
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s.timer_index = BX_NULL_TIMER_HANDLE;
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}
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@ -59,6 +59,8 @@ void libbiosdev_LTX_plugin_fini(void)
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bx_biosdev_c::bx_biosdev_c(void)
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{
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memset(&s, 0, sizeof(s));
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bioslog = new logfunctions();
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bioslog->put("BIOS");
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@ -90,11 +92,6 @@ void bx_biosdev_c::init(void)
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DEV_register_iowrite_handler(this, write_handler, 0x0501, "VGABios Panic Port 1", 3);
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DEV_register_iowrite_handler(this, write_handler, 0x0502, "VGABios Panic Port 2", 3);
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DEV_register_iowrite_handler(this, write_handler, 0x0503, "VGABios Debug Port", 1);
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s.bios_message_i = 0;
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s.bios_panic_flag = 0;
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s.vgabios_message_i = 0;
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s.vgabios_panic_flag = 0;
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}
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// static IO port write callback handler
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@ -122,9 +122,7 @@ void libcmos_LTX_plugin_fini(void)
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bx_cmos_c::bx_cmos_c(void)
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{
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put("CMOS");
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for (unsigned i=0; i<128; i++) s.reg[i] = 0;
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memset(&s, 0, sizeof(s));
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s.periodic_timer_index = BX_NULL_TIMER_HANDLE;
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s.one_second_timer_index = BX_NULL_TIMER_HANDLE;
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s.uip_timer_index = BX_NULL_TIMER_HANDLE;
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@ -57,6 +57,8 @@ void libdma_LTX_plugin_fini(void)
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bx_dma_c::bx_dma_c()
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{
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put("DMA");
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memset(&s[0], 0, sizeof(s));
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memset(&s[1], 0, sizeof(s));
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}
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bx_dma_c::~bx_dma_c()
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@ -128,6 +128,7 @@ void libfloppy_LTX_plugin_fini(void)
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bx_floppy_ctrl_c::bx_floppy_ctrl_c()
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{
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put("floppy", "FDD");
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memset(&s, 0, sizeof(s));
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s.floppy_timer_index = BX_NULL_TIMER_HANDLE;
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}
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@ -153,48 +153,4 @@ private:
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static void runtime_config_handler(void *);
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void runtime_config(void);
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};
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#ifdef WIN32
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// used for direct floppy access in Win95
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#define VWIN32_DIOC_DOS_IOCTL 1
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#define VWIN32_DIOC_DOS_INT25 2
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#define VWIN32_DIOC_DOS_INT26 3
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typedef struct _DIOC_REGISTERS {
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DWORD reg_EBX;
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DWORD reg_EDX;
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DWORD reg_ECX;
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DWORD reg_EAX;
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DWORD reg_EDI;
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DWORD reg_ESI;
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DWORD reg_Flags;
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} DIOC_REGISTERS, *PDIOC_REGISTERS;
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#pragma pack(push, 1)
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typedef struct _BLOCK_DEV_PARAMS {
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BYTE features;
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BYTE dev_type;
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WORD attribs;
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WORD cylinders;
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BYTE media_type;
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// BPB
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WORD bytes_per_sector;
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BYTE sect_per_cluster;
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WORD reserved_sectors;
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BYTE fats;
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WORD root_entries;
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WORD tot_sectors;
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BYTE media_id;
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WORD sects_per_fat;
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WORD sects_per_track;
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WORD num_heads;
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WORD hidden_sectors;
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BYTE remainder[5];
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} BLOCK_DEV_PARAMS, *PBLOCK_DEV_PARAMS;
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#pragma pack(pop)
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#endif /* WIN32 */
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#endif
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@ -78,6 +78,7 @@ void libkeyboard_LTX_plugin_fini(void)
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bx_keyb_c::bx_keyb_c()
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{
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put("keyboard", "KBD");
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memset(&s, 0, sizeof(s));
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pastebuf = NULL;
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}
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@ -184,6 +184,7 @@ void libne2k_LTX_plugin_fini(void)
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bx_ne2k_c::bx_ne2k_c()
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{
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put("NE2K");
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memset(&s, 0, sizeof(bx_ne2k_t));
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s.tx_timer_index = BX_NULL_TIMER_HANDLE;
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ethdev = NULL;
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}
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@ -119,10 +119,15 @@ void libpcipnic_LTX_plugin_fini(void)
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bx_pcipnic_c::bx_pcipnic_c()
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{
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put("pcipnic", "PNIC");
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memset(&s, 0, sizeof(bx_e1000_t));
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ethdev = NULL;
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}
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bx_pcipnic_c::~bx_pcipnic_c()
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{
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if (ethdev != NULL) {
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delete ethdev;
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}
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BX_DEBUG(("Exit"));
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}
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@ -51,7 +51,7 @@ bx_parallel_c::bx_parallel_c()
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{
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put("parallel", "PAR");
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for (int i=0; i<BX_PARPORT_MAXDEV; i++) {
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s[i].output = NULL;
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memset(&s[i], 0, sizeof(bx_par_t));
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}
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}
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@ -70,6 +70,7 @@ bx_serial_c::bx_serial_c(void)
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{
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put("serial", "SER");
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for (int i=0; i<BX_SERIAL_MAXDEV; i++) {
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memset(&s[i], 0, sizeof(bx_serial_t));
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s[i].io_mode = BX_SER_MODE_NULL;
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s[i].tty_id = -1;
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s[i].tx_timer_index = BX_NULL_TIMER_HANDLE;
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@ -168,7 +168,7 @@ void libes1370_LTX_plugin_fini(void)
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bx_es1370_c::bx_es1370_c()
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{
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put("es1370", "E1370");
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memset(&s, 0, sizeof(bx_es1370_t));
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s.dac1_timer_index = BX_NULL_TIMER_HANDLE;
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s.dac2_timer_index = BX_NULL_TIMER_HANDLE;
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}
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@ -210,6 +210,9 @@ void libsb16_LTX_plugin_fini(void)
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bx_sb16_c::bx_sb16_c(void)
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{
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put("SB16");
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memset(&mpu401, 0, sizeof(mpu401));
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memset(&dsp, 0, sizeof(dsp));
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memset(&opl, 0, sizeof(opl));
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mpu401.timer_handle = BX_NULL_TIMER_HANDLE;
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dsp.timer_handle = BX_NULL_TIMER_HANDLE;
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opl.timer_handle = BX_NULL_TIMER_HANDLE;
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@ -79,10 +79,8 @@ static const Bit8u ccdat[16][4] = {
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bx_vgacore_c::bx_vgacore_c()
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{
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s.vga_mem_updated = 0;
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s.vga_tile_updated = NULL;
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memset(&s, 0, sizeof(s));
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timer_id = BX_NULL_TIMER_HANDLE;
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s.memory = NULL;
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}
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bx_vgacore_c::~bx_vgacore_c()
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@ -130,103 +128,38 @@ void bx_vgacore_c::init(void)
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void bx_vgacore_c::init_standard_vga(void)
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{
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unsigned i;
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char *extname;
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// initialize VGA controllers and other internal stuff
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BX_VGA_THIS s.vga_enabled = 1;
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BX_VGA_THIS s.misc_output.color_emulation = 1;
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BX_VGA_THIS s.misc_output.enable_ram = 1;
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BX_VGA_THIS s.misc_output.clock_select = 0;
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BX_VGA_THIS s.misc_output.select_high_bank = 0;
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BX_VGA_THIS s.misc_output.horiz_sync_pol = 1;
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BX_VGA_THIS s.misc_output.vert_sync_pol = 1;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.graphics_alpha = 0;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.display_type = 0;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.enable_line_graphics = 1;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.blink_intensity = 0;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.pixel_panning_compat = 0;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.pixel_clock_select = 0;
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BX_VGA_THIS s.attribute_ctrl.mode_ctrl.internal_palette_size = 0;
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BX_VGA_THIS s.line_offset=80;
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BX_VGA_THIS s.line_compare=1023;
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BX_VGA_THIS s.vertical_display_end=399;
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for (i=0; i<=0x18; i++)
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BX_VGA_THIS s.CRTC.reg[i] = 0;
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BX_VGA_THIS s.CRTC.address = 0;
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BX_VGA_THIS s.CRTC.write_protect = 0;
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BX_VGA_THIS s.attribute_ctrl.flip_flop = 0;
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BX_VGA_THIS s.attribute_ctrl.address = 0;
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BX_VGA_THIS s.attribute_ctrl.video_enabled = 1;
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for (i=0; i<16; i++)
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BX_VGA_THIS s.attribute_ctrl.palette_reg[i] = 0;
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BX_VGA_THIS s.attribute_ctrl.overscan_color = 0;
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BX_VGA_THIS s.attribute_ctrl.color_plane_enable = 0x0f;
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BX_VGA_THIS s.attribute_ctrl.horiz_pel_panning = 0;
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BX_VGA_THIS s.attribute_ctrl.color_select = 0;
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for (i=0; i<256; i++) {
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BX_VGA_THIS s.pel.data[i].red = 0;
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BX_VGA_THIS s.pel.data[i].green = 0;
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BX_VGA_THIS s.pel.data[i].blue = 0;
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}
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BX_VGA_THIS s.pel.write_data_register = 0;
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BX_VGA_THIS s.pel.write_data_cycle = 0;
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BX_VGA_THIS s.pel.read_data_register = 0;
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BX_VGA_THIS s.pel.read_data_cycle = 0;
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BX_VGA_THIS s.pel.dac_state = 0x01;
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BX_VGA_THIS s.pel.mask = 0xff;
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BX_VGA_THIS s.graphics_ctrl.index = 0;
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BX_VGA_THIS s.graphics_ctrl.set_reset = 0;
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BX_VGA_THIS s.graphics_ctrl.enable_set_reset = 0;
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BX_VGA_THIS s.graphics_ctrl.color_compare = 0;
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BX_VGA_THIS s.graphics_ctrl.data_rotate = 0;
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BX_VGA_THIS s.graphics_ctrl.raster_op = 0;
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BX_VGA_THIS s.graphics_ctrl.read_map_select = 0;
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BX_VGA_THIS s.graphics_ctrl.write_mode = 0;
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BX_VGA_THIS s.graphics_ctrl.read_mode = 0;
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BX_VGA_THIS s.graphics_ctrl.odd_even = 0;
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BX_VGA_THIS s.graphics_ctrl.chain_odd_even = 0;
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BX_VGA_THIS s.graphics_ctrl.shift_reg = 0;
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BX_VGA_THIS s.graphics_ctrl.graphics_alpha = 0;
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BX_VGA_THIS s.graphics_ctrl.memory_mapping = 2; // monochrome text mode
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BX_VGA_THIS s.graphics_ctrl.color_dont_care = 0;
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BX_VGA_THIS s.graphics_ctrl.bitmask = 0;
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for (i=0; i<4; i++) {
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BX_VGA_THIS s.graphics_ctrl.latch[i] = 0;
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}
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BX_VGA_THIS s.sequencer.index = 0;
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BX_VGA_THIS s.sequencer.map_mask = 0;
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BX_VGA_THIS s.sequencer.reset1 = 1;
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BX_VGA_THIS s.sequencer.reset2 = 1;
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BX_VGA_THIS s.sequencer.reg1 = 0;
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BX_VGA_THIS s.sequencer.char_map_select = 0;
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BX_VGA_THIS s.sequencer.extended_mem = 1; // display mem greater than 64K
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BX_VGA_THIS s.sequencer.odd_even = 1; // use sequential addressing mode
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BX_VGA_THIS s.sequencer.chain_four = 0; // use map mask & read map select
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BX_VGA_THIS s.charmap_address = 0;
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BX_VGA_THIS s.x_dotclockdiv2 = 0;
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BX_VGA_THIS s.y_doublescan = 0;
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BX_VGA_THIS s.plane_shift = 16;
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BX_VGA_THIS s.plane_offset = 0;
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BX_VGA_THIS s.dac_shift = 2;
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BX_VGA_THIS s.last_xres = 0;
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BX_VGA_THIS s.last_yres = 0;
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BX_VGA_THIS s.last_bpp = 8;
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BX_VGA_THIS s.last_msl = 0;
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BX_VGA_THIS s.max_xres = 800;
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BX_VGA_THIS s.max_yres = 600;
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BX_VGA_THIS s.vga_mem_updated = 0;
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// initialize memory, handlers and timer (depending on extension)
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extname = SIM->get_param_string(BXPN_VGA_EXTENSION)->getptr();
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if ((strlen(extname) == 0) || (!strcmp(extname, "none"))) {
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