2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2009-01-20 22:34:16 +03:00
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// $Id: instrument.cc,v 1.22 2009-01-20 19:34:16 sshwarts Exp $
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2001-06-28 23:48:37 +04:00
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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2006-01-16 22:47:18 +03:00
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#include <assert.h>
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2001-06-28 23:48:37 +04:00
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#include "bochs.h"
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2006-03-07 01:03:16 +03:00
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#include "cpu/cpu.h"
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2001-06-28 23:48:37 +04:00
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2006-01-16 22:47:18 +03:00
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bxInstrumentation *icpu = NULL;
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2001-06-28 23:48:37 +04:00
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2005-11-14 21:25:41 +03:00
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static disassembler bx_disassembler;
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2001-06-28 23:48:37 +04:00
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2008-10-01 15:36:04 +04:00
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void bx_instr_init_env(void) {}
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void bx_instr_exit_env(void) {}
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2008-11-18 23:55:59 +03:00
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void bx_instr_initialize(unsigned cpu)
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2006-01-16 22:47:18 +03:00
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{
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assert(cpu < BX_SMP_PROCESSORS);
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if (icpu == NULL)
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icpu = new bxInstrumentation[BX_SMP_PROCESSORS];
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icpu[cpu].set_cpu_id(cpu);
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fprintf(stderr, "Initialize cpu %d\n", cpu);
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}
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2008-11-18 23:55:59 +03:00
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void bxInstrumentation::bx_instr_reset(unsigned type)
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2001-06-28 23:48:37 +04:00
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{
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2002-09-29 20:50:29 +04:00
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valid = is_branch = 0;
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2008-06-23 06:56:31 +04:00
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num_data_accesses = 0;
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2002-09-29 20:50:29 +04:00
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active = 1;
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2001-06-28 23:48:37 +04:00
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}
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2002-09-29 20:50:29 +04:00
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void bxInstrumentation::bx_instr_new_instruction()
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2001-06-28 23:48:37 +04:00
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{
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2006-01-16 22:47:18 +03:00
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if (!active) return;
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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if (valid)
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{
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char disasm_tbuf[512]; // buffer for instruction disassembly
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unsigned length = opcode_size, n;
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2006-01-16 22:47:18 +03:00
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bx_disassembler.disasm(is32, is64, 0, 0, opcode, disasm_tbuf);
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2008-02-06 01:57:43 +03:00
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if(length != 0)
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2002-09-29 20:50:29 +04:00
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{
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fprintf(stderr, "----------------------------------------------------------\n");
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fprintf(stderr, "CPU: %d: %s\n", cpu_id, disasm_tbuf);
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2008-06-23 06:56:31 +04:00
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fprintf(stderr, "LEN: %d\tBYTES: ", length);
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2002-09-29 20:50:29 +04:00
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for(n=0;n<length;n++) fprintf(stderr, "%02x", opcode[n]);
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2008-02-06 01:57:43 +03:00
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if(is_branch)
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2002-09-29 20:50:29 +04:00
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{
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fprintf(stderr, "\tBRANCH ");
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2008-02-06 01:57:43 +03:00
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if(is_taken)
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2006-01-17 21:17:01 +03:00
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fprintf(stderr, "TARGET " FMT_ADDRX " (TAKEN)", target_linear);
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2002-09-29 20:50:29 +04:00
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else
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fprintf(stderr, "(NOT TAKEN)");
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2008-02-06 01:57:43 +03:00
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}
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2006-01-17 21:17:01 +03:00
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fprintf(stderr, "\n");
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2002-09-29 20:50:29 +04:00
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for(n=0;n < num_data_accesses;n++)
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{
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2006-01-17 21:17:01 +03:00
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fprintf(stderr, "MEM ACCESS[%u]: " FMT_ADDRX " (linear) 0x%08x (physical) %s SIZE: %d\n", n,
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2008-02-06 01:57:43 +03:00
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data_access[n].laddr,
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2002-09-29 20:50:29 +04:00
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data_access[n].paddr,
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data_access[n].op == BX_READ ? "RD":"WR",
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data_access[n].size);
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}
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fprintf(stderr, "\n");
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}
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}
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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valid = is_branch = 0;
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2008-06-23 06:56:31 +04:00
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num_data_accesses = 0;
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2001-06-28 23:48:37 +04:00
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}
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2002-09-29 20:50:29 +04:00
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void bxInstrumentation::branch_taken(bx_address new_eip)
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2001-06-28 23:48:37 +04:00
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{
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2006-01-16 22:47:18 +03:00
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if (!active || !valid) return;
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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// find linear address
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2008-04-19 14:12:09 +04:00
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bx_address laddr = BX_CPU(cpu_id)->get_laddr(BX_SEG_REG_CS, new_eip);
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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is_branch = 1;
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is_taken = 1;
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target_linear = laddr;
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2001-06-28 23:48:37 +04:00
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}
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2008-02-06 01:57:43 +03:00
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void bxInstrumentation::bx_instr_cnear_branch_taken(bx_address new_eip)
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2001-06-28 23:48:37 +04:00
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{
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2002-09-29 20:50:29 +04:00
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branch_taken(new_eip);
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2001-06-28 23:48:37 +04:00
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}
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2002-09-29 20:50:29 +04:00
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void bxInstrumentation::bx_instr_cnear_branch_not_taken()
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2001-06-28 23:48:37 +04:00
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{
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2006-01-16 22:47:18 +03:00
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if (!active || !valid) return;
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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is_branch = 1;
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is_taken = 0;
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2001-06-28 23:48:37 +04:00
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}
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2006-01-16 22:47:18 +03:00
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void bxInstrumentation::bx_instr_ucnear_branch(unsigned what, bx_address new_eip)
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{
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2002-09-29 20:50:29 +04:00
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branch_taken(new_eip);
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2001-06-28 23:48:37 +04:00
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}
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2006-01-16 22:47:18 +03:00
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void bxInstrumentation::bx_instr_far_branch(unsigned what, Bit16u new_cs, bx_address new_eip)
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{
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2002-09-29 20:50:29 +04:00
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branch_taken(new_eip);
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2001-06-28 23:48:37 +04:00
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}
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2008-03-03 18:09:30 +03:00
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void bxInstrumentation::bx_instr_opcode(const Bit8u *opcode_bytes, unsigned len, bx_bool is32, bx_bool is64)
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2001-06-28 23:48:37 +04:00
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{
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2006-01-16 22:47:18 +03:00
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if (!active) return;
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2001-06-28 23:48:37 +04:00
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2008-02-06 01:57:43 +03:00
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for(unsigned i=0;i<len;i++)
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2002-09-29 20:50:29 +04:00
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{
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2006-01-16 22:47:18 +03:00
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opcode[i] = opcode_bytes[i];
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2002-09-29 20:50:29 +04:00
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}
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2008-02-06 01:57:43 +03:00
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2002-09-29 20:50:29 +04:00
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is32 = is32;
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2005-11-14 21:25:41 +03:00
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is64 = is64;
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2002-09-29 20:50:29 +04:00
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opcode_size = len;
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2008-06-23 06:56:31 +04:00
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valid = 1;
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2005-04-30 01:28:59 +04:00
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}
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2002-09-29 20:50:29 +04:00
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void bxInstrumentation::bx_instr_interrupt(unsigned vector)
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{
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if(active)
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{
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fprintf(stderr, "CPU %u: interrupt %02xh\n", cpu_id, vector);
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}
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2001-06-28 23:48:37 +04:00
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}
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2009-01-20 22:34:16 +03:00
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void bxInstrumentation::bx_instr_exception(unsigned vector, unsigned error_code)
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2001-06-28 23:48:37 +04:00
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{
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2002-09-29 20:50:29 +04:00
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if(active)
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{
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2009-01-20 22:34:16 +03:00
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fprintf(stderr, "CPU %u: exception %02xh error_code=%x\n", cpu_id, vector, error_code);
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2002-09-29 20:50:29 +04:00
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}
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2001-06-28 23:48:37 +04:00
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}
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2002-09-29 20:50:29 +04:00
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void bxInstrumentation::bx_instr_hwinterrupt(unsigned vector, Bit16u cs, bx_address eip)
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2001-06-28 23:48:37 +04:00
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{
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2002-09-29 20:50:29 +04:00
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if(active)
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{
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fprintf(stderr, "CPU %u: hardware interrupt %02xh\n", cpu_id, vector);
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}
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2001-06-28 23:48:37 +04:00
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}
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2008-04-19 14:12:09 +04:00
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void bxInstrumentation::bx_instr_mem_data_access(unsigned seg, bx_address offset, unsigned len, unsigned rw)
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2001-06-28 23:48:37 +04:00
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{
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2006-06-17 16:09:55 +04:00
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bx_phy_address phy;
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2001-06-28 23:48:37 +04:00
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2006-01-16 22:47:18 +03:00
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if(!active || !valid) return;
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2001-06-28 23:48:37 +04:00
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2008-02-06 01:57:43 +03:00
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if (num_data_accesses >= MAX_DATA_ACCESSES)
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2002-09-29 20:50:29 +04:00
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{
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return;
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}
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2001-06-28 23:48:37 +04:00
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2008-04-19 14:12:09 +04:00
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bx_address lin = BX_CPU(cpu_id)->get_laddr(seg, offset);
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2006-06-17 16:09:55 +04:00
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bx_bool page_valid = BX_CPU(cpu_id)->dbg_xlate_linear2phy(lin, &phy);
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2002-09-29 20:50:29 +04:00
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phy = A20ADDR(phy);
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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// If linear translation doesn't exist, a paging exception will occur.
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// Invalidate physical address data for now.
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2008-02-06 01:57:43 +03:00
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if (!page_valid)
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2002-09-29 20:50:29 +04:00
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{
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phy = 0;
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}
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2001-06-28 23:48:37 +04:00
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2002-09-29 20:50:29 +04:00
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data_access[num_data_accesses].laddr = lin;
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data_access[num_data_accesses].paddr = phy;
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data_access[num_data_accesses].op = rw;
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2008-04-19 14:12:09 +04:00
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data_access[num_data_accesses].size = len;
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2002-09-29 20:50:29 +04:00
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num_data_accesses++;
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2001-06-28 23:48:37 +04:00
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}
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