Bochs/bochs/cpu/instr.h

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/////////////////////////////////////////////////////////////////////////
// $Id: instr.h,v 1.8 2008-03-31 17:33:34 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2008 Stanislav Shwartsman
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
/////////////////////////////////////////////////////////////////////////
#ifndef BX_INSTR_H
# define BX_INSTR_H 1
class bxInstruction_c;
// <TAG-TYPE-EXECUTEPTR-START>
#if BX_USE_CPU_SMF
typedef void (*BxExecutePtr_t)(bxInstruction_c *);
typedef void (BX_CPP_AttrRegparmN(1) *BxExecutePtr_tR)(bxInstruction_c *);
#else
typedef void (BX_CPU_C::*BxExecutePtr_t)(bxInstruction_c *);
typedef void (BX_CPU_C::*BxExecutePtr_tR)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
#endif
// <TAG-TYPE-EXECUTEPTR-END>
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// <TAG-CLASS-INSTRUCTION-START>
class bxInstruction_c {
public:
// Function pointers; a function to resolve the modRM address
// given the current state of the CPU and the instruction data,
// and a function to execute the instruction after resolving
// the memory address (if any).
BxExecutePtr_tR ResolveModrm;
BxExecutePtr_tR execute;
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struct {
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// 15..10 (unused)
// 9...9 stop trace (used with trace cache)
// 8...0 b1 (9bits of opcode; 1byte-op=0..255, 2byte-op=256..511
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Bit16u metaInfo3;
// 7...4 (unused)
// 3...0 ilen (0..15)
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Bit8u metaInfo2;
// 7...7 extend8bit
// 6...6 as64
// 5...5 os64
// 4...4 as32
// 3...3 os32
// 2...2 mod==c0 (modrm)
// 1...0 repUsed (0=none, 2=0xF2, 3=0xF3)
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Bit8u metaInfo1;
} metaInfo;
#define BX_INSTR_METADATA_SEG 0
#define BX_INSTR_METADATA_DEST 1
#define BX_INSTR_METADATA_NNN 2
#define BX_INSTR_METADATA_RM 3
#define BX_INSTR_METADATA_BASE 4
#define BX_INSTR_METADATA_INDEX 5
#define BX_INSTR_METADATA_SCALE 6
#define BX_INSTR_METADATA_MODRM 7
// using 5-bit field for registers (16 regs in 64-bit, RIP, NIL)
Bit8u metaData[8];
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union {
// Form (longest case): [opcode+modrm+sib/displacement32/immediate32]
struct {
union {
Bit32u Id;
Bit16u Iw;
Bit8u Ib;
};
union {
Bit16u displ16u; // for 16-bit modrm forms
Bit32u displ32u; // for 32-bit modrm forms
};
} modRMForm;
struct {
union {
Bit32u Id;
Bit16u Iw;
Bit8u Ib;
};
union {
Bit32u Id2; // Not used (for alignment)
Bit16u Iw2;
Bit8u Ib2;
};
} IxIxForm;
#if BX_SUPPORT_X86_64
struct {
Bit64u Iq; // for MOV Rx,imm64
} IqForm;
#endif
};
BX_CPP_INLINE unsigned modC0()
{
// This is a cheaper way to test for modRM instructions where
// the mod field is 0xc0. FetchDecode flags this condition since
// it is quite common to be tested for.
return metaInfo.metaInfo1 & (1<<2);
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}
BX_CPP_INLINE unsigned assertModC0()
{
return metaInfo.metaInfo1 |= (1<<2);
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}
BX_CPP_INLINE void setOpcodeReg(unsigned opreg) {
// The opcodeReg form (low 3 bits of the opcode byte (extended
// by REX.B on x86-64) to be used with IxIxForm or IqForm.
metaData[BX_INSTR_METADATA_RM] = opreg;
}
BX_CPP_INLINE unsigned opcodeReg() {
return metaData[BX_INSTR_METADATA_RM];
}
BX_CPP_INLINE void setModRM(unsigned modrm) {
metaData[BX_INSTR_METADATA_MODRM] = modrm;
}
BX_CPP_INLINE unsigned modrm() {
return metaData[BX_INSTR_METADATA_MODRM];
}
BX_CPP_INLINE void setNnn(unsigned nnn) {
metaData[BX_INSTR_METADATA_NNN] = nnn;
}
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BX_CPP_INLINE unsigned nnn() {
return metaData[BX_INSTR_METADATA_NNN];
}
BX_CPP_INLINE void setRm(unsigned rm) {
metaData[BX_INSTR_METADATA_RM] = rm;
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}
BX_CPP_INLINE unsigned rm() {
return metaData[BX_INSTR_METADATA_RM];
}
BX_CPP_INLINE void setSibScale(unsigned scale) {
metaData[BX_INSTR_METADATA_SCALE] = scale;
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}
BX_CPP_INLINE unsigned sibScale() {
return metaData[BX_INSTR_METADATA_SCALE];
}
BX_CPP_INLINE void setSibIndex(unsigned index) {
metaData[BX_INSTR_METADATA_INDEX] = index;
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}
BX_CPP_INLINE unsigned sibIndex() {
return metaData[BX_INSTR_METADATA_INDEX];
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}
BX_CPP_INLINE void setSibBase(unsigned base) {
metaData[BX_INSTR_METADATA_BASE] = base;
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}
BX_CPP_INLINE unsigned sibBase() {
return metaData[BX_INSTR_METADATA_BASE];
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}
BX_CPP_INLINE Bit32u displ32u() { return modRMForm.displ32u; }
BX_CPP_INLINE Bit16u displ16u() { return modRMForm.displ16u; }
BX_CPP_INLINE Bit32u Id() { return modRMForm.Id; }
BX_CPP_INLINE Bit16u Iw() { return modRMForm.Iw; }
BX_CPP_INLINE Bit8u Ib() { return modRMForm.Ib; }
BX_CPP_INLINE Bit16u Iw2() { return IxIxForm.Iw2; } // Legacy
BX_CPP_INLINE Bit8u Ib2() { return IxIxForm.Ib2; } // Legacy
#if BX_SUPPORT_X86_64
BX_CPP_INLINE Bit64u Iq() { return IqForm.Iq; }
#endif
// Info in the metaInfo field.
// Note: the 'L' at the end of certain flags, means the value returned
// is for Logical comparisons, eg if (i->os32L() && i->as32L()). If you
// want a bx_bool value, use os32B() etc. This makes for smaller
// code, when a strict 0 or 1 is not necessary.
BX_CPP_INLINE void init(unsigned os32, unsigned as32, unsigned os64, unsigned as64)
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{
metaInfo.metaInfo1 = (os32<<3) | (as32<<4) | (os64<<5) | (as64<<6);
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metaInfo.metaInfo2 = 0;
metaInfo.metaInfo3 = 0;
metaData[BX_INSTR_METADATA_SEG] = BX_SEG_REG_NULL;
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}
BX_CPP_INLINE unsigned seg(void) {
return metaData[BX_INSTR_METADATA_SEG];
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}
BX_CPP_INLINE void setSeg(unsigned val) {
metaData[BX_INSTR_METADATA_SEG] = val;
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}
BX_CPP_INLINE unsigned os32L(void) {
return metaInfo.metaInfo1 & (1<<3);
}
BX_CPP_INLINE unsigned os32B(void) {
return (metaInfo.metaInfo1 >> 3) & 1;
}
BX_CPP_INLINE void setOs32B(unsigned bit) {
metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<3)) | (bit<<3);
}
BX_CPP_INLINE void assertOs32(void) {
metaInfo.metaInfo1 |= (1<<3);
}
BX_CPP_INLINE unsigned as32L(void) {
return metaInfo.metaInfo1 & (1<<4);
}
BX_CPP_INLINE unsigned as32B(void) {
return (metaInfo.metaInfo1 >> 4) & 1;
}
BX_CPP_INLINE void setAs32B(unsigned bit) {
metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<4)) | (bit<<4);
}
#if BX_SUPPORT_X86_64
BX_CPP_INLINE unsigned os64L(void) {
return metaInfo.metaInfo1 & (1<<5);
}
BX_CPP_INLINE void assertOs64(void) {
metaInfo.metaInfo1 |= (1<<5);
}
#else
BX_CPP_INLINE unsigned os64L(void) { return 0; }
#endif
#if BX_SUPPORT_X86_64
BX_CPP_INLINE unsigned as64L(void) {
return metaInfo.metaInfo1 & (1<<6);
}
BX_CPP_INLINE void setAs64B(unsigned bit) {
metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<6)) | (bit<<6);
}
#else
BX_CPP_INLINE unsigned as64L(void) { return 0; }
#endif
#if BX_SUPPORT_X86_64
BX_CPP_INLINE unsigned extend8bitL(void) {
return metaInfo.metaInfo1 & (1<<7);
}
BX_CPP_INLINE void assertExtend8bit(void) {
metaInfo.metaInfo1 |= (1<<7);
}
#endif
BX_CPP_INLINE unsigned ilen(void) {
return metaInfo.metaInfo2;
}
BX_CPP_INLINE void setILen(unsigned ilen) {
metaInfo.metaInfo2 = ilen;
}
BX_CPP_INLINE unsigned repUsedL(void) {
return metaInfo.metaInfo1 & 3;
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}
BX_CPP_INLINE unsigned repUsedValue(void) {
return metaInfo.metaInfo1 & 3;
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}
BX_CPP_INLINE void setRepUsed(unsigned value) {
metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~3) | (value);
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}
#if BX_SUPPORT_TRACE_CACHE
BX_CPP_INLINE void setStopTraceAttr(void) {
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metaInfo.metaInfo3 |= (1<<9);
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}
BX_CPP_INLINE unsigned getStopTraceAttr(void) {
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return metaInfo.metaInfo3 & (1<<9);
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}
#endif
// Note this is the highest field, and thus needs no masking.
// DON'T PUT ANY FIELDS HIGHER THAN THIS ONE WITHOUT ADDING A MASK.
BX_CPP_INLINE unsigned b1(void) {
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return metaInfo.metaInfo3 & 0x1ff;
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}
BX_CPP_INLINE void setB1(unsigned b1) {
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metaInfo.metaInfo3 = (metaInfo.metaInfo3 & ~0x1ff) | (b1 & 0x1ff);
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}
};
// <TAG-CLASS-INSTRUCTION-END>
#endif