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Bochs/bochs/cpu/init.cc

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- add RCS Id to header of every file. This makes it easier to know what's going on when someone sends in a modified file.
2001-10-03 17:10:38 +04:00
/////////////////////////////////////////////////////////////////////////
Updated CR4 to use the patented Bryce bitfields accessor method for both cpu32 and cpu64, to make upcoming merging easier, and the code cleaner. Compiled for debug as well, and fixed CR4 for that also.
2002-09-14 23:21:41 +04:00
// $Id: init.cc,v 1.27 2002-09-14 19:21:40 kevinlawton Exp $
- add RCS Id to header of every file. This makes it easier to know what's going on when someone sends in a modified file.
2001-10-03 17:10:38 +04:00
/////////////////////////////////////////////////////////////////////////
//
- update copyright dates to 2001 for all mandrake headers - for bochs files with other header, replaced with current mandrake header
2001-04-10 06:20:02 +04:00
// Copyright (C) 2001 MandrakeSoft S.A.
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- parts of the SMP merge apparantly broke the debugger and this revision tries to fix it. The shortcuts to register names such as AX and DL are #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR. When BX_USE_CPU_SMF=1, this works fine. (This is what bochs used for a long time, and nobody used the SMF=0 mode at all.) To make SMP bochs work, I had to get SMF=0 mode working for the CPU so that there could be an array of cpus. When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which only works within methods of BX_CPU_C. Code outside of BX_CPU_C must reference BX_CPU(num) instead. - to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined. This is only done in the cpu/*.cc code.
2001-05-24 22:46:34 +04:00
#define NEED_CPU_REG_SHORTCUTS 1
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
#include "bochs.h"
merge in BRANCH-io-cleanup. To see the commit logs for this use either cvsweb or cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files. In general this provides a generic interface for logging. logfunctions:: is a class that is inherited by some classes, and also . allocated as a standalone global called 'genlog'. All logging uses . one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this . class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros . respectively. . . An example usage: . BX_INFO(("Hello, World!\n")); iofunctions:: is a class that is allocated once by default, and assigned as the iofunction of each logfunctions instance. It is this class that maintains the file descriptor and other output related code, at this point using vfprintf(). At some future point, someone may choose to write a gui 'console' for bochs to which messages would be redirected simply by assigning a different iofunction class to the various logfunctions objects. More cleanup is coming, but this works for now. If you want to see alot of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1. Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
#define LOG_THIS BX_CPU_THIS_PTR
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
/* the device id and stepping id are loaded into DH & DL upon processor
startup. for device id: 3 = 80386, 4 = 80486. just make up a
number for the stepping (revision) id. */
#define BX_DEVICE_ID 3
#define BX_STEPPING_ID 0
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
BX_CPU_C::BX_CPU_C()
- there were cases where BX_APIC_SUPPORT were used and others where BX_SUPPORT_APIC were used. To follow the pattern used by other names like this, I changed them all to BX_SUPPORT_APIC. Thanks to Tom Lindström for chasing this down!
2001-06-12 17:07:43 +04:00
#if BX_SUPPORT_APIC
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
: local_apic (this)
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
// in case of SMF, you cannot reference any member data
// in the constructor because the only access to it is via
// global variables which aren't initialized quite yet.
setprefix -> put
2001-06-27 23:16:01 +04:00
put("CPU");
- set logging prefix and type in the constructor
2001-06-16 08:27:22 +04:00
settype (CPU0LOG);
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
}
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
- apply a patch I've been working on - modified files: config.h.in cpu/init.cc debug/dbg_main.cc gui/control.cc gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h iodev/keyboard.cc ---------------------------------------------------------------------- Patch name: patch.wx-show-cpu2 Author: Bryce Denney Date: Fri Sep 6 12:13:28 EDT 2002 Description: Second try at implementing the "Debug:Show Cpu" and "Debug:Show Keyboard" dialog with values that change as the simulation proceeds. (Nobody gets to see the first try.) This is the first step toward making something resembling a wxWindows debugger. First, variables which are going to be visible in the CI must be registered as parameters. For some variables, it might be acceptable to change them from Bit32u into bx_param_num_c and access them only with set/get methods, but for most variables it would be a horrible pain and wreck performance. To deal with this, I introduced the concept of a shadow parameter. A normal parameter has its value stored inside the struct, but a shadow parameter has only a pointer to the value. Shadow params allow you to treat any variable as if it was a parameter, without having to change its type and access it using get/set methods. Of course, a shadow param's value is controlled by someone else, so it can change at any time. To demonstrate and test the registration of shadow parameters, I added code in cpu/init.cc to register a few CPU registers and code in iodev/keyboard.cc to register a few keyboard state values. Now these parameters are visible in the Debug:Show CPU and Debug:Show Keyboard dialog boxes. The Debug:Show* dialog boxes are created by the ParamDialog class, which already understands how to display each type of parameter, including the new shadow parameters (because they are just a subclass of a normal parameter class). I have added a ParamDialog::Refresh() method, which rereads the value from every parameter that it is displaying and changes the displayed value. At the moment, in the Debug:Show CPU dialog, changing the values has no effect. However this is trivial to add when it's time (just call CommitChanges!). It wouldn't really make sense to change the values unless you have paused the simulation, for example when single stepping with the debugger. The Refresh() method must be called periodically or else the dialog will show the initial values forever. At the moment, Refresh() is called when the simulator sends an async event called BX_ASYNC_EVT_REFRESH, created by a call to SIM->refresh_ci (). Details: - implement shadow parameter class for Bit32s, called bx_shadow_num_c. implement shadow parameter class for Boolean, called bx_shadow_bool_c. more to follow (I need one for every type!) - now the simulator thread can request that the config interface refresh its display. For now, the refresh event causes the CI to check every parameter it is watching and change the display value. Later, it may be worth the trouble to keep track of which parameters have actually changed. Code in the simulator thread calls SIM->refresh_ci(), which creates an async event called BX_ASYNC_EVT_REFRESH and sends it to the config interface. When it arrives in the wxWindows gui thread, it calls RefreshDialogs(), which calls the Refresh() method on any dialogs that might need it. - in the debugger, SIM->refresh_ci() is called before every prompt is printed. Otherwise, the refresh would wait until the next SIM->periodic(), which might be thousands of cycles. This way, when you're single stepping, the dialogs update with every step. - To improve performance, the CI has a flag (MyFrame::WantRefresh()) which tells whether it has any need for refresh events. If no dialogs are showing that need refresh events, then no event is sent between threads. - add a few defaults to the param classes that affect the settings of newly created parameters. When declaring a lot of params with similar settings it's more compact to set the default for new params rather than to change each one separately. default_text_format is the printf format string for displaying numbers. default_base is the default base for displaying numbers (0, 16, 2, etc.) - I added to ParamDialog to make it able to display modeless dialog boxes such as "Debug:Show CPU". The new Refresh() method queries all the parameters for their current value and changes the value in the wxWindows control. The ParamDialog class still needs a little work; for example, if it's modal it should have Cancel/Ok buttons, but if it's going to be modeless it should maybe have Apply (commit any changes) and Close.
2002-09-06 20:43:26 +04:00
#if BX_WITH_WX
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
#define CASE_SEG_REG_GET(x) \
case BXP_CPU_SEG_##x: \
return BX_CPU_THIS_PTR sregs[BX_SEG_REG_##x].selector.value;
#define CASE_SEG_REG_SET(reg, val) \
case BXP_CPU_SEG_##reg: \
BX_CPU_THIS_PTR load_seg_reg (&BX_CPU_THIS_PTR sregs[BX_SEG_REG_##reg],val); \
break;
#define CASE_LAZY_EFLAG_GET(flag) \
case BXP_CPU_EFLAGS_##flag: \
return BX_CPU_THIS_PTR get_##flag ();
#define CASE_LAZY_EFLAG_SET(flag, val) \
case BXP_CPU_EFLAGS_##flag: \
BX_CPU_THIS_PTR set_##flag(val); \
break;
#define CASE_EFLAG_GET(flag) \
case BXP_CPU_EFLAGS_##flag: \
- this revision changes the way eflags are accessed throughout the cpu and cpu64 directories. Instead of using the macros introduced in cpu.h rev 1.37 such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline methods on the BX_CPU_C object that access the eflags fields. The problem with the macros is that they cannot be used outside the BX_CPU_C object. The macros have now been removed, and all references to eflags now use these new accessors. - I debated whether to put the accessors as members of the BX_CPU_C object or members of the bx_flags_reg_t struct. I chose to make them members of BX_CPU_C for two reasons: 1. the lazy flags are implemented as members of BX_CPU_C, and 2. the eflags are referenced in many many places and it is more compact without having to put eflags in front of each. (The real problem with compactness is having to write BX_CPU_THIS_PTR in front of everything, but that's another story.) - Kevin pointed out a major bug in my set accessor code. What a difference a little tilde can make! That is fixed now. - modified: load32bitOShack.cc debug/dbg_main.cc and in both cpu and cpu64 directories: cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc string.cc vm8086.cc
2002-09-12 22:10:46 +04:00
return BX_CPU_THIS_PTR get_##flag ();
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
#define CASE_EFLAG_SET(flag, val) \
case BXP_CPU_EFLAGS_##flag: \
- this revision changes the way eflags are accessed throughout the cpu and cpu64 directories. Instead of using the macros introduced in cpu.h rev 1.37 such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline methods on the BX_CPU_C object that access the eflags fields. The problem with the macros is that they cannot be used outside the BX_CPU_C object. The macros have now been removed, and all references to eflags now use these new accessors. - I debated whether to put the accessors as members of the BX_CPU_C object or members of the bx_flags_reg_t struct. I chose to make them members of BX_CPU_C for two reasons: 1. the lazy flags are implemented as members of BX_CPU_C, and 2. the eflags are referenced in many many places and it is more compact without having to put eflags in front of each. (The real problem with compactness is having to write BX_CPU_THIS_PTR in front of everything, but that's another story.) - Kevin pointed out a major bug in my set accessor code. What a difference a little tilde can make! That is fixed now. - modified: load32bitOShack.cc debug/dbg_main.cc and in both cpu and cpu64 directories: cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc string.cc vm8086.cc
2002-09-12 22:10:46 +04:00
BX_CPU_THIS_PTR set_##flag(val); \
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
break;
- apply a patch I've been working on - modified files: config.h.in cpu/init.cc debug/dbg_main.cc gui/control.cc gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h iodev/keyboard.cc ---------------------------------------------------------------------- Patch name: patch.wx-show-cpu2 Author: Bryce Denney Date: Fri Sep 6 12:13:28 EDT 2002 Description: Second try at implementing the "Debug:Show Cpu" and "Debug:Show Keyboard" dialog with values that change as the simulation proceeds. (Nobody gets to see the first try.) This is the first step toward making something resembling a wxWindows debugger. First, variables which are going to be visible in the CI must be registered as parameters. For some variables, it might be acceptable to change them from Bit32u into bx_param_num_c and access them only with set/get methods, but for most variables it would be a horrible pain and wreck performance. To deal with this, I introduced the concept of a shadow parameter. A normal parameter has its value stored inside the struct, but a shadow parameter has only a pointer to the value. Shadow params allow you to treat any variable as if it was a parameter, without having to change its type and access it using get/set methods. Of course, a shadow param's value is controlled by someone else, so it can change at any time. To demonstrate and test the registration of shadow parameters, I added code in cpu/init.cc to register a few CPU registers and code in iodev/keyboard.cc to register a few keyboard state values. Now these parameters are visible in the Debug:Show CPU and Debug:Show Keyboard dialog boxes. The Debug:Show* dialog boxes are created by the ParamDialog class, which already understands how to display each type of parameter, including the new shadow parameters (because they are just a subclass of a normal parameter class). I have added a ParamDialog::Refresh() method, which rereads the value from every parameter that it is displaying and changes the displayed value. At the moment, in the Debug:Show CPU dialog, changing the values has no effect. However this is trivial to add when it's time (just call CommitChanges!). It wouldn't really make sense to change the values unless you have paused the simulation, for example when single stepping with the debugger. The Refresh() method must be called periodically or else the dialog will show the initial values forever. At the moment, Refresh() is called when the simulator sends an async event called BX_ASYNC_EVT_REFRESH, created by a call to SIM->refresh_ci (). Details: - implement shadow parameter class for Bit32s, called bx_shadow_num_c. implement shadow parameter class for Boolean, called bx_shadow_bool_c. more to follow (I need one for every type!) - now the simulator thread can request that the config interface refresh its display. For now, the refresh event causes the CI to check every parameter it is watching and change the display value. Later, it may be worth the trouble to keep track of which parameters have actually changed. Code in the simulator thread calls SIM->refresh_ci(), which creates an async event called BX_ASYNC_EVT_REFRESH and sends it to the config interface. When it arrives in the wxWindows gui thread, it calls RefreshDialogs(), which calls the Refresh() method on any dialogs that might need it. - in the debugger, SIM->refresh_ci() is called before every prompt is printed. Otherwise, the refresh would wait until the next SIM->periodic(), which might be thousands of cycles. This way, when you're single stepping, the dialogs update with every step. - To improve performance, the CI has a flag (MyFrame::WantRefresh()) which tells whether it has any need for refresh events. If no dialogs are showing that need refresh events, then no event is sent between threads. - add a few defaults to the param classes that affect the settings of newly created parameters. When declaring a lot of params with similar settings it's more compact to set the default for new params rather than to change each one separately. default_text_format is the printf format string for displaying numbers. default_base is the default base for displaying numbers (0, 16, 2, etc.) - I added to ParamDialog to make it able to display modeless dialog boxes such as "Debug:Show CPU". The new Refresh() method queries all the parameters for their current value and changes the value in the wxWindows control. The ParamDialog class still needs a little work; for example, if it's modal it should have Cancel/Ok buttons, but if it's going to be modeless it should maybe have Apply (commit any changes) and Close.
2002-09-06 20:43:26 +04:00
// implement get/set handler for parameters that need unusual set/get
static Bit32s
cpu_param_handler (bx_param_c *param, int set, Bit32s val)
{
bx_id id = param->get_id ();
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
if (set) {
- apply a patch I've been working on - modified files: config.h.in cpu/init.cc debug/dbg_main.cc gui/control.cc gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h iodev/keyboard.cc ---------------------------------------------------------------------- Patch name: patch.wx-show-cpu2 Author: Bryce Denney Date: Fri Sep 6 12:13:28 EDT 2002 Description: Second try at implementing the "Debug:Show Cpu" and "Debug:Show Keyboard" dialog with values that change as the simulation proceeds. (Nobody gets to see the first try.) This is the first step toward making something resembling a wxWindows debugger. First, variables which are going to be visible in the CI must be registered as parameters. For some variables, it might be acceptable to change them from Bit32u into bx_param_num_c and access them only with set/get methods, but for most variables it would be a horrible pain and wreck performance. To deal with this, I introduced the concept of a shadow parameter. A normal parameter has its value stored inside the struct, but a shadow parameter has only a pointer to the value. Shadow params allow you to treat any variable as if it was a parameter, without having to change its type and access it using get/set methods. Of course, a shadow param's value is controlled by someone else, so it can change at any time. To demonstrate and test the registration of shadow parameters, I added code in cpu/init.cc to register a few CPU registers and code in iodev/keyboard.cc to register a few keyboard state values. Now these parameters are visible in the Debug:Show CPU and Debug:Show Keyboard dialog boxes. The Debug:Show* dialog boxes are created by the ParamDialog class, which already understands how to display each type of parameter, including the new shadow parameters (because they are just a subclass of a normal parameter class). I have added a ParamDialog::Refresh() method, which rereads the value from every parameter that it is displaying and changes the displayed value. At the moment, in the Debug:Show CPU dialog, changing the values has no effect. However this is trivial to add when it's time (just call CommitChanges!). It wouldn't really make sense to change the values unless you have paused the simulation, for example when single stepping with the debugger. The Refresh() method must be called periodically or else the dialog will show the initial values forever. At the moment, Refresh() is called when the simulator sends an async event called BX_ASYNC_EVT_REFRESH, created by a call to SIM->refresh_ci (). Details: - implement shadow parameter class for Bit32s, called bx_shadow_num_c. implement shadow parameter class for Boolean, called bx_shadow_bool_c. more to follow (I need one for every type!) - now the simulator thread can request that the config interface refresh its display. For now, the refresh event causes the CI to check every parameter it is watching and change the display value. Later, it may be worth the trouble to keep track of which parameters have actually changed. Code in the simulator thread calls SIM->refresh_ci(), which creates an async event called BX_ASYNC_EVT_REFRESH and sends it to the config interface. When it arrives in the wxWindows gui thread, it calls RefreshDialogs(), which calls the Refresh() method on any dialogs that might need it. - in the debugger, SIM->refresh_ci() is called before every prompt is printed. Otherwise, the refresh would wait until the next SIM->periodic(), which might be thousands of cycles. This way, when you're single stepping, the dialogs update with every step. - To improve performance, the CI has a flag (MyFrame::WantRefresh()) which tells whether it has any need for refresh events. If no dialogs are showing that need refresh events, then no event is sent between threads. - add a few defaults to the param classes that affect the settings of newly created parameters. When declaring a lot of params with similar settings it's more compact to set the default for new params rather than to change each one separately. default_text_format is the printf format string for displaying numbers. default_base is the default base for displaying numbers (0, 16, 2, etc.) - I added to ParamDialog to make it able to display modeless dialog boxes such as "Debug:Show CPU". The new Refresh() method queries all the parameters for their current value and changes the value in the wxWindows control. The ParamDialog class still needs a little work; for example, if it's modal it should have Cancel/Ok buttons, but if it's going to be modeless it should maybe have Apply (commit any changes) and Close.
2002-09-06 20:43:26 +04:00
switch (id) {
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
CASE_SEG_REG_SET (CS, val);
CASE_SEG_REG_SET (DS, val);
CASE_SEG_REG_SET (SS, val);
CASE_SEG_REG_SET (ES, val);
CASE_SEG_REG_SET (FS, val);
CASE_SEG_REG_SET (GS, val);
case BXP_CPU_SEG_LDTR:
BX_PANIC(("setting LDTR not implemented"));
break;
case BXP_CPU_SEG_TR:
BX_PANIC(("setting TR not implemented"));
break;
CASE_LAZY_EFLAG_SET (OF, val);
CASE_LAZY_EFLAG_SET (SF, val);
CASE_LAZY_EFLAG_SET (ZF, val);
CASE_LAZY_EFLAG_SET (AF, val);
CASE_LAZY_EFLAG_SET (PF, val);
CASE_LAZY_EFLAG_SET (CF, val);
CASE_EFLAG_SET (ID, val);
//CASE_EFLAG_SET (VIP, val);
//CASE_EFLAG_SET (VIF, val);
CASE_EFLAG_SET (AC, val);
CASE_EFLAG_SET (VM, val);
CASE_EFLAG_SET (RF, val);
CASE_EFLAG_SET (NT, val);
CASE_EFLAG_SET (IOPL, val);
CASE_EFLAG_SET (DF, val);
CASE_EFLAG_SET (IF, val);
CASE_EFLAG_SET (TF, val);
default:
BX_PANIC (("cpu_param_handler set id %d not handled", id));
- apply a patch I've been working on - modified files: config.h.in cpu/init.cc debug/dbg_main.cc gui/control.cc gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h iodev/keyboard.cc ---------------------------------------------------------------------- Patch name: patch.wx-show-cpu2 Author: Bryce Denney Date: Fri Sep 6 12:13:28 EDT 2002 Description: Second try at implementing the "Debug:Show Cpu" and "Debug:Show Keyboard" dialog with values that change as the simulation proceeds. (Nobody gets to see the first try.) This is the first step toward making something resembling a wxWindows debugger. First, variables which are going to be visible in the CI must be registered as parameters. For some variables, it might be acceptable to change them from Bit32u into bx_param_num_c and access them only with set/get methods, but for most variables it would be a horrible pain and wreck performance. To deal with this, I introduced the concept of a shadow parameter. A normal parameter has its value stored inside the struct, but a shadow parameter has only a pointer to the value. Shadow params allow you to treat any variable as if it was a parameter, without having to change its type and access it using get/set methods. Of course, a shadow param's value is controlled by someone else, so it can change at any time. To demonstrate and test the registration of shadow parameters, I added code in cpu/init.cc to register a few CPU registers and code in iodev/keyboard.cc to register a few keyboard state values. Now these parameters are visible in the Debug:Show CPU and Debug:Show Keyboard dialog boxes. The Debug:Show* dialog boxes are created by the ParamDialog class, which already understands how to display each type of parameter, including the new shadow parameters (because they are just a subclass of a normal parameter class). I have added a ParamDialog::Refresh() method, which rereads the value from every parameter that it is displaying and changes the displayed value. At the moment, in the Debug:Show CPU dialog, changing the values has no effect. However this is trivial to add when it's time (just call CommitChanges!). It wouldn't really make sense to change the values unless you have paused the simulation, for example when single stepping with the debugger. The Refresh() method must be called periodically or else the dialog will show the initial values forever. At the moment, Refresh() is called when the simulator sends an async event called BX_ASYNC_EVT_REFRESH, created by a call to SIM->refresh_ci (). Details: - implement shadow parameter class for Bit32s, called bx_shadow_num_c. implement shadow parameter class for Boolean, called bx_shadow_bool_c. more to follow (I need one for every type!) - now the simulator thread can request that the config interface refresh its display. For now, the refresh event causes the CI to check every parameter it is watching and change the display value. Later, it may be worth the trouble to keep track of which parameters have actually changed. Code in the simulator thread calls SIM->refresh_ci(), which creates an async event called BX_ASYNC_EVT_REFRESH and sends it to the config interface. When it arrives in the wxWindows gui thread, it calls RefreshDialogs(), which calls the Refresh() method on any dialogs that might need it. - in the debugger, SIM->refresh_ci() is called before every prompt is printed. Otherwise, the refresh would wait until the next SIM->periodic(), which might be thousands of cycles. This way, when you're single stepping, the dialogs update with every step. - To improve performance, the CI has a flag (MyFrame::WantRefresh()) which tells whether it has any need for refresh events. If no dialogs are showing that need refresh events, then no event is sent between threads. - add a few defaults to the param classes that affect the settings of newly created parameters. When declaring a lot of params with similar settings it's more compact to set the default for new params rather than to change each one separately. default_text_format is the printf format string for displaying numbers. default_base is the default base for displaying numbers (0, 16, 2, etc.) - I added to ParamDialog to make it able to display modeless dialog boxes such as "Debug:Show CPU". The new Refresh() method queries all the parameters for their current value and changes the value in the wxWindows control. The ParamDialog class still needs a little work; for example, if it's modal it should have Cancel/Ok buttons, but if it's going to be modeless it should maybe have Apply (commit any changes) and Close.
2002-09-06 20:43:26 +04:00
}
} else {
switch (id) {
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
CASE_SEG_REG_GET (CS);
CASE_SEG_REG_GET (DS);
CASE_SEG_REG_GET (SS);
CASE_SEG_REG_GET (ES);
CASE_SEG_REG_GET (FS);
CASE_SEG_REG_GET (GS);
case BXP_CPU_SEG_LDTR:
return BX_CPU_THIS_PTR ldtr.selector.value;
break;
case BXP_CPU_SEG_TR:
return BX_CPU_THIS_PTR tr.selector.value;
break;
CASE_LAZY_EFLAG_GET (OF);
CASE_LAZY_EFLAG_GET (SF);
CASE_LAZY_EFLAG_GET (ZF);
CASE_LAZY_EFLAG_GET (AF);
CASE_LAZY_EFLAG_GET (PF);
CASE_LAZY_EFLAG_GET (CF);
CASE_EFLAG_GET (ID);
//CASE_EFLAG_GET (VIP);
//CASE_EFLAG_GET (VIF);
CASE_EFLAG_GET (AC);
CASE_EFLAG_GET (VM);
CASE_EFLAG_GET (RF);
CASE_EFLAG_GET (NT);
CASE_EFLAG_GET (IOPL);
CASE_EFLAG_GET (DF);
CASE_EFLAG_GET (IF);
CASE_EFLAG_GET (TF);
default:
BX_PANIC (("cpu_param_handler get id %d ('%s') not handled", id, param->get_name ()));
- apply a patch I've been working on - modified files: config.h.in cpu/init.cc debug/dbg_main.cc gui/control.cc gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h iodev/keyboard.cc ---------------------------------------------------------------------- Patch name: patch.wx-show-cpu2 Author: Bryce Denney Date: Fri Sep 6 12:13:28 EDT 2002 Description: Second try at implementing the "Debug:Show Cpu" and "Debug:Show Keyboard" dialog with values that change as the simulation proceeds. (Nobody gets to see the first try.) This is the first step toward making something resembling a wxWindows debugger. First, variables which are going to be visible in the CI must be registered as parameters. For some variables, it might be acceptable to change them from Bit32u into bx_param_num_c and access them only with set/get methods, but for most variables it would be a horrible pain and wreck performance. To deal with this, I introduced the concept of a shadow parameter. A normal parameter has its value stored inside the struct, but a shadow parameter has only a pointer to the value. Shadow params allow you to treat any variable as if it was a parameter, without having to change its type and access it using get/set methods. Of course, a shadow param's value is controlled by someone else, so it can change at any time. To demonstrate and test the registration of shadow parameters, I added code in cpu/init.cc to register a few CPU registers and code in iodev/keyboard.cc to register a few keyboard state values. Now these parameters are visible in the Debug:Show CPU and Debug:Show Keyboard dialog boxes. The Debug:Show* dialog boxes are created by the ParamDialog class, which already understands how to display each type of parameter, including the new shadow parameters (because they are just a subclass of a normal parameter class). I have added a ParamDialog::Refresh() method, which rereads the value from every parameter that it is displaying and changes the displayed value. At the moment, in the Debug:Show CPU dialog, changing the values has no effect. However this is trivial to add when it's time (just call CommitChanges!). It wouldn't really make sense to change the values unless you have paused the simulation, for example when single stepping with the debugger. The Refresh() method must be called periodically or else the dialog will show the initial values forever. At the moment, Refresh() is called when the simulator sends an async event called BX_ASYNC_EVT_REFRESH, created by a call to SIM->refresh_ci (). Details: - implement shadow parameter class for Bit32s, called bx_shadow_num_c. implement shadow parameter class for Boolean, called bx_shadow_bool_c. more to follow (I need one for every type!) - now the simulator thread can request that the config interface refresh its display. For now, the refresh event causes the CI to check every parameter it is watching and change the display value. Later, it may be worth the trouble to keep track of which parameters have actually changed. Code in the simulator thread calls SIM->refresh_ci(), which creates an async event called BX_ASYNC_EVT_REFRESH and sends it to the config interface. When it arrives in the wxWindows gui thread, it calls RefreshDialogs(), which calls the Refresh() method on any dialogs that might need it. - in the debugger, SIM->refresh_ci() is called before every prompt is printed. Otherwise, the refresh would wait until the next SIM->periodic(), which might be thousands of cycles. This way, when you're single stepping, the dialogs update with every step. - To improve performance, the CI has a flag (MyFrame::WantRefresh()) which tells whether it has any need for refresh events. If no dialogs are showing that need refresh events, then no event is sent between threads. - add a few defaults to the param classes that affect the settings of newly created parameters. When declaring a lot of params with similar settings it's more compact to set the default for new params rather than to change each one separately. default_text_format is the printf format string for displaying numbers. default_base is the default base for displaying numbers (0, 16, 2, etc.) - I added to ParamDialog to make it able to display modeless dialog boxes such as "Debug:Show CPU". The new Refresh() method queries all the parameters for their current value and changes the value in the wxWindows control. The ParamDialog class still needs a little work; for example, if it's modal it should have Cancel/Ok buttons, but if it's going to be modeless it should maybe have Apply (commit any changes) and Close.
2002-09-06 20:43:26 +04:00
}
}
return val;
}
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
#undef CASE_SEG_REG_GET
#undef CASE_SEG_REG_SET
- apply a patch I've been working on - modified files: config.h.in cpu/init.cc debug/dbg_main.cc gui/control.cc gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h iodev/keyboard.cc ---------------------------------------------------------------------- Patch name: patch.wx-show-cpu2 Author: Bryce Denney Date: Fri Sep 6 12:13:28 EDT 2002 Description: Second try at implementing the "Debug:Show Cpu" and "Debug:Show Keyboard" dialog with values that change as the simulation proceeds. (Nobody gets to see the first try.) This is the first step toward making something resembling a wxWindows debugger. First, variables which are going to be visible in the CI must be registered as parameters. For some variables, it might be acceptable to change them from Bit32u into bx_param_num_c and access them only with set/get methods, but for most variables it would be a horrible pain and wreck performance. To deal with this, I introduced the concept of a shadow parameter. A normal parameter has its value stored inside the struct, but a shadow parameter has only a pointer to the value. Shadow params allow you to treat any variable as if it was a parameter, without having to change its type and access it using get/set methods. Of course, a shadow param's value is controlled by someone else, so it can change at any time. To demonstrate and test the registration of shadow parameters, I added code in cpu/init.cc to register a few CPU registers and code in iodev/keyboard.cc to register a few keyboard state values. Now these parameters are visible in the Debug:Show CPU and Debug:Show Keyboard dialog boxes. The Debug:Show* dialog boxes are created by the ParamDialog class, which already understands how to display each type of parameter, including the new shadow parameters (because they are just a subclass of a normal parameter class). I have added a ParamDialog::Refresh() method, which rereads the value from every parameter that it is displaying and changes the displayed value. At the moment, in the Debug:Show CPU dialog, changing the values has no effect. However this is trivial to add when it's time (just call CommitChanges!). It wouldn't really make sense to change the values unless you have paused the simulation, for example when single stepping with the debugger. The Refresh() method must be called periodically or else the dialog will show the initial values forever. At the moment, Refresh() is called when the simulator sends an async event called BX_ASYNC_EVT_REFRESH, created by a call to SIM->refresh_ci (). Details: - implement shadow parameter class for Bit32s, called bx_shadow_num_c. implement shadow parameter class for Boolean, called bx_shadow_bool_c. more to follow (I need one for every type!) - now the simulator thread can request that the config interface refresh its display. For now, the refresh event causes the CI to check every parameter it is watching and change the display value. Later, it may be worth the trouble to keep track of which parameters have actually changed. Code in the simulator thread calls SIM->refresh_ci(), which creates an async event called BX_ASYNC_EVT_REFRESH and sends it to the config interface. When it arrives in the wxWindows gui thread, it calls RefreshDialogs(), which calls the Refresh() method on any dialogs that might need it. - in the debugger, SIM->refresh_ci() is called before every prompt is printed. Otherwise, the refresh would wait until the next SIM->periodic(), which might be thousands of cycles. This way, when you're single stepping, the dialogs update with every step. - To improve performance, the CI has a flag (MyFrame::WantRefresh()) which tells whether it has any need for refresh events. If no dialogs are showing that need refresh events, then no event is sent between threads. - add a few defaults to the param classes that affect the settings of newly created parameters. When declaring a lot of params with similar settings it's more compact to set the default for new params rather than to change each one separately. default_text_format is the printf format string for displaying numbers. default_base is the default base for displaying numbers (0, 16, 2, etc.) - I added to ParamDialog to make it able to display modeless dialog boxes such as "Debug:Show CPU". The new Refresh() method queries all the parameters for their current value and changes the value in the wxWindows control. The ParamDialog class still needs a little work; for example, if it's modal it should have Cancel/Ok buttons, but if it's going to be modeless it should maybe have Apply (commit any changes) and Close.
2002-09-06 20:43:26 +04:00
#endif
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
void BX_CPU_C::init(BX_MEM_C *addrspace)
{
Updated CR4 to use the patented Bryce bitfields accessor method for both cpu32 and cpu64, to make upcoming merging easier, and the code cleaner. Compiled for debug as well, and fixed CR4 for that also.
2002-09-14 23:21:41 +04:00
BX_DEBUG(( "Init $Id: init.cc,v 1.27 2002-09-14 19:21:40 kevinlawton Exp $"));
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
// BX_CPU_C constructor
BX_CPU_THIS_PTR set_INTR (0);
- there were cases where BX_APIC_SUPPORT were used and others where BX_SUPPORT_APIC were used. To follow the pattern used by other names like this, I changed them all to BX_SUPPORT_APIC. Thanks to Tom Lindström for chasing this down!
2001-06-12 17:07:43 +04:00
#if BX_SUPPORT_APIC
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
local_apic.init ();
#endif
// in SMP mode, the prefix of the CPU will be changed to [CPUn] in
// bx_local_apic_c::set_id as soon as the apic ID is assigned.
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
/* hack for the following fields. Its easier to decode mod-rm bytes if
you can assume there's always a base & index register used. For
modes which don't really use them, point to an empty (zeroed) register.
*/
empty_register = 0;
// 16bit address mode base register, used for mod-rm decoding
_16bit_base_reg[0] = &gen_reg[BX_16BIT_REG_BX].word.rx;
_16bit_base_reg[1] = &gen_reg[BX_16BIT_REG_BX].word.rx;
_16bit_base_reg[2] = &gen_reg[BX_16BIT_REG_BP].word.rx;
_16bit_base_reg[3] = &gen_reg[BX_16BIT_REG_BP].word.rx;
_16bit_base_reg[4] = (Bit16u*) &empty_register;
_16bit_base_reg[5] = (Bit16u*) &empty_register;
_16bit_base_reg[6] = &gen_reg[BX_16BIT_REG_BP].word.rx;
_16bit_base_reg[7] = &gen_reg[BX_16BIT_REG_BX].word.rx;
// 16bit address mode index register, used for mod-rm decoding
_16bit_index_reg[0] = &gen_reg[BX_16BIT_REG_SI].word.rx;
_16bit_index_reg[1] = &gen_reg[BX_16BIT_REG_DI].word.rx;
_16bit_index_reg[2] = &gen_reg[BX_16BIT_REG_SI].word.rx;
_16bit_index_reg[3] = &gen_reg[BX_16BIT_REG_DI].word.rx;
_16bit_index_reg[4] = &gen_reg[BX_16BIT_REG_SI].word.rx;
_16bit_index_reg[5] = &gen_reg[BX_16BIT_REG_DI].word.rx;
_16bit_index_reg[6] = (Bit16u*) &empty_register;
_16bit_index_reg[7] = (Bit16u*) &empty_register;
// for decoding instructions: access to seg reg's via index number
sreg_mod00_rm16[0] = BX_SEG_REG_DS;
sreg_mod00_rm16[1] = BX_SEG_REG_DS;
sreg_mod00_rm16[2] = BX_SEG_REG_SS;
sreg_mod00_rm16[3] = BX_SEG_REG_SS;
sreg_mod00_rm16[4] = BX_SEG_REG_DS;
sreg_mod00_rm16[5] = BX_SEG_REG_DS;
sreg_mod00_rm16[6] = BX_SEG_REG_DS;
sreg_mod00_rm16[7] = BX_SEG_REG_DS;
sreg_mod01_rm16[0] = BX_SEG_REG_DS;
sreg_mod01_rm16[1] = BX_SEG_REG_DS;
sreg_mod01_rm16[2] = BX_SEG_REG_SS;
sreg_mod01_rm16[3] = BX_SEG_REG_SS;
sreg_mod01_rm16[4] = BX_SEG_REG_DS;
sreg_mod01_rm16[5] = BX_SEG_REG_DS;
sreg_mod01_rm16[6] = BX_SEG_REG_SS;
sreg_mod01_rm16[7] = BX_SEG_REG_DS;
sreg_mod10_rm16[0] = BX_SEG_REG_DS;
sreg_mod10_rm16[1] = BX_SEG_REG_DS;
sreg_mod10_rm16[2] = BX_SEG_REG_SS;
sreg_mod10_rm16[3] = BX_SEG_REG_SS;
sreg_mod10_rm16[4] = BX_SEG_REG_DS;
sreg_mod10_rm16[5] = BX_SEG_REG_DS;
sreg_mod10_rm16[6] = BX_SEG_REG_SS;
sreg_mod10_rm16[7] = BX_SEG_REG_DS;
// the default segment to use for a one-byte modrm with mod==01b
// and rm==i
//
sreg_mod01_rm32[0] = BX_SEG_REG_DS;
sreg_mod01_rm32[1] = BX_SEG_REG_DS;
sreg_mod01_rm32[2] = BX_SEG_REG_DS;
sreg_mod01_rm32[3] = BX_SEG_REG_DS;
sreg_mod01_rm32[4] = BX_SEG_REG_NULL;
// this entry should never be accessed
// (escape to 2-byte)
sreg_mod01_rm32[5] = BX_SEG_REG_SS;
sreg_mod01_rm32[6] = BX_SEG_REG_DS;
sreg_mod01_rm32[7] = BX_SEG_REG_DS;
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64
sreg_mod01_rm32[8] = BX_SEG_REG_DS;
sreg_mod01_rm32[9] = BX_SEG_REG_DS;
sreg_mod01_rm32[10] = BX_SEG_REG_DS;
sreg_mod01_rm32[11] = BX_SEG_REG_DS;
sreg_mod01_rm32[12] = BX_SEG_REG_DS;
sreg_mod01_rm32[13] = BX_SEG_REG_DS;
sreg_mod01_rm32[14] = BX_SEG_REG_DS;
sreg_mod01_rm32[15] = BX_SEG_REG_DS;
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
// the default segment to use for a one-byte modrm with mod==10b
// and rm==i
//
sreg_mod10_rm32[0] = BX_SEG_REG_DS;
sreg_mod10_rm32[1] = BX_SEG_REG_DS;
sreg_mod10_rm32[2] = BX_SEG_REG_DS;
sreg_mod10_rm32[3] = BX_SEG_REG_DS;
sreg_mod10_rm32[4] = BX_SEG_REG_NULL;
// this entry should never be accessed
// (escape to 2-byte)
sreg_mod10_rm32[5] = BX_SEG_REG_SS;
sreg_mod10_rm32[6] = BX_SEG_REG_DS;
sreg_mod10_rm32[7] = BX_SEG_REG_DS;
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64
sreg_mod10_rm32[8] = BX_SEG_REG_DS;
sreg_mod10_rm32[9] = BX_SEG_REG_DS;
sreg_mod10_rm32[10] = BX_SEG_REG_DS;
sreg_mod10_rm32[11] = BX_SEG_REG_DS;
sreg_mod10_rm32[12] = BX_SEG_REG_DS;
sreg_mod10_rm32[13] = BX_SEG_REG_DS;
sreg_mod10_rm32[14] = BX_SEG_REG_DS;
sreg_mod10_rm32[15] = BX_SEG_REG_DS;
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
// the default segment to use for a two-byte modrm with mod==00b
// and base==i
//
sreg_mod0_base32[0] = BX_SEG_REG_DS;
sreg_mod0_base32[1] = BX_SEG_REG_DS;
sreg_mod0_base32[2] = BX_SEG_REG_DS;
sreg_mod0_base32[3] = BX_SEG_REG_DS;
sreg_mod0_base32[4] = BX_SEG_REG_SS;
sreg_mod0_base32[5] = BX_SEG_REG_DS;
sreg_mod0_base32[6] = BX_SEG_REG_DS;
sreg_mod0_base32[7] = BX_SEG_REG_DS;
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64
sreg_mod0_base32[8] = BX_SEG_REG_DS;
sreg_mod0_base32[9] = BX_SEG_REG_DS;
sreg_mod0_base32[10] = BX_SEG_REG_DS;
sreg_mod0_base32[11] = BX_SEG_REG_DS;
sreg_mod0_base32[12] = BX_SEG_REG_DS;
sreg_mod0_base32[13] = BX_SEG_REG_DS;
sreg_mod0_base32[14] = BX_SEG_REG_DS;
sreg_mod0_base32[15] = BX_SEG_REG_DS;
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
// the default segment to use for a two-byte modrm with
// mod==01b or mod==10b and base==i
sreg_mod1or2_base32[0] = BX_SEG_REG_DS;
sreg_mod1or2_base32[1] = BX_SEG_REG_DS;
sreg_mod1or2_base32[2] = BX_SEG_REG_DS;
sreg_mod1or2_base32[3] = BX_SEG_REG_DS;
sreg_mod1or2_base32[4] = BX_SEG_REG_SS;
sreg_mod1or2_base32[5] = BX_SEG_REG_SS;
sreg_mod1or2_base32[6] = BX_SEG_REG_DS;
sreg_mod1or2_base32[7] = BX_SEG_REG_DS;
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64
sreg_mod1or2_base32[8] = BX_SEG_REG_DS;
sreg_mod1or2_base32[9] = BX_SEG_REG_DS;
sreg_mod1or2_base32[10] = BX_SEG_REG_DS;
sreg_mod1or2_base32[11] = BX_SEG_REG_DS;
sreg_mod1or2_base32[12] = BX_SEG_REG_DS;
sreg_mod1or2_base32[13] = BX_SEG_REG_DS;
sreg_mod1or2_base32[14] = BX_SEG_REG_DS;
#warning "KPL: The following was 14, I changed to 15. Typo?"
sreg_mod1or2_base32[15] = BX_SEG_REG_DS;
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
#if BX_DYNAMIC_TRANSLATION
DTWrite8vShim = NULL;
DTWrite16vShim = NULL;
DTWrite32vShim = NULL;
DTRead8vShim = NULL;
DTRead16vShim = NULL;
DTRead32vShim = NULL;
DTReadRMW8vShim = (BxDTShim_t) DTASReadRMW8vShim;
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_DEBUG(( "DTReadRMW8vShim is %x", (unsigned) DTReadRMW8vShim ));
BX_DEBUG(( "&DTReadRMW8vShim is %x", (unsigned) &DTReadRMW8vShim ));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
DTReadRMW16vShim = NULL;
DTReadRMW32vShim = NULL;
DTWriteRMW8vShim = (BxDTShim_t) DTASWriteRMW8vShim;
DTWriteRMW16vShim = NULL;
DTWriteRMW32vShim = NULL;
DTSetFlagsOSZAPCPtr = (BxDTShim_t) DTASSetFlagsOSZAPC;
DTIndBrHandler = (BxDTShim_t) DTASIndBrHandler;
DTDirBrHandler = (BxDTShim_t) DTASDirBrHandler;
#endif
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
mem = addrspace;
sprintf (name, "CPU %p", this);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
BX_INSTR_INIT();
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
#if BX_WITH_WX
// Register some of the CPUs variables as shadow parameters so that
// they can be visible in the config interface.
// (Experimental, obviously not a complete list)
bx_param_num_c *param;
const char *fmt16 = "%04X";
const char *fmt32 = "%08X";
Bit32u oldbase = bx_param_num_c::set_default_base (16);
const char *oldfmt = bx_param_num_c::set_default_format (fmt32);
bx_list_c *list = new bx_list_c (BXP_CPU_PARAMETERS, "CPU State", "", 60);
#define DEFPARAM_NORMAL(name,field) \
list->add (new bx_shadow_num_c (BXP_CPU_##name, #name, &(field)))
DEFPARAM_NORMAL (EAX, EAX);
DEFPARAM_NORMAL (EBX, EBX);
DEFPARAM_NORMAL (ECX, ECX);
DEFPARAM_NORMAL (EDX, EDX);
DEFPARAM_NORMAL (ESP, ESP);
DEFPARAM_NORMAL (EBP, EBP);
DEFPARAM_NORMAL (ESI, ESI);
DEFPARAM_NORMAL (EDI, EDI);
DEFPARAM_NORMAL (EIP, EIP);
DEFPARAM_NORMAL (DR0, dr0);
DEFPARAM_NORMAL (DR1, dr1);
DEFPARAM_NORMAL (DR2, dr2);
DEFPARAM_NORMAL (DR3, dr3);
DEFPARAM_NORMAL (DR6, dr6);
DEFPARAM_NORMAL (DR7, dr7);
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64==0
- add infrastructure for sending commands from the wxWindows interface to the Bochs debugger. The Bochs debugger calls SIM->debug_get_next_command() which does not return until a debugger command is found. The siminterface sends an synchronous event to the wxWindows thread with a blank to be filled in with a debugger command. wxWindows fills in the blank and sends the synchronous event back, and the Bochs debugger interprets it as if it was typed on the command line. For the long term I haven't decided whether to stick with sending text strings vs. some other method. - so far the wxWindows debugger consists of one big dialog box that shows all the standard registers, and a working Continue, Stop, and Step button. - modify ParamDialog so that it is more useful as a base class, by moving some things to protected members&fields, separating out functionality that is most likely to be replaced into virtual functions, and making it generally more flexible. The new CpuRegistersDialog is based on ParamDialog. - in wxdialog.cc, continue the convention of using wxID_HELP, wxID_OK, wxID_CANCEL, etc. for the id's of buttons, instead of wxHELP, wxOK, etc. which are intended to be ORred together in a bit field. - cpu/init.cc: put ifdefs around DEFPARAMs for flags in configurations where they don't exist. Add an eflags shadow parameter that represents all of the bits of eflags at once. There are also boolean shadow params for each bit. - modified files: cpu/init.cc debug/dbg_main.cc debug/debug.h gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
2002-09-13 23:39:38 +04:00
#if BX_CPU_LEVEL >= 2
DEFPARAM_NORMAL (CR0, cr0.val32);
DEFPARAM_NORMAL (CR1, cr1);
DEFPARAM_NORMAL (CR2, cr2);
DEFPARAM_NORMAL (CR3, cr3);
#endif
#if BX_CPU_LEVEL >= 4
DEFPARAM_NORMAL (CR4, cr4);
#endif
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#endif // #if BX_SUPPORT_X86_64==0
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
// segment registers require a handler function because they have
// special get/set requirements.
#define DEFPARAM_SEG_REG(x) \
list->add (param = new bx_param_num_c (BXP_CPU_SEG_##x, \
#x, "", 0, 0xffff, 0)); \
param->set_handler (cpu_param_handler); \
param->set_format (fmt16);
#define DEFPARAM_GLOBAL_SEG_REG(name,field) \
list->add (param = new bx_shadow_num_c (BXP_CPU_##name##_BASE, \
#name" base", \
& BX_CPU_THIS_PTR field.base)); \
list->add (param = new bx_shadow_num_c (BXP_CPU_##name##_LIMIT, \
#name" limit", \
& BX_CPU_THIS_PTR field.limit));
DEFPARAM_SEG_REG(CS);
DEFPARAM_SEG_REG(DS);
DEFPARAM_SEG_REG(SS);
DEFPARAM_SEG_REG(ES);
DEFPARAM_SEG_REG(FS);
DEFPARAM_SEG_REG(GS);
DEFPARAM_SEG_REG(LDTR);
DEFPARAM_SEG_REG(TR);
DEFPARAM_GLOBAL_SEG_REG(GDTR, gdtr);
DEFPARAM_GLOBAL_SEG_REG(IDTR, idtr);
#undef DEFPARAM_SEGREG
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64==0
list->add (param = new bx_shadow_num_c (BXP_CPU_EFLAGS, "EFLAGS",
&BX_CPU_THIS_PTR eflags.val32));
#endif
- add infrastructure for sending commands from the wxWindows interface to the Bochs debugger. The Bochs debugger calls SIM->debug_get_next_command() which does not return until a debugger command is found. The siminterface sends an synchronous event to the wxWindows thread with a blank to be filled in with a debugger command. wxWindows fills in the blank and sends the synchronous event back, and the Bochs debugger interprets it as if it was typed on the command line. For the long term I haven't decided whether to stick with sending text strings vs. some other method. - so far the wxWindows debugger consists of one big dialog box that shows all the standard registers, and a working Continue, Stop, and Step button. - modify ParamDialog so that it is more useful as a base class, by moving some things to protected members&fields, separating out functionality that is most likely to be replaced into virtual functions, and making it generally more flexible. The new CpuRegistersDialog is based on ParamDialog. - in wxdialog.cc, continue the convention of using wxID_HELP, wxID_OK, wxID_CANCEL, etc. for the id's of buttons, instead of wxHELP, wxOK, etc. which are intended to be ORred together in a bit field. - cpu/init.cc: put ifdefs around DEFPARAMs for flags in configurations where they don't exist. Add an eflags shadow parameter that represents all of the bits of eflags at once. There are also boolean shadow params for each bit. - modified files: cpu/init.cc debug/dbg_main.cc debug/debug.h gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
2002-09-13 23:39:38 +04:00
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
// flags implemented in lazy_flags.cc must be done with a handler
// that calls their get function, to force them to be computed.
#define DEFPARAM_EFLAG(name) \
list->add ( \
param = new bx_param_bool_c ( \
BXP_CPU_EFLAGS_##name, \
- this revision changes the way eflags are accessed throughout the cpu and cpu64 directories. Instead of using the macros introduced in cpu.h rev 1.37 such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline methods on the BX_CPU_C object that access the eflags fields. The problem with the macros is that they cannot be used outside the BX_CPU_C object. The macros have now been removed, and all references to eflags now use these new accessors. - I debated whether to put the accessors as members of the BX_CPU_C object or members of the bx_flags_reg_t struct. I chose to make them members of BX_CPU_C for two reasons: 1. the lazy flags are implemented as members of BX_CPU_C, and 2. the eflags are referenced in many many places and it is more compact without having to put eflags in front of each. (The real problem with compactness is having to write BX_CPU_THIS_PTR in front of everything, but that's another story.) - Kevin pointed out a major bug in my set accessor code. What a difference a little tilde can make! That is fixed now. - modified: load32bitOShack.cc debug/dbg_main.cc and in both cpu and cpu64 directories: cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc string.cc vm8086.cc
2002-09-12 22:10:46 +04:00
#name, "", get_##name())); \
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
param->set_handler (cpu_param_handler);
#define DEFPARAM_LAZY_EFLAG(name) \
list->add ( \
param = new bx_param_bool_c ( \
BXP_CPU_EFLAGS_##name, \
#name, "", get_##name())); \
param->set_handler (cpu_param_handler);
#if BX_CPU_LEVEL >= 4
DEFPARAM_EFLAG(ID);
//DEFPARAM_EFLAG(VIP);
//DEFPARAM_EFLAG(VIF);
DEFPARAM_EFLAG(AC);
#endif
#if BX_CPU_LEVEL >= 3
DEFPARAM_EFLAG(VM);
DEFPARAM_EFLAG(RF);
#endif
#if BX_CPU_LEVEL >= 2
DEFPARAM_EFLAG(NT);
// IOPL is a special case because it is 2 bits wide.
list->add (
param = new bx_shadow_num_c (
BXP_CPU_EFLAGS_IOPL,
"IOPL", "", 0, 3,
&eflags.val32,
12, 13));
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64==0
- add infrastructure for sending commands from the wxWindows interface to the Bochs debugger. The Bochs debugger calls SIM->debug_get_next_command() which does not return until a debugger command is found. The siminterface sends an synchronous event to the wxWindows thread with a blank to be filled in with a debugger command. wxWindows fills in the blank and sends the synchronous event back, and the Bochs debugger interprets it as if it was typed on the command line. For the long term I haven't decided whether to stick with sending text strings vs. some other method. - so far the wxWindows debugger consists of one big dialog box that shows all the standard registers, and a working Continue, Stop, and Step button. - modify ParamDialog so that it is more useful as a base class, by moving some things to protected members&fields, separating out functionality that is most likely to be replaced into virtual functions, and making it generally more flexible. The new CpuRegistersDialog is based on ParamDialog. - in wxdialog.cc, continue the convention of using wxID_HELP, wxID_OK, wxID_CANCEL, etc. for the id's of buttons, instead of wxHELP, wxOK, etc. which are intended to be ORred together in a bit field. - cpu/init.cc: put ifdefs around DEFPARAMs for flags in configurations where they don't exist. Add an eflags shadow parameter that represents all of the bits of eflags at once. There are also boolean shadow params for each bit. - modified files: cpu/init.cc debug/dbg_main.cc debug/debug.h gui/siminterface.cc gui/siminterface.h gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
2002-09-13 23:39:38 +04:00
param->set_format ("%d");
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#endif
- the debugger was broken by recent changes in the cpu flags. To provide a consistent way of accessing these flags that works both inside and outside the BX_CPU class, I added inline accessor methods for each flag: assert_FLAG(), clear_FLAG(), set_FLAG(value), and get_FLAG () that returns its value. I use assert to mean "set the value to one" to avoid confusion, since there's also a set method that takes a value. - the eflags access macros (e.g. GetEFlagsDFLogical, ClearEFlagsTF) are now defined in terms of the inline accessors. In most cases it will result in the same code anyway. The major advantage of the accesors is that they can be used from inside or outside the BX_CPU object, while the macros can only be used from inside. - since almost all eflags were stored in val32 now, I went ahead and removed the if_, rf, and vm fields. Now the val32 bit is the "official" value for these flags, and they have accessors just like everything else. - init.cc: move the registration of registers until after they have been initialized so that the initial value of each parameter is correct. Modified files: debug/dbg_main.cc cpu/cpu.h cpu/debugstuff.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc cpu/init.cc
2002-09-11 07:55:22 +04:00
#endif
DEFPARAM_LAZY_EFLAG(OF);
DEFPARAM_EFLAG(DF);
DEFPARAM_EFLAG(IF);
DEFPARAM_EFLAG(TF);
DEFPARAM_LAZY_EFLAG(SF);
DEFPARAM_LAZY_EFLAG(ZF);
DEFPARAM_LAZY_EFLAG(AF);
DEFPARAM_LAZY_EFLAG(PF);
DEFPARAM_LAZY_EFLAG(CF);
// restore defaults
bx_param_num_c::set_default_base (oldbase);
bx_param_num_c::set_default_format (oldfmt);
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
BX_CPU_C::~BX_CPU_C(void)
{
BX_INSTR_SHUTDOWN();
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_DEBUG(( "Exit."));
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}
void
BX_CPU_C::reset(unsigned source)
{
UNUSED(source); // either BX_RESET_HARDWARE or BX_RESET_SOFTWARE
// general registers
EAX = 0; // processor passed test :-)
EBX = 0; // undefined
ECX = 0; // undefined
EDX = (BX_DEVICE_ID << 8) | BX_STEPPING_ID; // ???
EBP = 0; // undefined
ESI = 0; // undefined
EDI = 0; // undefined
ESP = 0; // undefined
// all status flags at known values, use BX_CPU_THIS_PTR eflags structure
BX_CPU_THIS_PTR lf_flags_status = 0x000000;
// status and control flags register set
I rehashed the way the EFLAGS register was stored internally. All the EFLAGS bits used to be cached in separate fields. I left a few of them in separate fields for now - might remove them at some point also. When the arithmetic fields are known (ie they're not in lazy mode), they are all cached in a 32-bit EFLAGS image, just like the x86 EFLAGS register expects. All other eflags are store in the 32-bit register also, with a few also mirrored in separate fields for now. The reason I did this, was so that on x86 hosts, asm() statements can be #ifdef'd in to do the calculation and get the native eflags results very cheaply. Just to test that it works, I coded ADD_EdId() and ADD_EwIw() with some conditionally compiled asm()s for accelerated eflags processing and it works. -Kevin
2002-09-08 08:08:14 +04:00
BX_CPU_THIS_PTR eflags.val32 = 0x2; // Bit1 is always set
- this revision changes the way eflags are accessed throughout the cpu and cpu64 directories. Instead of using the macros introduced in cpu.h rev 1.37 such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline methods on the BX_CPU_C object that access the eflags fields. The problem with the macros is that they cannot be used outside the BX_CPU_C object. The macros have now been removed, and all references to eflags now use these new accessors. - I debated whether to put the accessors as members of the BX_CPU_C object or members of the bx_flags_reg_t struct. I chose to make them members of BX_CPU_C for two reasons: 1. the lazy flags are implemented as members of BX_CPU_C, and 2. the eflags are referenced in many many places and it is more compact without having to put eflags in front of each. (The real problem with compactness is having to write BX_CPU_THIS_PTR in front of everything, but that's another story.) - Kevin pointed out a major bug in my set accessor code. What a difference a little tilde can make! That is fixed now. - modified: load32bitOShack.cc debug/dbg_main.cc and in both cpu and cpu64 directories: cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc string.cc vm8086.cc
2002-09-12 22:10:46 +04:00
BX_CPU_THIS_PTR clear_IF ();
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#if BX_CPU_LEVEL >= 3
- this revision changes the way eflags are accessed throughout the cpu and cpu64 directories. Instead of using the macros introduced in cpu.h rev 1.37 such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline methods on the BX_CPU_C object that access the eflags fields. The problem with the macros is that they cannot be used outside the BX_CPU_C object. The macros have now been removed, and all references to eflags now use these new accessors. - I debated whether to put the accessors as members of the BX_CPU_C object or members of the bx_flags_reg_t struct. I chose to make them members of BX_CPU_C for two reasons: 1. the lazy flags are implemented as members of BX_CPU_C, and 2. the eflags are referenced in many many places and it is more compact without having to put eflags in front of each. (The real problem with compactness is having to write BX_CPU_THIS_PTR in front of everything, but that's another story.) - Kevin pointed out a major bug in my set accessor code. What a difference a little tilde can make! That is fixed now. - modified: load32bitOShack.cc debug/dbg_main.cc and in both cpu and cpu64 directories: cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc string.cc vm8086.cc
2002-09-12 22:10:46 +04:00
BX_CPU_THIS_PTR clear_RF ();
BX_CPU_THIS_PTR clear_VM ();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
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#endif
#if BX_CPU_LEVEL >= 4
- this revision changes the way eflags are accessed throughout the cpu and cpu64 directories. Instead of using the macros introduced in cpu.h rev 1.37 such as GetEFlagsDFLogical and SetEFlagsDF and ClearEFlagsDF, I made inline methods on the BX_CPU_C object that access the eflags fields. The problem with the macros is that they cannot be used outside the BX_CPU_C object. The macros have now been removed, and all references to eflags now use these new accessors. - I debated whether to put the accessors as members of the BX_CPU_C object or members of the bx_flags_reg_t struct. I chose to make them members of BX_CPU_C for two reasons: 1. the lazy flags are implemented as members of BX_CPU_C, and 2. the eflags are referenced in many many places and it is more compact without having to put eflags in front of each. (The real problem with compactness is having to write BX_CPU_THIS_PTR in front of everything, but that's another story.) - Kevin pointed out a major bug in my set accessor code. What a difference a little tilde can make! That is fixed now. - modified: load32bitOShack.cc debug/dbg_main.cc and in both cpu and cpu64 directories: cpu.cc cpu.h ctrl_xfer_pro.cc debugstuff.cc exception.cc flag_ctrl.cc flag_ctrl_pro.cc init.cc io.cc io_pro.cc proc_ctrl.cc soft_int.cc string.cc vm8086.cc
2002-09-12 22:10:46 +04:00
BX_CPU_THIS_PTR clear_AC ();
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#endif
BX_CPU_THIS_PTR inhibit_mask = 0;
BX_CPU_THIS_PTR debug_trap = 0;
/* instruction pointer */
#if BX_CPU_LEVEL < 2
BX_CPU_THIS_PTR prev_eip =
I merged the cpu/cpu.h and cpu64/cpu.h files as well as the other header files. There no longer are any *.h files in cpu64/. Had to make some changes to the *.cc files for dealing with accesses to eip.
2002-09-13 04:15:23 +04:00
EIP = 0x00000000;
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#else /* from 286 up */
BX_CPU_THIS_PTR prev_eip =
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64
RIP = 0x0000FFF0;
#else
EIP = 0x0000FFF0;
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#endif
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
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/* CS (Code Segment) and descriptor cache */
/* Note: on a real cpu, CS initially points to upper memory. After
* the 1st jump, the descriptor base is zero'd out. Since I'm just
* going to jump to my BIOS, I don't need to do this.
* For future reference:
* processor cs.selector cs.base cs.limit EIP
* 8086 FFFF FFFF0 FFFF 0000
* 286 F000 FF0000 FFFF FFF0
* 386+ F000 FFFF0000 FFFF FFF0
*/
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value = 0xf000;
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.index = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.ti = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.p = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.dpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.segment = 1; /* data/code segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.type = 3; /* read/write access */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.executable = 1; /* data/stack segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.c_ed = 0; /* normal expand up */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.r_w = 1; /* writeable */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.a = 1; /* accessed */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base = 0x000F0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled = 0xFFFF;
#endif
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.g = 0; /* byte granular */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b = 0; /* 16bit default size */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0;
#endif
/* SS (Stack Segment) and descriptor cache */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value = 0x0000;
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.index = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.ti = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.rpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.p = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.segment = 1; /* data/code segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.type = 3; /* read/write access */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.executable = 0; /* data/stack segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.c_ed = 0; /* normal expand up */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.r_w = 1; /* writeable */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.a = 1; /* accessed */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base = 0x00000000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled = 0xFFFF;
#endif
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.g = 0; /* byte granular */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b = 0; /* 16bit default size */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.avl = 0;
#endif
/* DS (Data Segment) and descriptor cache */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value = 0x0000;
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.index = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.ti = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.rpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.p = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.dpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.segment = 1; /* data/code segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.type = 3; /* read/write access */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.executable = 0; /* data/stack segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.c_ed = 0; /* normal expand up */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.r_w = 1; /* writeable */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.a = 1; /* accessed */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.base = 0x00000000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.limit = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.limit_scaled = 0xFFFF;
#endif
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.g = 0; /* byte granular */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.d_b = 0; /* 16bit default size */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.avl = 0;
#endif
/* ES (Extra Segment) and descriptor cache */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = 0x0000;
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.index = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.ti = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.rpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.p = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.dpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.segment = 1; /* data/code segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.type = 3; /* read/write access */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.executable = 0; /* data/stack segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.c_ed = 0; /* normal expand up */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.r_w = 1; /* writeable */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.a = 1; /* accessed */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.base = 0x00000000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.limit = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.limit_scaled = 0xFFFF;
#endif
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.g = 0; /* byte granular */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.d_b = 0; /* 16bit default size */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.avl = 0;
#endif
/* FS and descriptor cache */
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.index = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.ti = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.rpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.p = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.dpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.segment = 1; /* data/code segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.type = 3; /* read/write access */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.executable = 0; /* data/stack segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.c_ed = 0; /* normal expand up */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.r_w = 1; /* writeable */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.a = 1; /* accessed */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.base = 0x00000000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.limit = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.limit_scaled = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.g = 0; /* byte granular */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.d_b = 0; /* 16bit default size */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.avl = 0;
#endif
/* GS and descriptor cache */
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.index = 0x0000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.ti = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.rpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.p = 1;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.dpl = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.segment = 1; /* data/code segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.type = 3; /* read/write access */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.executable = 0; /* data/stack segment */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.c_ed = 0; /* normal expand up */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.r_w = 1; /* writeable */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.a = 1; /* accessed */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.base = 0x00000000;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.limit = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.limit_scaled = 0xFFFF;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.g = 0; /* byte granular */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.d_b = 0; /* 16bit default size */
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.avl = 0;
#endif
/* GDTR (Global Descriptor Table Register) */
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR gdtr.base = 0x00000000; /* undefined */
BX_CPU_THIS_PTR gdtr.limit = 0x0000; /* undefined */
/* ??? AR=Present, Read/Write */
#endif
/* IDTR (Interrupt Descriptor Table Register) */
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR idtr.base = 0x00000000;
BX_CPU_THIS_PTR idtr.limit = 0x03FF; /* always byte granular */ /* ??? */
/* ??? AR=Present, Read/Write */
#endif
/* LDTR (Local Descriptor Table Register) */
#if BX_CPU_LEVEL >= 2
BX_CPU_THIS_PTR ldtr.selector.value = 0x0000;
BX_CPU_THIS_PTR ldtr.selector.index = 0x0000;
BX_CPU_THIS_PTR ldtr.selector.ti = 0;
BX_CPU_THIS_PTR ldtr.selector.rpl = 0;
BX_CPU_THIS_PTR ldtr.cache.valid = 0; /* not valid */
BX_CPU_THIS_PTR ldtr.cache.p = 0; /* not present */
BX_CPU_THIS_PTR ldtr.cache.dpl = 0; /* field not used */
BX_CPU_THIS_PTR ldtr.cache.segment = 0; /* system segment */
BX_CPU_THIS_PTR ldtr.cache.type = 2; /* LDT descriptor */
BX_CPU_THIS_PTR ldtr.cache.u.ldt.base = 0x00000000;
BX_CPU_THIS_PTR ldtr.cache.u.ldt.limit = 0xFFFF;
#endif
/* TR (Task Register) */
#if BX_CPU_LEVEL >= 2
/* ??? I don't know what state the TR comes up in */
BX_CPU_THIS_PTR tr.selector.value = 0x0000;
BX_CPU_THIS_PTR tr.selector.index = 0x0000; /* undefined */
BX_CPU_THIS_PTR tr.selector.ti = 0;
BX_CPU_THIS_PTR tr.selector.rpl = 0;
BX_CPU_THIS_PTR tr.cache.valid = 0;
BX_CPU_THIS_PTR tr.cache.p = 0;
BX_CPU_THIS_PTR tr.cache.dpl = 0; /* field not used */
BX_CPU_THIS_PTR tr.cache.segment = 0;
BX_CPU_THIS_PTR tr.cache.type = 0; /* invalid */
BX_CPU_THIS_PTR tr.cache.u.tss286.base = 0x00000000; /* undefined */
BX_CPU_THIS_PTR tr.cache.u.tss286.limit = 0x0000; /* undefined */
#endif
// DR0 - DR7 (Debug Registers)
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR dr0 = 0; /* undefined */
BX_CPU_THIS_PTR dr1 = 0; /* undefined */
BX_CPU_THIS_PTR dr2 = 0; /* undefined */
BX_CPU_THIS_PTR dr3 = 0; /* undefined */
#endif
#if BX_CPU_LEVEL == 3
BX_CPU_THIS_PTR dr6 = 0xFFFF1FF0;
BX_CPU_THIS_PTR dr7 = 0x00000400;
#elif BX_CPU_LEVEL == 4
BX_CPU_THIS_PTR dr6 = 0xFFFF1FF0;
BX_CPU_THIS_PTR dr7 = 0x00000400;
#elif BX_CPU_LEVEL == 5
BX_CPU_THIS_PTR dr6 = 0xFFFF0FF0;
BX_CPU_THIS_PTR dr7 = 0x00000400;
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
#elif BX_CPU_LEVEL == 6
BX_CPU_THIS_PTR dr6 = 0xFFFF0FF0;
BX_CPU_THIS_PTR dr7 = 0x00000400;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
#else
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
# error "DR6,7: CPU > 6"
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
#endif
#if 0
/* test registers 3-7 (unimplemented) */
BX_CPU_THIS_PTR tr3 = 0; /* undefined */
BX_CPU_THIS_PTR tr4 = 0; /* undefined */
BX_CPU_THIS_PTR tr5 = 0; /* undefined */
BX_CPU_THIS_PTR tr6 = 0; /* undefined */
BX_CPU_THIS_PTR tr7 = 0; /* undefined */
#endif
#if BX_CPU_LEVEL >= 2
// MSW (Machine Status Word), so called on 286
// CR0 (Control Register 0), so called on 386+
BX_CPU_THIS_PTR cr0.ts = 0; // no task switch
BX_CPU_THIS_PTR cr0.em = 0; // emulate math coprocessor
BX_CPU_THIS_PTR cr0.mp = 0; // wait instructions not trapped
BX_CPU_THIS_PTR cr0.pe = 0; // real mode
BX_CPU_THIS_PTR cr0.val32 = 0;
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR cr0.pg = 0; // paging disabled
// no change to cr0.val32
#endif
#if BX_CPU_LEVEL >= 4
BX_CPU_THIS_PTR cr0.cd = 1; // caching disabled
BX_CPU_THIS_PTR cr0.nw = 1; // not write-through
BX_CPU_THIS_PTR cr0.am = 0; // disable alignment check
BX_CPU_THIS_PTR cr0.wp = 0; // disable write-protect
BX_CPU_THIS_PTR cr0.ne = 0; // ndp exceptions through int 13H, DOS compat
BX_CPU_THIS_PTR cr0.val32 |= 0x60000000;
#endif
// handle reserved bits
#if BX_CPU_LEVEL == 3
// reserved bits all set to 1 on 386
BX_CPU_THIS_PTR cr0.val32 |= 0x7ffffff0;
#elif BX_CPU_LEVEL >= 4
// bit 4 is hardwired to 1 on all x86
BX_CPU_THIS_PTR cr0.val32 |= 0x00000010;
#endif
#endif // CPU >= 2
#if BX_CPU_LEVEL >= 3
BX_CPU_THIS_PTR cr2 = 0;
BX_CPU_THIS_PTR cr3 = 0;
#endif
#if BX_CPU_LEVEL >= 4
Updated CR4 to use the patented Bryce bitfields accessor method for both cpu32 and cpu64, to make upcoming merging easier, and the code cleaner. Compiled for debug as well, and fixed CR4 for that also.
2002-09-14 23:21:41 +04:00
BX_CPU_THIS_PTR cr4.setRegister(0);
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#endif
#if BX_SUPPORT_X86_64
BX_CPU_THIS_PTR cpu_mode = BX_MODE_IA32;
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
- check in Zwane Mwaikambo's MSR patch: patch.msr.
2002-03-27 19:04:05 +03:00
/* initialise MSR registers to defaults */
#if BX_CPU_LEVEL >= 5
/* APIC Address, APIC enabled and BSP is default, we'll fill in the rest later */
BX_CPU_THIS_PTR msr.apicbase = (APIC_BASE_ADDR << 12) + 0x900;
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
#if BX_SUPPORT_X86_64
BX_CPU_THIS_PTR msr.lme = BX_CPU_THIS_PTR msr.lma = 0;
#endif
- check in Zwane Mwaikambo's MSR patch: patch.msr.
2002-03-27 19:04:05 +03:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
BX_CPU_THIS_PTR EXT = 0;
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
//BX_INTR = 0;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
- apply patch "patch.ifdef-paging-tlb"
2001-08-10 22:42:24 +04:00
#if BX_SUPPORT_PAGING
#if BX_USE_TLB
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
TLB_init();
- apply patch "patch.ifdef-paging-tlb"
2001-08-10 22:42:24 +04:00
#endif // BX_USE_TLB
#endif // BX_SUPPORT_PAGING
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
There's a bug in the repeated IO & mem copy speedups. I added --enable-repeat-speedups with default to disabled. Reconfigure/recompile and the speedup code will be #ifdef'd out for now. It manifested as junk written to the VGA screen while booting/running Windows. Also made some more mods to the main cpu loop. Moved the handling of EXT/errorno outside the main loop, much like the extra EIP/ESP commits were moved, for a little better performance. I changed the fetch_ptr/bytesleft method of fetching to a slightly different model, which calculates a window for which EIP will be valid (land on the current page), and a bias which when applied to EIP will be from 0..upper_page_limit. Speed is about the same for either method, but a pseudo-op/threaded-interpreter will plug in better with this and be faster.
2002-09-02 22:44:35 +04:00
BX_CPU_THIS_PTR eipPageBias = 0;
BX_CPU_THIS_PTR eipPageWindowSize = 0;
BX_CPU_THIS_PTR eipFetchPtr = NULL;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
#if BX_DEBUGGER
#ifdef MAGIC_BREAKPOINT
BX_CPU_THIS_PTR magic_break = 0;
#endif
BX_CPU_THIS_PTR stop_reason = STOP_NO_REASON;
BX_CPU_THIS_PTR trace = 0;
#endif
// Init the Floating Point Unit
fpu_init();
#if BX_DYNAMIC_TRANSLATION
dynamic_init();
#endif
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
#if (BX_SMP_PROCESSORS > 1)
// notice if I'm the bootstrap processor. If not, do the equivalent of
// a HALT instruction.
int apic_id = local_apic.get_id ();
if (BX_BOOTSTRAP_PROCESSOR == apic_id)
{
// boot normally
- check in Zwane Mwaikambo's MSR patch: patch.msr.
2002-03-27 19:04:05 +03:00
BX_CPU_THIS_PTR bsp = 1;
BX_CPU_THIS_PTR msr.apicbase |= 0x0100; /* set bit 8 BSP */
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_INFO(("CPU[%d] is the bootstrap processor", apic_id));
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
} else {
// it's an application processor, halt until IPI is heard.
- check in Zwane Mwaikambo's MSR patch: patch.msr.
2002-03-27 19:04:05 +03:00
BX_CPU_THIS_PTR bsp = 0;
BX_CPU_THIS_PTR msr.apicbase &= ~0x0100; /* clear bit 8 BSP */
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_INFO(("CPU[%d] is an application processor. Halting until IPI.", apic_id));
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
debug_trap |= 0x80000000;
async_event = 1;
}
- bug fix from Peter Tattam that he describes as follows: > This is the bug fix to make the reset button work properly when the cpu > is in the halt state. There is another patch in init.cc as well to clear > async_event. If you don't do this, if a cpu goes into HLT, the only thing > which will fix it is another interrupt. The reset button won't work.
2002-09-12 10:29:13 +04:00
#else
BX_CPU_THIS_PTR async_event = 0;
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
BX_CPU_C::sanity_checks(void)
{
Bit8u al, cl, dl, bl, ah, ch, dh, bh;
Bit16u ax, cx, dx, bx, sp, bp, si, di;
Bit32u eax, ecx, edx, ebx, esp, ebp, esi, edi;
EAX = 0xFFEEDDCC;
ECX = 0xBBAA9988;
EDX = 0x77665544;
EBX = 0x332211FF;
ESP = 0xEEDDCCBB;
EBP = 0xAA998877;
ESI = 0x66554433;
EDI = 0x2211FFEE;
al = AL;
cl = CL;
dl = DL;
bl = BL;
ah = AH;
ch = CH;
dh = DH;
bh = BH;
if ( al != (EAX & 0xFF) ||
cl != (ECX & 0xFF) ||
dl != (EDX & 0xFF) ||
bl != (EBX & 0xFF) ||
ah != ((EAX >> 8) & 0xFF) ||
ch != ((ECX >> 8) & 0xFF) ||
dh != ((EDX >> 8) & 0xFF) ||
bh != ((EBX >> 8) & 0xFF) ) {
(cpu64) Merged init.cc.
2002-09-14 04:51:46 +04:00
BX_PANIC(("problems using BX_READ_8BIT_REGx()!"));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
ax = AX;
cx = CX;
dx = DX;
bx = BX;
sp = SP;
bp = BP;
si = SI;
di = DI;
if ( ax != (EAX & 0xFFFF) ||
cx != (ECX & 0xFFFF) ||
dx != (EDX & 0xFFFF) ||
bx != (EBX & 0xFFFF) ||
sp != (ESP & 0xFFFF) ||
bp != (EBP & 0xFFFF) ||
si != (ESI & 0xFFFF) ||
di != (EDI & 0xFFFF) ) {
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_PANIC(("problems using BX_READ_16BIT_REG()!"));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
eax = EAX;
ecx = ECX;
edx = EDX;
ebx = EBX;
esp = ESP;
ebp = EBP;
esi = ESI;
edi = EDI;
if (sizeof(Bit8u) != 1 || sizeof(Bit8s) != 1)
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_PANIC(("data type Bit8u or Bit8s is not of length 1 byte!"));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
if (sizeof(Bit16u) != 2 || sizeof(Bit16s) != 2)
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_PANIC(("data type Bit16u or Bit16s is not of length 2 bytes!"));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
if (sizeof(Bit32u) != 4 || sizeof(Bit32s) != 4)
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_PANIC(("data type Bit32u or Bit32s is not of length 4 bytes!"));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC} don't need it, moved the output of it into the general io functions. saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 22:56:02 +04:00
BX_DEBUG(( "#(%u)all sanity checks passed!", BX_SIM_ID ));
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
BX_CPU_C::set_INTR(Boolean value)
{
- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.
2001-05-23 12:16:07 +04:00
BX_CPU_THIS_PTR INTR = value;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
BX_CPU_THIS_PTR async_event = 1;
}
Reference in New Issue Copy Permalink