.. |
a12c.c
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bzero -> memset
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2001-07-12 23:25:39 +00:00 |
a12c_bus_mem.c
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…
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a12c_dma.c
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…
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a12c_pci.c
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…
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a12creg.h
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…
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a12cvar.h
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…
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agp_machdep.c
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Add AGP support (oops, forgot to commit this file with the last batch).
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2001-09-16 02:09:47 +00:00 |
apecs.c
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…
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apecs_bus_io.c
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…
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apecs_bus_mem.c
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…
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apecs_dma.c
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APECS has a 256 byte DMA prefetch threshold.
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2001-07-19 18:39:29 +00:00 |
apecs_pci.c
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…
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apecsreg.h
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…
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apecsvar.h
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…
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cia.c
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…
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cia_bwx_bus_io.c
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…
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cia_bwx_bus_mem.c
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…
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cia_dma.c
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ALCOR/ALCOR2/PYXIS have a 256-byte DMA prefetch threshold.
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2001-07-19 18:42:42 +00:00 |
cia_pci.c
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…
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cia_swiz_bus_io.c
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…
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cia_swiz_bus_mem.c
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…
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ciareg.h
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…
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ciavar.h
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…
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dwlpx.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
dwlpx_bus_io.c
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…
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dwlpx_bus_mem.c
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…
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dwlpx_dma.c
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DWLPx has a 256-byte DMA prefetch threshold.
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2001-07-19 18:59:41 +00:00 |
dwlpx_pci.c
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…
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dwlpxreg.h
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…
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dwlpxvar.h
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
irongate.c
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Don't forget to fill in the DMA tag when attaching the AGP
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2001-10-06 02:51:42 +00:00 |
irongate_bus_io.c
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…
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irongate_bus_mem.c
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…
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irongate_dma.c
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…
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irongate_pci.c
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Only filter out the PCI_ID_REG in irongate_conf_read().
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2001-09-15 04:31:40 +00:00 |
irongatereg.h
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…
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irongatevar.h
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…
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lca.c
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…
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lca_bus_io.c
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…
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lca_bus_mem.c
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…
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lca_dma.c
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The LCA isn't supposed to have a DMA prefetch threshold, but experience
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2001-07-19 18:47:38 +00:00 |
lca_pci.c
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…
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lcareg.h
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…
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lcavar.h
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…
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mcpcia.c
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Determine the size of the B-Cache earier, and initialize the
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2001-05-02 01:24:29 +00:00 |
mcpcia_bus_io.c
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…
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mcpcia_bus_mem.c
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…
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mcpcia_dma.c
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MCPCIA has a 256 byte DMA prefetch threshold.
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2001-07-19 18:55:40 +00:00 |
mcpcia_pci.c
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…
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mcpciareg.h
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…
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mcpciavar.h
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…
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pci_550.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_550.h
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…
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pci_1000.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_1000.h
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…
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pci_1000a.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_1000a.h
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…
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pci_2100_a50.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_2100_a50.h
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…
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pci_2100_a500.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_2100_a500.h
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…
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pci_6600.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_6600.h
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…
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pci_a12.c
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…
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pci_a12.h
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…
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pci_alphabook1.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_alphabook1.h
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…
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pci_axppci_33.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_axppci_33.h
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…
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pci_bwx_bus_io_chipdep.c
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Typos, pointed out by Luke Mewburn (gee, I guess I built a kernel
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2001-09-04 16:14:49 +00:00 |
pci_bwx_bus_mem_chipdep.c
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BWX-addressable space is aways linear, so always allow BUS_SPACE_MAP_LINEAR
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2001-09-16 03:50:01 +00:00 |
pci_eb64plus.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_eb64plus.h
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…
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pci_eb64plus_intr.s
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…
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pci_eb66.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_eb66.h
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…
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pci_eb66_intr.s
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…
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pci_eb164.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_eb164.h
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…
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pci_eb164_intr.s
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…
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pci_kn8ae.c
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Fixed the one minor buglet that kept 8200s from working
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2001-08-13 23:36:30 +00:00 |
pci_kn8ae.h
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…
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pci_kn20aa.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_kn20aa.h
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…
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pci_kn300.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_kn300.h
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…
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pci_machdep.c
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So, the PowerStorm 4d20 a.k.a. 32bit TGA2 w/ IBM RGB561 RAMDAC was causing
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2001-07-16 00:55:16 +00:00 |
pci_sgmap_pte32.c
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Add support for mbufs to the Alpha SGMAP DMA maps.
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2001-07-19 06:40:01 +00:00 |
pci_sgmap_pte32.h
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…
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pci_sgmap_pte64.c
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Add support for mbufs to the Alpha SGMAP DMA maps.
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2001-07-19 06:40:01 +00:00 |
pci_sgmap_pte64.h
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…
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pci_swiz_bus_io_chipdep.c
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Implement bus_space_mmap().
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2001-09-04 05:31:27 +00:00 |
pci_swiz_bus_mem_chipdep.c
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Implement bus_space_mmap().
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2001-09-04 05:31:27 +00:00 |
pci_up1000.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
pci_up1000.h
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…
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pciide_machdep.c
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…
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sio.c
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…
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sio_pic.c
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |
sioreg.h
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…
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siovar.h
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…
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tsc.c
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bzero -> memset
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2001-07-12 23:25:39 +00:00 |
tsp_bus_io.c
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…
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tsp_bus_mem.c
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…
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tsp_dma.c
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Take a guess and initialize the prefetch threshold to 256 bytes. Haven't
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2001-07-19 19:09:22 +00:00 |
tsp_pci.c
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…
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tsreg.h
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Fix typo. s/extention/extension/
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2001-07-05 08:38:24 +00:00 |
tsvar.h
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…
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ttwoga.c
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…
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ttwoga_bus_io.c
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…
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ttwoga_bus_mem.c
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…
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ttwoga_dma.c
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The T2 has a 256 byte DMA prefetch threshold.
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2001-07-19 18:50:25 +00:00 |
ttwoga_pci.c
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…
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ttwogareg.h
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…
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ttwogavar.h
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Rework the interrupt code, shaving some cycles off in the process.
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2001-07-27 00:25:18 +00:00 |