NetBSD/sys/arch/alpha/pci
thorpej 6a434bacd5 Don't forget to fill in the DMA tag when attaching the AGP
controller.
2001-10-06 02:51:42 +00:00
..
a12c.c bzero -> memset 2001-07-12 23:25:39 +00:00
a12c_bus_mem.c
a12c_dma.c
a12c_pci.c
a12creg.h
a12cvar.h
agp_machdep.c Add AGP support (oops, forgot to commit this file with the last batch). 2001-09-16 02:09:47 +00:00
apecs.c
apecs_bus_io.c
apecs_bus_mem.c
apecs_dma.c APECS has a 256 byte DMA prefetch threshold. 2001-07-19 18:39:29 +00:00
apecs_pci.c
apecsreg.h
apecsvar.h
cia.c
cia_bwx_bus_io.c
cia_bwx_bus_mem.c
cia_dma.c ALCOR/ALCOR2/PYXIS have a 256-byte DMA prefetch threshold. 2001-07-19 18:42:42 +00:00
cia_pci.c
cia_swiz_bus_io.c
cia_swiz_bus_mem.c
ciareg.h
ciavar.h
dwlpx.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
dwlpx_bus_io.c
dwlpx_bus_mem.c
dwlpx_dma.c DWLPx has a 256-byte DMA prefetch threshold. 2001-07-19 18:59:41 +00:00
dwlpx_pci.c
dwlpxreg.h
dwlpxvar.h Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
irongate.c Don't forget to fill in the DMA tag when attaching the AGP 2001-10-06 02:51:42 +00:00
irongate_bus_io.c
irongate_bus_mem.c
irongate_dma.c
irongate_pci.c Only filter out the PCI_ID_REG in irongate_conf_read(). 2001-09-15 04:31:40 +00:00
irongatereg.h
irongatevar.h
lca.c
lca_bus_io.c
lca_bus_mem.c
lca_dma.c The LCA isn't supposed to have a DMA prefetch threshold, but experience 2001-07-19 18:47:38 +00:00
lca_pci.c
lcareg.h
lcavar.h
mcpcia.c Determine the size of the B-Cache earier, and initialize the 2001-05-02 01:24:29 +00:00
mcpcia_bus_io.c
mcpcia_bus_mem.c
mcpcia_dma.c MCPCIA has a 256 byte DMA prefetch threshold. 2001-07-19 18:55:40 +00:00
mcpcia_pci.c
mcpciareg.h
mcpciavar.h
pci_550.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_550.h
pci_1000.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_1000.h
pci_1000a.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_1000a.h
pci_2100_a50.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_2100_a50.h
pci_2100_a500.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_2100_a500.h
pci_6600.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_6600.h
pci_a12.c
pci_a12.h
pci_alphabook1.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_alphabook1.h
pci_axppci_33.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_axppci_33.h
pci_bwx_bus_io_chipdep.c Typos, pointed out by Luke Mewburn (gee, I guess I built a kernel 2001-09-04 16:14:49 +00:00
pci_bwx_bus_mem_chipdep.c BWX-addressable space is aways linear, so always allow BUS_SPACE_MAP_LINEAR 2001-09-16 03:50:01 +00:00
pci_eb64plus.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_eb64plus.h
pci_eb64plus_intr.s
pci_eb66.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_eb66.h
pci_eb66_intr.s
pci_eb164.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_eb164.h
pci_eb164_intr.s
pci_kn8ae.c Fixed the one minor buglet that kept 8200s from working 2001-08-13 23:36:30 +00:00
pci_kn8ae.h
pci_kn20aa.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_kn20aa.h
pci_kn300.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_kn300.h
pci_machdep.c So, the PowerStorm 4d20 a.k.a. 32bit TGA2 w/ IBM RGB561 RAMDAC was causing 2001-07-16 00:55:16 +00:00
pci_sgmap_pte32.c Add support for mbufs to the Alpha SGMAP DMA maps. 2001-07-19 06:40:01 +00:00
pci_sgmap_pte32.h
pci_sgmap_pte64.c Add support for mbufs to the Alpha SGMAP DMA maps. 2001-07-19 06:40:01 +00:00
pci_sgmap_pte64.h
pci_swiz_bus_io_chipdep.c Implement bus_space_mmap(). 2001-09-04 05:31:27 +00:00
pci_swiz_bus_mem_chipdep.c Implement bus_space_mmap(). 2001-09-04 05:31:27 +00:00
pci_up1000.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
pci_up1000.h
pciide_machdep.c
sio.c
sio_pic.c Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00
sioreg.h
siovar.h
tsc.c bzero -> memset 2001-07-12 23:25:39 +00:00
tsp_bus_io.c
tsp_bus_mem.c
tsp_dma.c Take a guess and initialize the prefetch threshold to 256 bytes. Haven't 2001-07-19 19:09:22 +00:00
tsp_pci.c
tsreg.h Fix typo. s/extention/extension/ 2001-07-05 08:38:24 +00:00
tsvar.h
ttwoga.c
ttwoga_bus_io.c
ttwoga_bus_mem.c
ttwoga_dma.c The T2 has a 256 byte DMA prefetch threshold. 2001-07-19 18:50:25 +00:00
ttwoga_pci.c
ttwogareg.h
ttwogavar.h Rework the interrupt code, shaving some cycles off in the process. 2001-07-27 00:25:18 +00:00