NetBSD/sys/arch/arm/arm32
scw 52c15bbd20 Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop
instead.

With this change, we no longer need to save the current interrupt level
in the switchframe. This is no great loss since both cpu_switch and
cpu_switchto are always called at splsched, so the process' spl is
effectively saved somewhere in the callstack.

This fixes an evbarm problem reported by Allen Briggs:

        lwp gets into sa_switch -> mi_switch with newl != NULL
            when it's the last element on the runqueue, so it
            hits the second bit of:
                if (newl == NULL) {
                        retval = cpu_switch(l, NULL);
                } else {
                        remrunqueue(newl);
                        cpu_switchto(l, newl);
                        retval = 0;
                }

        mi_switch calls remrunqueue() and cpu_switchto()

        cpu_switchto unlocks the sched lock
        cpu_switchto drops CPU priority
        softclock is received
        schedcpu is called from softclock
        schedcpu hits the first if () {} block here:
                if (l->l_priority >= PUSER) {
                        if (l->l_stat == LSRUN &&
                            (l->l_flag & L_INMEM) &&
                            (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) {
                                remrunqueue(l);
                                l->l_priority = l->l_usrpri;
                                setrunqueue(l);
                        } else
                                l->l_priority = l->l_usrpri;
                }

        Since mi_switch has already run remrunqueue, the LWP has been
            removed, but it's not been put back on any queue, so the
            remrunqueue panics.
2003-10-23 08:59:10 +00:00
..
arm32_machdep.c Change some type-punning detected by gcc 3.3.1 to (void *). 2003-09-21 00:26:09 +00:00
atomic.S non-inline version of atomic_{set,clear}_bit(), defined when 2002-10-19 12:46:57 +00:00
bcopy_page.S Xscale-optimised b{copy,zero}_page(). 2003-10-13 21:03:13 +00:00
bus_dma.c Make sure _ARM32_BUS_DMA_PRIVATE is defined before we pull in any 2003-09-06 09:46:37 +00:00
cpu.c Support for ARM10E class devices. 2003-09-06 09:42:12 +00:00
cpuswitch.S Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop 2003-10-23 08:59:10 +00:00
db_interface.c make it "static long nil;" as it's used as &nil in an array wanting long *'s. 2003-08-25 04:51:10 +00:00
db_machdep.c __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
exception.S interrupt with two rs. 2003-01-06 13:04:54 +00:00
fault.c Remove the #ifdef __XSCALE__ around the strd test as the instruction 2003-10-15 14:07:03 +00:00
fusu.S Instead of "add rd, pc, #foo - . - 8", use either "adr rd, foo" or (where 2002-10-13 14:54:47 +00:00
genassym.cf Hand-optimised in_cksum/in4_cksum for ARM and XSCALE. 2003-09-11 18:54:31 +00:00
intr.c __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
irq_dispatch.S Fiddle with current_intr_depth in assembly code again. Because we 2003-01-03 00:38:16 +00:00
kgdb_machdep.c __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
locore.S Reinstate one change from rev. 1.12, but differently. Preload r2 with 2003-04-20 16:21:40 +00:00
mem.c switch ARM to use same minor for /dev/zero as other archs 2003-10-16 12:02:58 +00:00
pmap.c On Xscale, define PMAP_UAREA() and use it to tweak uarea mappings so 2003-10-13 20:50:34 +00:00
setcpsr.S * Use local label names (.Lfoo vs. (Lfoo or foo)) 2002-08-15 01:37:01 +00:00
setstack.S * Use local label names (.Lfoo vs. (Lfoo or foo)) 2002-08-15 01:37:01 +00:00
spl.S More local label fixups. 2002-08-17 16:36:31 +00:00
stubs.c __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
sys_machdep.c __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
vm_machdep.c Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop 2003-10-23 08:59:10 +00:00