f82647e665
Don't assume TLB1[0] has the mapping for VA/PA 0. Make sure the TLB1 entries that map physical memory have the M (memory coherent) bit set. |
||
---|---|---|
.. | ||
booke | ||
conf | ||
fpu | ||
ibm4xx | ||
include | ||
isa | ||
marvell | ||
oea | ||
pci | ||
pic | ||
powerpc | ||
stand | ||
tools/chrpicon | ||
Makefile | ||
Makefile.inc |