NetBSD/sys/arch/evbmips/alchemy
tsutsui 44e83481b7 Defer _spl0() or _splnone() calls (which enable hardware interrupts)
from cpu_configure(9) to cpu_initclocks(9) on mips ports which use
mips3_clockintr.c:mips3_clockintr() (i.e. CPU INT5 clock) to avoid
hardclock(9) before softclock interrupt is initialized in initclocks().
This should be harmless because initclocks() is a part of configure()
in these days and there is no MI function which expects hardware
interrupts between cpu_configure(9) and cpu_initclocks(9).

Disccussed on tech-kern and port-mips.
2006-11-17 21:01:03 +00:00
..
autoconf.c Defer _spl0() or _splnone() calls (which enable hardware interrupts) 2006-11-17 21:01:03 +00:00
board.h Add the final glue bits required to enable the SPI interface on the 2006-10-02 08:13:53 +00:00
cpu.c
dbau1500.c
dbau1500reg.h
dbau1550.c Add the final glue bits required to enable the SPI interface on the 2006-10-02 08:13:53 +00:00
dbau1550reg.h Add the final glue bits required to enable the SPI interface on the 2006-10-02 08:13:53 +00:00
genericbd.c
mach_intr.c
machdep.c Add the final glue bits required to enable the SPI interface on the 2006-10-02 08:13:53 +00:00
mainbus.c
mtx-1.c
obio.c
obiovar.h
omsal400.c
omsal400reg.h
pb1000reg.h
pciide_machdep.c