Defer _spl0() or _splnone() calls (which enable hardware interrupts)
from cpu_configure(9) to cpu_initclocks(9) on mips ports which use mips3_clockintr.c:mips3_clockintr() (i.e. CPU INT5 clock) to avoid hardclock(9) before softclock interrupt is initialized in initclocks(). This should be harmless because initclocks() is a part of configure() in these days and there is no MI function which expects hardware interrupts between cpu_configure(9) and cpu_initclocks(9). Disccussed on tech-kern and port-mips.
This commit is contained in:
parent
8bf1f71b17
commit
44e83481b7
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.14 2006/05/05 18:04:41 thorpej Exp $ */
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/* $NetBSD: autoconf.c,v 1.15 2006/11/17 21:01:03 tsutsui Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.14 2006/05/05 18:04:41 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.15 2006/11/17 21:01:03 tsutsui Exp $");
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#include "opt_algor_p4032.h"
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#include "opt_algor_p5064.h"
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@ -71,7 +71,13 @@ cpu_configure(void)
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(void) splhigh();
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if (config_rootfound("mainbus", NULL) == 0)
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panic("no mainbus found");
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(void) spl0();
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/*
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* Hardware interrupts will be enabled in
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* sys/arch/mips/mips/mips3_clockintr.c:mips3_initclocks()
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* to avoid hardclock(9) by CPU INT5 before softclockintr is
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* initialized in initclocks().
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*/
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}
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.23 2006/09/10 06:41:09 tsutsui Exp $ */
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/* $NetBSD: autoconf.c,v 1.24 2006/11/17 21:01:03 tsutsui Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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@ -26,7 +26,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.23 2006/09/10 06:41:09 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.24 2006/11/17 21:01:03 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -55,8 +55,12 @@ cpu_configure(void)
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if (config_rootfound("mainbus", NULL) == NULL)
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panic("no mainbus found");
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/* enable all interrupts */
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_splnone();
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/*
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* Hardware interrupts will be enabled in
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* sys/arch/mips/mips/mips3_clockintr.c:mips3_initclocks()
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* to avoid hardclock(9) by CPU INT5 before softclockintr is
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* initialized in initclocks().
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*/
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}
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.12 2006/05/05 18:04:41 thorpej Exp $ */
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/* $NetBSD: autoconf.c,v 1.13 2006/11/17 21:01:03 tsutsui Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.12 2006/05/05 18:04:41 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.13 2006/11/17 21:01:03 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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(void)splhigh();
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if (config_rootfound("mainbus", NULL) == NULL)
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panic("no mainbus found");
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(void)spl0();
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/*
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* Hardware interrupts will be enabled in
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* sys/arch/mips/mips/mips3_clockintr.c:mips3_initclocks()
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* to avoid hardclock(9) by CPU INT5 before softclockintr is
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* initialized in initclocks().
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*/
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}
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.6 2006/09/04 05:17:26 gdamore Exp $ */
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/* $NetBSD: autoconf.c,v 1.7 2006/11/17 21:01:03 tsutsui Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.6 2006/09/04 05:17:26 gdamore Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.7 2006/11/17 21:01:03 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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(void)splhigh();
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if (config_rootfound("mainbus", NULL) == NULL)
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panic("no mainbus found");
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(void)spl0();
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/*
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* Hardware interrupts will be enabled in
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* sys/arch/mips/mips/mips3_clockintr.c:mips3_initclocks()
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* to avoid hardclock(9) by CPU INT5 before softclockintr is
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* initialized in initclocks().
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*/
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}
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.9 2006/02/26 05:24:52 thorpej Exp $ */
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/* $NetBSD: autoconf.c,v 1.10 2006/11/17 21:01:03 tsutsui Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -36,7 +36,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.9 2006/02/26 05:24:52 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.10 2006/11/17 21:01:03 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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(void)splhigh();
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if (config_rootfound("mainbus", NULL) == NULL)
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panic("no mainbus found");
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(void)spl0();
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/*
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* Hardware interrupts will be enabled in
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* sys/arch/mips/mips/mips3_clockintr.c:mips3_initclocks()
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* to avoid hardclock(9) by CPU INT5 before softclockintr is
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* initialized in initclocks().
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*/
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}
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void
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/* $NetBSD: mips3_clockintr.c,v 1.2 2006/09/10 14:27:38 tsutsui Exp $ */
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/* $NetBSD: mips3_clockintr.c,v 1.3 2006/11/17 21:01:03 tsutsui Exp $ */
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/*
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* Copyright (c) 1992, 1993
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mips3_clockintr.c,v 1.2 2006/09/10 14:27:38 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mips3_clockintr.c,v 1.3 2006/11/17 21:01:03 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#ifdef __HAVE_TIMECOUNTER
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mips3_init_tc();
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#endif
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/*
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* Now we can enable all interrupts including hardclock(9)
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* by CPU INT5.
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*/
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_splnone();
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}
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.31 2006/07/10 16:28:44 thorpej Exp $ */
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/* $NetBSD: autoconf.c,v 1.32 2006/11/17 21:01:03 tsutsui Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.31 2006/07/10 16:28:44 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.32 2006/11/17 21:01:03 tsutsui Exp $");
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#include "opt_ddb.h"
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splmasks[IPL_BIO] >> 8, splmasks[IPL_NET] >> 8,
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splmasks[IPL_TTY] >> 8, splmasks[IPL_CLOCK] >> 8);
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_splnone();
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/*
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* Hardware interrupts will be enabled in cpu_initclocks(9)
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* to avoid hardclock(9) by CPU INT5 before softclockintr is
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* initialized in initclocks().
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*/
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}
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/*
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/* $NetBSD: clock.c,v 1.18 2006/09/16 08:50:27 gdamore Exp $ */
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/* $NetBSD: clock.c,v 1.19 2006/11/17 21:01:03 tsutsui Exp $ */
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/*
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* Copyright (c) 1992, 1993
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.18 2006/09/16 08:50:27 gdamore Exp $");
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__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.19 2006/11/17 21:01:03 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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cpu_initclocks()
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{
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switch (mach_type) {
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#if defined(MIPS1)
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case MACH_SGI_IP12:
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/* enable hardware interrupts including hardclock(9) */
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_splnone();
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break;
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#endif /* MIPS1 */
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#if defined(MIPS3)
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if (mach_type != MACH_SGI_IP12) {
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case MACH_SGI_IP20:
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case MACH_SGI_IP22:
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case MACH_SGI_IP30:
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case MACH_SGI_IP32:
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mips3_initclocks();
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}
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break;
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#endif /* MIPS3 */
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default:
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panic("cpu_initclocks(): unknown mach_type IP%d", mach_type);
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break;
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}
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}
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void
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Loading…
Reference in New Issue