NetBSD/sys/arch/mips
soda 2047c95e49 Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
2000-06-09 06:06:57 +00:00
..
conf MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD, 2000-05-23 04:21:39 +00:00
include Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2, 2000-06-09 06:06:57 +00:00
mips Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2, 2000-06-09 06:06:57 +00:00
Makefile
Makefile.inc