This areas is called the comm pages. It is used to provide fast access to
several data and functions.
The comm pages are mapped starting at 0xffff800 (address chosed so that
absolute branch can be used, so it can be accessed even when dynamic linking
is not ready). NetBSD has the user stack here, so we need to provide a
Darwin-specific stack setup routine which sets the top of the stack at
0xbfff0000.
This implementation is not complete but it does enough to get MacOS X.3
starting again (static binaries run, dynamic binaries still have an issue).
in the comm pages functions, we only implement bcopy, pthread_self and
memcpy.
TODO:
- clean up the powerpc specific code from MD parts
- for now we map only one page to avoid a crash, we want two pages.
- write all the comm functions.
we're executing on; besides dealing with the bits not implemented in the
601's MSR it also removes the silent failure behaviour when passing
PSL_VEC set on a CPU not implementing it.
Also, fix those masks for the 4xx again.
obliteration to RESTORE_{KERN,USER}_SRS, respectively; have oea_init()
patch these sequences to be skipped on non-MPC601s. The code sequence
matching heuristic isn't as pretty as the one for VRSAVE and MQ but works
well enough with the current structure of the trap code, and can be easily
updated when necessary.
Nuke struct fpu and use struct fpreg instead (except for the names, they
were identical). On MP machines, this will avoid an unneeded IPI to save
the register contents that are about to discarded.
Add a PSL_USEROK_P(psl) macro which valids the bits (replaces the use of
PSL_USERSTATIC).
Add a PSL_USERSRR1 mask which is used to mask out status bits in the upper
half of SRR1.
Make sure PSL_VEC is set appropriately in userret(). PSL_VEC is in the same
region as SSR1 status bits so it's not preserved on exceptions. Thus we
need to make to set it.
When returning a MSR/SRR1 to userland, always clear the status bits.
Add emulation of the mfpvr, mtmsr, and mfmsr instructions.
PSL_{FP|VEC} instead of PCB_{FP|VEC}. The former will only be set if the
process owned the {FP,VEC} unit when it trapped into the kernel. The latter
would be set if the lwp ever used the {FP,VEC} unit.
if the lwp doesn't currently own the FPU. When returning, copy those bits
back to the PCB. (In case the user decided to the FP exception mode in the
signal handler).
there, they will copied to MSR as needed (when FP is enabled). They will be
cleared from the MSR when the lwp loses the FPU. Hence they need to be stored
someplace else.
clear PSL_FP bit (to force a FPU Unavailable exception) but clear
PSL_FE0 and PSL_FE1 so that the FP execption mode is changes to ignore.
This will prevent spurious FP exceptions being made when the running lwp
doesn't own the FPU.
problems when we shift it left and right while creating the new value
for the condition register.
Fixes problems reported by Juergen Hannken-Illjes in toolchain/24938.
