Add SIGFPE handling code. Report the proper SIGINFO ksi_code when a SIGFPE
happens. When a SIGFPE occurs, disable the exception enables in the FPSCR.
This commit is contained in:
matt
parent
12d5178857
commit
e7c76e51e6
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu.c,v 1.12 2004/04/04 17:35:15 matt Exp $ */
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/* $NetBSD: fpu.c,v 1.13 2004/04/04 19:21:36 matt Exp $ */
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/*
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* Copyright (C) 1996 Wolfgang Solfrank.
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.12 2004/04/04 17:35:15 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.13 2004/04/04 19:21:36 matt Exp $");
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#include "opt_multiprocessor.h"
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@ -40,6 +40,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.12 2004/04/04 17:35:15 matt Exp $");
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/user.h>
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#include <sys/siginfo.h>
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#include <machine/fpu.h>
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#include <machine/psl.h>
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@ -58,6 +59,13 @@ enable_fpu(void)
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memset(&pcb->pcb_fpu, 0, sizeof pcb->pcb_fpu);
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pcb->pcb_flags |= PCB_FPU;
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}
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/*
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* If we own the CPU but FP is disabled, simple enable it and return.
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*/
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if (ci->ci_fpulwp == l) {
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tf->srr1 |= PSL_FP | (pcb->pcb_flags & (PCB_FE0|PCB_FE1));
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return;
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}
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msr = mfmsr();
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mtmsr((msr & ~PSL_EE) | PSL_FP);
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__asm __volatile ("isync");
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@ -104,7 +112,7 @@ enable_fpu(void)
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"lfd 31,248(%0)\n"
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:: "b"(&pcb->pcb_fpu.fpr[0]));
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__asm __volatile ("isync");
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tf->srr1 |= PSL_FP;
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tf->srr1 |= PSL_FP | (pcb->pcb_flags & (PCB_FE0|PCB_FE1));
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ci->ci_fpulwp = l;
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pcb->pcb_fpcpu = ci;
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__asm __volatile ("sync");
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@ -216,3 +224,65 @@ save_fpu_lwp(struct lwp *l)
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mp_save_fpu_lwp(l);
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#endif
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}
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#define STICKYBITS (FPSCR_VX|FPSCR_OX|FPSCR_UX|FPSCR_ZX|FPSCR_XX)
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#if STICKYBITS & (PCB_FE0|PCB_FE1|PCB_VEC|PCB_FPU)
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#error PCB flags overlap FPSCR STICKYBITS
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#endif
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int
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get_fpu_fault_code(void)
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{
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#ifdef DIAGNOSTIC
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struct cpu_info *ci = curcpu();
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#endif
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struct lwp *l = curlwp;
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struct pcb *pcb = &l->l_addr->u_pcb;
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register_t msr;
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uint64_t tmp;
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uint32_t fpscr;
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int code;
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KASSERT(pcb->pcb_fpcpu == ci);
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KASSERT(pcb->pcb_flags & PCB_FPU);
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KASSERT(ci->ci_fpulwp == l);
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msr = mfmsr();
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mtmsr((msr & ~PSL_EE) | PSL_FP);
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__asm __volatile ("isync");
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__asm __volatile (
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"stfd 0,0(%0)\n" /* save f0 */
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"mtfsb0 0\n" /* clear FPSCR_FX */
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"mtfsb0 24\n" /* clear FPSCR_VE */
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"mtfsb0 25\n" /* clear FPSCR_OE */
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"mtfsb0 26\n" /* clear FPSCR_UE */
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"mtfsb0 27\n" /* clear FPSCR_ZE */
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"mtfsb0 28\n" /* clear FPSCR_XE */
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"mffs 0\n" /* get FPSCR */
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"stfd 0,0(%1)\n" /* store it */
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"lfd 0,0(%0)\n" /* restore f0 */
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:: "b"(&tmp), "b"(&pcb->pcb_fpu.fpscr));
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mtmsr(msr);
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__asm __volatile ("isync");
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/*
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* Now determine the fault type. First we see if any of the sticky
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* bits have changed since the FP exception. If so, we only want
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* to return the code for the new exception. If not, we look at all
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* the bits.
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*/
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fpscr = (uint32_t)(*(uint64_t *)&pcb->pcb_fpu.fpscr);
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if ((fpscr & ~pcb->pcb_flags) & STICKYBITS)
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fpscr &= ~pcb->pcb_flags;
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if (fpscr & FPSCR_VX) code = FPE_FLTINV;
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else if (fpscr & FPSCR_OX) code = FPE_FLTOVF;
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else if (fpscr & FPSCR_UX) code = FPE_FLTUND;
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else if (fpscr & FPSCR_ZX) code = FPE_FLTDIV;
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else if (fpscr & FPSCR_XX) code = FPE_FLTRES;
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else code = 0;
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/*
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* Now we save the latest set of sticky bits. This is so we can see
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* what's changed on the next SIGFPE.
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*/
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pcb->pcb_flags &= ~STICKYBITS;
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pcb->pcb_flags |= fpscr & STICKYBITS;
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return code;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: trap.c,v 1.99 2004/03/25 18:50:50 matt Exp $ */
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/* $NetBSD: trap.c,v 1.100 2004/04/04 19:21:36 matt Exp $ */
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/*
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.99 2004/03/25 18:50:50 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.100 2004/04/04 19:21:36 matt Exp $");
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#include "opt_altivec.h"
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#include "opt_ddb.h"
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@ -459,7 +459,7 @@ trap(struct trapframe *frame)
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ksi.ksi_addr = (void *)frame->srr0;
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if (frame->srr1 & 0x100000) {
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ksi.ksi_signo = SIGFPE;
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ksi.ksi_code = 0;
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ksi.ksi_code = get_fpu_fault_code();
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} else if (frame->srr1 & 0x40000) {
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ksi.ksi_code = ILL_PRVOPC;
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} else
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