On MPC601s, rewrite any (unimplemented) tlbsync instruction as a sync.
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@ -1,4 +1,4 @@
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/* $NetBSD: oea_machdep.c,v 1.17 2004/06/09 23:24:51 kleink Exp $ */
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/* $NetBSD: oea_machdep.c,v 1.18 2004/06/23 22:04:44 kleink Exp $ */
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/*
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* Copyright (C) 2002 Matt Thomas
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@ -33,7 +33,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.17 2004/06/09 23:24:51 kleink Exp $");
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__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.18 2004/06/23 22:04:44 kleink Exp $");
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#include "opt_compat_netbsd.h"
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#include "opt_ddb.h"
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@ -260,6 +260,8 @@ oea_init(void (*handler)(void))
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#define MTSPR_IBAT1L 0x7c1383a6
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#define NOP 0x60000000
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#define B 0x48000000
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#define TLBSYNC 0x7c00046c
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#define SYNC 0x7c0004ac
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#ifdef ALTIVEC
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#define MFSPR_VRSAVE 0x7c0042a6
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@ -326,6 +328,24 @@ oea_init(void (*handler)(void))
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__syncicache((void *) trapstart,
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(uintptr_t) trapend - (uintptr_t) trapstart);
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/*
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* If we are on a MPC601 processor, we need to zap any tlbsync
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* instructions into sync. This differs from the above in
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* examing all kernel text, as opposed to just the exception handling.
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* We sync the icache on every instruction found since there are
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* only very few of them.
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*/
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if (cpuvers == MPC601) {
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extern int kernel_text[], etext[];
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int *ip;
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for (ip = kernel_text; ip < etext; ip++)
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if (*ip == TLBSYNC) {
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*ip = SYNC;
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__syncicache(ip, sizeof(*ip));
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}
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}
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/*
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* external interrupt handler install
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*/
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