1d1029332d
Remove this. The architecture specific ones are now used.
2003-08-12 18:35:51 +00:00
47483092bd
Cleanup/rework cpu_switch*, switch_exit, Idle routine. Remove pcb_psl
...
since it was write-only. When setting up a process, make sure the fake
callframes are properly linked together.
Only lower SPL when in Idle loop. Raise spl to previous level (which would
be IPL_SCHED) when exiting Idle loop. Never lower SPL anyplace else.
2003-08-12 18:34:47 +00:00
b986a8c215
D'oh! The PCB can't be accessed with the MMU off. So get the pmap pointer
...
*before* disabling the MMU.
2003-08-12 15:40:02 +00:00
a3a18840be
Remove SPILLSTK leftovers.
2003-08-12 05:15:41 +00:00
c0d6cb285d
Nuke ci_curpm and curpm. Nuke pcb_pmreal. Those were use for spill stacks
...
and those no longer exist. for few uses that need CURPM, use CURPCB/PCB_PM
2003-08-12 05:06:53 +00:00
3527dc3950
When getting the lwp to switch to, test to see if the scheduling queue is
...
empty, and if so panic. Change references to "proc/process" to lwp.
2003-08-11 15:39:24 +00:00
b90614b54e
catch up with changes elsewhere.
2003-08-11 05:13:20 +00:00
341742a7e9
Add PTEGCOUNT defparam for opt_pmap.h
2003-08-11 01:33:30 +00:00
3d5b7190ad
Nuke ci_spillstk/CI_SPILLSTK. No longer needed.
2003-08-08 07:14:26 +00:00
add426be7e
Add a type for trapstart so ddb will use it.
2003-08-08 06:11:48 +00:00
938aca290c
Don't try to spill entries from the kernel's pmap. As of now, they can no
...
longer be evicted, only user-mappings can be evicted.
2003-08-08 06:10:43 +00:00
330dc2e202
Allow only user-mappings to be evicted (spillage). This prevents the
...
dreaded eviction of a kernel stack page.
2003-08-08 06:06:48 +00:00
aad01611e7
Move UCB-licensed code from 4-clause to 3-clause licence.
...
Patches provided by Joel Baker in PR 22364, verified by myself.
2003-08-07 16:26:28 +00:00
c60f393ec5
Don't overwrite the value of DAR in r30. Use r31 instead.
2003-08-06 07:18:56 +00:00
20a37f9627
Note that the used interrupt bits are 405GP specific.
...
Fix a tyop.
2003-08-05 02:10:31 +00:00
9254350d6a
Change bc x,y,z to their simplified mnemonics. During a kernel DSI fault,
...
if the exception address is < 1 page away from the KSP, switch to the that
CPU's spill stack to handle the trap. Otherwise you can get in a infinite
DSI fault loop.
2003-08-04 22:29:59 +00:00
0e50e47bb9
Make that OEA based kernels can properly deal with kernel ISI faults. Now
...
that LKMs are supported, it is possible for a LKM page to be "outspilled"
resulting in a possible ISI fault. Try to spill the page back in.
2003-08-04 22:26:59 +00:00
9b7d071bab
Eliminate stmw/lmw substituting the individual load/store instructions.
...
Use more symbolic constants. These are now safe for use on PPC64.
2003-08-04 00:32:49 +00:00
a4a468e215
Add SFRAME_USER_SR (even though the 4XX doesn't have one).
2003-08-04 00:30:51 +00:00
f77f1feee5
Use %r<n> for register names.
2003-08-03 23:26:55 +00:00
777589be9a
Add each register in trapframe, switchframe, and faultbuf.
2003-08-03 21:40:13 +00:00
e3e80aa5d7
Add PPC_OEA64 and netbsd32_sigcode.S
2003-08-03 21:38:08 +00:00
618c78b771
Don't use stmw. Do each store individually.
2003-08-03 21:27:49 +00:00
42382e46c4
Add CPUSAVE_* and each register in the saveframe and faultbuf.
2003-08-03 21:26:27 +00:00
dd1c661661
Nuke stmreg/ldmreg. PPC64 doesn't have a lmd/stmd so make sure lmw/stmw
...
don't invoke valid instructions on PPC64.
2003-08-02 19:40:39 +00:00
c9d56ac39d
Add symbolic offsets for what's in cpu save locations.
...
Add a PPC64 variant of mftb
2003-08-02 19:35:26 +00:00
d89b685a6e
Switch to regiser prefixes. Also change numeric constants to symbolic ones.
2003-07-31 15:30:41 +00:00
f9c46681fd
Change switchframe to use register_t (anything that uses stmX/lmX needs
...
to be defined as register_t).
2003-07-31 15:29:29 +00:00
18a1f8d4c7
Switch to m[tf]sprg[0-3]
2003-07-31 14:02:22 +00:00
52bfbfda86
Use register prefixes and load/store pseudo-instructions.
2003-07-31 13:59:54 +00:00
478364a5c5
Convert to the load/store pseudo-instructions.
2003-07-31 08:04:21 +00:00
e51e13713a
Use symbolic register names (%rN and %crN) throughout. Change a few more
...
numeric constants to their symbolic counterparts.
2003-07-31 07:51:16 +00:00
82ebd07f24
Convert most numeric constants to their symbolic equivalents. (step 2 of
...
cleaning up this file).
2003-07-31 06:49:32 +00:00
f5444cea2f
Define SZREG {4,8} appropriately. Add pseudo-instructions (via #define)
...
to load/store int, long, pointer, register, multiple registers. This is so
assembly files can be support IPL32 and LP64 PowerPC implementations.
2003-07-31 06:23:55 +00:00
0039d6a257
Replace 'm[tf]sprg x,y' with the appropriate 'm[tf]sprg[0-3] r' (this makes the
...
SPRG used unambiguous). This causes no change in the generated object.
2003-07-31 06:21:09 +00:00
18eb53cd22
add PSL_TGPR (for MPC603)
2003-07-31 01:25:38 +00:00
14fc7f3334
Whitespace alignment nits.
2003-07-27 23:45:44 +00:00
f0f724e255
Fix the default bus dma tag.
2003-07-25 10:50:13 +00:00
728102e66c
Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code.
2003-07-25 10:12:42 +00:00
879ba21504
Typo: __HAVE_BITENDIAN_BITOPS -> __HAVE_BIGENDIAN_BITOPS
2003-07-21 16:10:50 +00:00
9853da3d35
Remove an unused variable.
2003-07-19 08:20:22 +00:00
6783111f9f
Elimindate MD setrunqueue/remrunqueue (which were out-of-date compared to
...
the canonical versions in kern_synch.c). Define __HAVE_BITENDIAN_BITOPS
so the canonical versions will be used but will store priorities in the
desired (MSB) order for PowerPC (which allows the use of the cntlzw (count
leading zeroes, word) instruction in locore_subr.S to find the proper
priority).
2003-07-18 01:08:11 +00:00
5819fb160d
Elimindate MD setrunqueue/remrunqueue (which were out-of-date compared to
...
the canonical versions in kern_synch.c). Define __HAVE_BIGENDIAN_BITOPS
so the canonical versions will be used but will store priorities in the
desired (MSB) order for PowerPC (which allows the use of the cntlzw (count
leading zeroes, word) instruction in locore_subr.S to find the proper
priority).
2003-07-18 01:08:10 +00:00
d854b5c002
SZ_BOARD_CFG_DATA is not used anywhere, remove it.
2003-07-16 03:52:31 +00:00
ed51729135
__KERNEL_RCSID()
2003-07-15 02:54:31 +00:00
649e4ff2d5
Check return value of prop_get() correctly; serial ports now attach on
...
a walnut, but don't seem to accept input(?!).
2003-07-14 05:21:25 +00:00
2a6c2aa546
Back out rev 1.19. It's wrong. Add comments so it doesn't happen again.
2003-07-10 04:18:01 +00:00
18a43bbe99
Don't do vtophys on instruction addresses. This would cause problems for
...
user addresses (think trap from user mode) or lkms).
2003-07-10 02:06:11 +00:00
554b4aa05f
Enhance db_trace to understand syscalls and print the syscall number
...
that the user requested. For example:
0xd5c56f40: SC trap #240 by 0x15668c60: srr1=0xd032
r1=0xffffe470 cr=0x44000045 xer=0 ctr=0xeff27ab8
2003-07-09 22:51:50 +00:00
d00b22d0e7
Consult the "mac-addr" property associated with the emac device in
...
the dev_propdb rather than referencing board_data.
2003-07-04 02:34:47 +00:00
5b7c5eadea
Consult the "frequency" property associated with the device in the
...
dev_propdb, rather than using "board_info".
2003-07-04 02:21:02 +00:00
b8b2b1d895
Fix resident page accounting for the kernel pmap.
2003-07-03 13:18:42 +00:00
d5aece61d6
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
...
and need to be examined and discussed more.
2003-06-29 22:28:00 +00:00
257443876f
'struct proc *' -> 'struct lwp *' as required to get GENERIC for macppc built
2003-06-29 11:02:21 +00:00
ccbfec4208
Sprinkle some KNF.
2003-06-28 14:32:02 +00:00
960df3c8d1
Pass lwp pointers throughtout the kernel, as required, so that the lwpid can
...
be inserted into ktrace records. The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.
Bump the kernel rev up to 1.6V
2003-06-28 14:20:43 +00:00
d505b18964
Make sure to include opt_foo.h if a defflag option FOO is used.
2003-06-23 11:00:59 +00:00
452a8fdae2
Rename IPL_IMP -> IPL_VM.
2003-06-16 20:00:56 +00:00
7dd7f8baa2
Handle 64bit DMA addresses on PCI for platforms that can (currently only
...
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
2003-06-15 23:08:53 +00:00
67417f64a8
Sprinkle some TABs to line up the columns in the cputab models array.
2003-06-13 04:29:39 +00:00
6f197c635e
Add support IBM 405GPr
2003-06-13 04:05:26 +00:00
e05ce46e3e
Oops, delete an accidentally committed local change.
2003-06-12 08:47:21 +00:00
0328210bcc
Allow <machine/bus.h> to override the definition of BUS_DMA_COHERENT.
...
For example, machine-dependent code can make it equivalent to
BUS_DMA_NOCACHE if the hardware cannot reliably snoop the bus.
2003-06-12 08:43:07 +00:00
b4e18ad59c
Back out the last change after consultation with Matt Thomas. It hurts
...
platforms with fully functional bus snooping.
2003-06-12 08:30:41 +00:00
afe2393675
In _bus_dmamem_map(), make BUS_DMA_COHERENT behave the same way as
...
BUS_DMA_NOCACHE.
2003-06-12 07:32:28 +00:00
cd2d76d833
Fix an obvious pasto.
2003-05-19 08:10:03 +00:00
d963c8ed8a
In disasm_fields(), add a buffer length argument and keep track of
...
the remaining length of the buffer to use with the modified
db_symstr() interface. Also, convert to using snprintf() via some
local macros appending to the result buffer.
2003-05-17 19:17:43 +00:00
d0f3a5b671
Add parentheses around macro arguments.
2003-05-16 21:40:41 +00:00
1f1e54196d
Make this compile with DEBUG defined.
2003-05-16 21:38:50 +00:00
776138ea69
Rename <sys/float_ieee.h> to <sys/float_ieee754.h>, following libc's
...
convention for these.
2003-05-12 15:22:53 +00:00
36da248c07
Back out the following chagne:
...
http://mail-index.netbsd.org/source-changes/2003/05/08/0068.html
There were some side-effects that I didn't anticipate, and fixing them
is proving to be more difficult than I thought, do just eject for now.
Maybe one day we can look at this again.
Fixes PR kern/21517.
2003-05-10 21:10:23 +00:00
b77900c3c2
Simplify the way the bounds of the managed kernel virtual address
...
space is advertised to UVM by making virtual_avail and virtual_end
first-class exported variables by UVM. Machine-dependent code is
responsible for initializing them before main() is called. Anything
that steals KVA must adjust these variables accordingly.
This reduces the number of instances of this info from 3 to 1, and
simplifies the pmap(9) interface by removing the pmap_virtual_space()
function call, and removing two arguments from pmap_steal_memory().
This also eliminates some kludges such as having to burn kernel_map
entries on space used by the kernel and stolen KVA.
This also eliminates use of VM_{MIN,MAX}_KERNEL_ADDRESS from MI code,
this giving MD code greater flexibility over the bounds of the managed
kernel virtual address space if a given port's specific platforms can
vary in this regard (this is especially true of the evb* ports).
2003-05-08 18:13:12 +00:00
6ec2f52f71
rename Locore.c -> locore_c.c so that we can compile on case insensitive
...
filesystems. (from John Gordon)
2003-05-08 12:37:36 +00:00
9ca9578760
Add bit definitions for some registers.
2003-05-01 09:05:56 +00:00
dd0d5640b9
Add support for bus_space_{read,write}_region_[124]()
2003-04-30 19:14:44 +00:00
8c5c893bf7
Add a BKPT_ADDR() macro which gives MD code a chance to munge a
...
breakpoint address before it's used. Currently a no-op on all but sh5.
This is useful on sh5, for example, to mask off the instruction
type encoding in the bottom two address bits, and makes it possible
to do "db> break $rXX" instead of manually munging the address.
2003-04-29 17:06:03 +00:00
c916242d13
Put an isync at the end of the RESTORE_SRS() macro. This is the
...
recommended workaround for a mtsr/mtsrin errata with PPC750 cpus.
2003-04-29 15:16:14 +00:00
c48c683d1f
Fix use of an uninitialised variable. This was harmless, other than
...
spuriously incrementing an interrupt counter.
2003-04-29 15:11:45 +00:00
4be7a2dcf3
Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
...
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.
This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
!defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.
I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them. In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.
Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
2003-04-28 23:16:11 +00:00
c42e1fac66
Management, not managment. Mostly from jmc@openbsd.
2003-04-26 22:07:12 +00:00
a2dfb1b570
PR/3012: Greg A. Woods: Write all float.h files [except the vax of course]
...
in terms of float_ieee.h
2003-04-19 23:05:28 +00:00
c6c94cfec3
Make sure _bus_dmamap_load_mbuf() converts cpu-relative addresses
...
to bus-relative addresses.
Spotted by John Gordon, on port-powerpc@.
2003-04-18 09:16:05 +00:00
b1986a13d0
change 'data' arg of fp_ioctl to 'void *' to match file.h
2003-04-16 08:58:18 +00:00
201693cb1b
Re-read L2CR after enabling the L2 cache to avoid returning without
...
printing the cache details.
2003-04-10 16:07:15 +00:00
dd1424e7ac
Add POOL_VTOPHYS. Change vtophys to return -1 if pmap_extract fails.
...
(callers of vtophys should always supply a valid VA so that
pmap_extract should never fail).
2003-04-09 22:37:32 +00:00
c72503e1bd
Add some debug printf's.
2003-04-09 22:35:21 +00:00
b4c7fb17b2
Cleanup dmamap_sync a bit and add a few more comments. Add support for
...
cached physaddr's in mbufs.
2003-04-09 22:28:56 +00:00
4daebcbff5
Make the imask_t typedef a struct rather than a naked array. The attribute
...
on the array typedef was contaminating other u_int32_t naked arrays and
affecting their alignment.
2003-04-09 15:44:26 +00:00
021b37ca56
Add a KASSERT to pmap_extract so that vtophys is never attempted on a
...
mapped user address.
2003-04-07 21:42:14 +00:00
2f9404413f
If extracting an address from the kernel pmap, see if the address is outside
...
the mapped address range. If so, try to look it up via the BAT table. If
successful, translate and return the BAT'ed pa.
2003-04-04 22:38:05 +00:00
eb8a295e82
Rework l2cr/l3cr enabling/printing code. Make printing table driven.
2003-04-04 04:04:49 +00:00
ea6acde206
MMCRx register definitions should not be prefixed by SPR_
2003-04-04 04:03:18 +00:00
5bf8112ed1
Add two missing L2CLK speeds.
2003-04-04 04:00:16 +00:00
cc2c493bc4
Use PAGE_SIZE rather than NBPG.
2003-04-02 07:35:54 +00:00
c9228c8ddd
Use PAGE_SIZE rather than NBPG.
2003-04-02 04:17:50 +00:00
86f35f803c
Use PAGE_SIZE rather than NBPG.
2003-04-02 02:45:36 +00:00
7c0edb9d0e
Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK compile-time constants for
...
PowerPC processors.
2003-04-01 23:52:35 +00:00
6a15c68f5d
Make sure to turn on the speed knobs in HID0 on the 745x.
2003-03-29 18:18:54 +00:00
2c37db6aec
Allow oea_batinit to be called with either the MMU on or off.
...
(don't reset the BATs if the MMU is off).
2003-03-29 18:09:59 +00:00
b3715c2f6a
Add 7450 LRSTK and FOLD bits.
2003-03-29 18:08:42 +00:00
8a5a3a480a
Switch/adapt to new bus space infrastructure.
2003-03-18 16:40:18 +00:00
bff46769b9
fix typo in comment.
2003-03-17 23:15:33 +00:00
582f976e54
Add __HAVE_GENERIC_SOFT_INTERRUPT support.
2003-03-17 16:54:16 +00:00
c7b0df67b4
Add CLOCKBASE to opt_ppcparam.h.
2003-03-17 16:53:52 +00:00
5504cc0c26
Use "b" constraint so r0 won't be used.
2003-03-16 06:57:31 +00:00
1d04c635f2
Make the result an early clobber so gcc won't get clever.
2003-03-16 06:56:47 +00:00
8524a72241
Honor PMAP_NC for pmap_kenter_pa. Fix goof in pmap_pte_to_va.
2003-03-16 06:54:46 +00:00
ea542f761a
addi is not the same as add. :)
2003-03-16 06:52:39 +00:00
8a37a3ec5d
Fix bus_dmamap_sync (add offset to ds->ds_addr when needed).
...
Add a set of parenthesis to PMAP_NC so it evaluates properly.
2003-03-16 05:37:37 +00:00
640bee3010
Reduce visible globals. (gt_handle is now gt_memh and is only known to
...
machdep.c, gt_mainbus.c, and extintr.c)
2003-03-15 19:51:48 +00:00
101a152db1
This contains no marvell specific code now. It now completely hides the
...
underlying PCI MD implementation. XXX want to move this to
powerpc/include/ someday.
2003-03-15 19:50:31 +00:00
a0b2076415
New generic powerpc bus_space framework.
2003-03-15 08:03:19 +00:00
0f1794e44a
Make lint happy and use __asm && __volatile.
...
manipulate netisr via lwarx/stwcx. to get atomicity.
2003-03-15 07:50:28 +00:00
7ad3fe6e03
When mapping a page with BUS_SPACE_NOCACHE, make sure to flush the
...
physical page from the data cache.
2003-03-15 07:25:20 +00:00
35962f72c9
s;backside;; and report L2CR_L2DO & L2CR_L2IO
2003-03-15 07:22:46 +00:00
2b8417e488
Add LINTSTUBs and make oea_init() agree with them.
2003-03-15 07:21:02 +00:00
df24bda908
Make lint happy.
2003-03-15 07:19:20 +00:00
d03db36449
Use aprint_normal. Print 2MB L2 sizes with 7410.
2003-03-14 06:27:40 +00:00
e0242aaebc
Remove Debugger call.
2003-03-14 06:25:58 +00:00
d50c91e021
Make lint happy by not assigning to casted lvalue.
2003-03-14 06:23:48 +00:00
12dca1407b
Condition ({ ... }) by __GNUC__. Remove redundant SPR_IBAT0U definiton.
2003-03-14 06:22:51 +00:00
d7fc76efe1
Add _LOCORE protection.
2003-03-14 06:21:19 +00:00
61920c743e
Make ALI trap print DSISR.
2003-03-14 05:38:53 +00:00
a7b613e469
Use __asm and __volatile to make lint happy.
2003-03-14 05:37:51 +00:00
ce05df7bc7
Quiet lint warning.
2003-03-14 05:37:14 +00:00
8ceb32c0af
make LINTSTUB work with this.
2003-03-14 05:36:39 +00:00
c894ddaec1
Print more useful messages on kernel ALI or PGM traps.
2003-03-14 05:32:27 +00:00
0c29e154e3
Use __asm & __volatile to make lint(1) happy.
2003-03-13 17:30:38 +00:00
cd26de2684
Same code exists in both halves in #ifdef/#else/#endif. move it outside.
2003-03-12 06:00:36 +00:00
44b1e07ec9
Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403".
...
- different set of device control registers.
- non-standard access to the time base.
- 16 byte cache lines.
Approved by: Eduardo Horvath <eeh@netbsd.org>
2003-03-11 10:40:15 +00:00
210f48e582
Remove unneeded conditional code.
2003-03-06 07:15:46 +00:00
0b8a5fd80f
Adapt to powerpc/bus.h changes.
2003-03-06 00:20:39 +00:00
ff2281b498
Add preliminary support Marvell (Galileo) Discovery System Controllers.
...
This code was contributed by Allegro Networks.
2003-03-05 22:08:18 +00:00
6d251b3be3
Make AltiVec registers available via ptrace/procfs. Simplify AltiVec
...
processing. Add a "common" procfs_machdep.c for PowerPC platforms.
Even though it is supposed to be port specific, most (if not all)
PowerPC ports can just use the common one.
2003-03-05 05:27:24 +00:00
fb2cebb577
Pass the address of the intrframe to the ext_intr routine.
2003-03-04 08:34:12 +00:00
107803a3a3
Re-arrange things in evbppc & powerpc to support OEA-based eval boards
...
in evbppc. OEA-based board(s) to be added later.
2003-03-04 07:50:57 +00:00
9875f9218d
Add some missing volatiles.
2003-03-04 07:48:09 +00:00
31e2cbf0b5
add some ISO C 1995 I18N functions and types:
...
btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
2003-03-02 22:18:11 +00:00
5401f85320
Restore MQ to trapframe from mcontext since it's in both.
2003-03-02 01:07:55 +00:00
b9f3bdb8fb
Added L3CR_CONFIG to the parameter list for 745x L3 cache configuration.
2003-02-26 21:14:32 +00:00
0c5117e1f9
Added configuration entries for L3CR_CONFIG for L3 caches on 745x
...
accelerators. Thanks to Monroe Williams.
2003-02-26 21:10:51 +00:00
7109206620
Added L3CR_CONFIG for support of 745x G4 L3 cache configuration.
2003-02-26 21:05:23 +00:00
869bbf806d
Add some RAS support. Don't print out a message when we encounter
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trap instructions.
2003-02-25 23:32:03 +00:00
8609ed56b8
Only define KERN_AS= object if IDENT has -DLKM.
2003-02-24 07:15:40 +00:00
860ed88533
#include opt_uvm.h in machine/vmparam.h (for those ports offering the
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topdown option) so that including it directly before including
uvm/uvm_param.h (or uvm/uvm_extern.h which includes uvm/uvm_param.h)
and attempting to use topdown won't result in a compiler error.
Problem noted in private email.
2003-02-23 19:13:43 +00:00
b03aef6efc
witch from xor r,r,r to li r,0 to set a register to 0. It's clearer (and
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better for G4 processors).
2003-02-21 15:14:08 +00:00
c1234c6385
Add TOPDOWN VM support.
2003-02-21 03:41:52 +00:00
b42cde14b7
Set KERN_AS=obj now that LKMs work. (otherwise when you loaded LKMs they
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wouldn't have all the library routines available).
2003-02-19 23:55:48 +00:00
5bcfb63de7
Add PSL_PM
2003-02-14 04:45:32 +00:00
8268fcff94
Use register 8, not 0, when construct OF_buffer address.
2003-02-13 15:02:49 +00:00
matt