There are two changes:
- Assemble the places calling pktq_enqueue (bridge_forward)
for unicast and {b,m}cast frames into one
- Receive {b,m}cast frames in bridge_broadcast, not in
bridge_input
The changes make the code clear and readable. bridge_input
now doesn't need to take care of {b,m}cast frames;
bridge_forward and bridge_broadcast have the responsibility.
The changes are based on a patch of Lloyd Parkes submitted
in PR 48104, but don't fix its issue yet.
- Add BCM5708S support in brgphy(4). The auto negotiation may have some bugs.
- Add 2500SX support (not tested).
- Fix bit definition of BRGPHY_MRBE_MSG_PG5_NP_T2 from FreeBSD.
The changes since the last import are:
r257: Add missing ADJUST_LOCAL_OFFSET for ARM64.
r256: Move incorrectly placed array definitions.
r255: More work on testing environment.
r254: Refactor test default output.
r253: Pass entry adress in r12 on PPC-LE.
r252: Optimize calls on MIPS-64.
r251: Several minor fixes.
r250: Add missing SLJIT_IS_FPU_AVAILABLE checks and reorder U and S flags.
r249: Optimize jumps on ARM-64.
r248: Optimize jumps on PowerPC.
r247: MIPS64 support is mostly finished.
r246: MIPS arithmetic.
r245: Start working on MIPS64.
r244: Uniform names for TILE-Gx.
r243: Uniform the names of ARM compilers.
r242: Change ll to l on x86 and rename some instructions on ARM-64.
r241: Improved memory access in PPC and reordering the parameter type flags.
r240: Prepare for more registers on ARM-Thumb2 and renaming TMP_REGISTER to TMP_REG1 on x86.
r239: Prepare for more registers on ARMv5.
r238: Prepare for more registers on TILE-Gx.
r237: Prepare for more registers on MIPS and SPARC.
r236: Prepare for more registers on PPC.
r235: Prepare for more registers on x86.
r234: Most tests are pass on ARM-64 now.
r233: Around 25 test cases are now pass on ARM-64.
r232: More progress on ARM-64 and Thumb2 refactoring.
r231: Some progress an ARM-64 and ARM-T2 refactoring.
r230: Thumb2 code refactoring.
r229: Start working on ARM-64.
r228: Little endian PowerPC systems are supported now by the JIT compiler.
r227: TileGX architecture is now supported. Patch made by Jiong Wang.
r226: Cache flush for android. Patch by Giuseppe D'Angelo.
r225: Add support for forcibly freeing unused executable memory. Inspired by Carsten Klein.
r224: Few typo fixes.
r223: Reorder madvise and posix_madvise.
r222: The missing sljit_get_float_register_index function is added.
r221: Remove an invalid shift on ARM.
r220: JIT compiler now supports 32 bit Macs thanks to Lawrence Velazquez.
r219: Better code size statistics.
r218: Improvements for x86 and LIR dump.
r217: ICC and SunPro C fixes
r216: A new file for tracking internal changes are added.
r215: Less GNU dependnet Makefile and Intel style assemby for x86-64 systems.
r214: Switch from stdcall to cdecl in x86-32.
r213: Upstreaming minor fixes. Thanks for Daniel Richard G.
r212: Documentation update and a fix for a locking issue.
r211: Renaming temporaries to scratches to match the new name of the register. Does not affect compatibility.
r210: Improving assertions.
r209: Port sljit to SunPro C compiler. Patch by Daniel Richard G.
r208: SLJIT_TEMPORARY_REGx registers are renamed to SLJIT_SCRATCH_REGx.
r207: Removing unused checks.
r206: Optimizations for arm.
r205: Some optimizations on powerpc, mips and sparc.
r204: Rename sljit_emit_cond_value to sljit_emit_op_flags.
r203: Small x86 optimization.
r202: Finish cond_value with AND and INT_OP.
r201: More x86 fixes and improvements.
r200: Rename buf and code to inst.
r199: Replacing constants with instruction names in x86. Greatly improves maintainability.
r198: Only xmm0-xmm5 is volatile on Win64, so xmm6 must be saved.
r197: PowerPC shift right always modifies the carry flag. We may need to restore it.
r196: Rename SLJIT_F* functions to SLJIT_*D
r195: SLJIT_INT_OP works in the same way as SLJIT_SINGLE_OP: the input register arguments must be generated by the output of another instruction with SLJIT_INT_OP flag
r194: Renaming sljit_w to sljit_sw, sljit_i to sljit_si, sljit_h to sljit_sh, and sljit_b to sljit_sb.
r193: ARM single precision support.
r192: Single precision support added for ppc, mips and sparc.
r191: Add single precision support. Only works on x86 now.
r190: Relace C types with sljit types. No functionality change.
r189: Change 0 to NULL for mmap.
r188: Support environments where MAP_ANON is not available.
r187: Adding type descriptors for pointers and doubles (preparing for x32 ABIs and single precision support).
The network stack of NetBSD is well organized and
layered. A packet reception is processed from a
lower layer to an upper layer one by one. However,
ether_input and bridge_input are not structured so.
bridge_input is called inside ether_input.
The new structure replaces ifnet#if_input of a bridge
member with bridge_input when the member is attached.
So a packet goes straight on a packet reception via
a bridge, bridge_input => ether_input => ip_input.
The change is part of a patch of Lloyd Parkes submitted
in PR 48104. Unlike the patch, the change doesn't
intend to change the behavior of the packet processing.
Another patch will fix PR 48104.
why pam is failing in the case of an included pam config file missing.
example: instead of logging with the default log settings:
Jun 17 08:49:37 tucana su: pam_start failed: system error
it will log:
Jun 17 08:55:49 tucana su: in openpam_parse_chain(): failed loading include for service gibbetnich in /etc/pam.d/su(15): No such file or directory
Jun 17 08:55:49 tucana su: pam_start failed: system error
