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273 Commits

Author SHA1 Message Date
thorpej
e2ebc10c2d Duuuh! Align the SGMAP page tables to 32K, not 32M. 1998-06-23 02:31:05 +00:00
thorpej
02182100df Use config_defer(). 1998-06-09 18:49:33 +00:00
thorpej
8dedb90f13 The ISA chipset must persist; it's required after autoconfig time. 1998-06-08 23:49:05 +00:00
thorpej
14df007174 Oops, don't forget to fill in *addrp. 1998-06-07 00:29:29 +00:00
thorpej
0890af5ca8 Only disable an interrupt line after MAXSTRAYs if there is no handler 
attached; we get stray interrupts on PCI devices sometimes, for some
unknown reason.  (Similar problem exists on the 164SX, which also has
a Pyxis.)
 1998-06-06 23:29:23 +00:00
thorpej
331a7f56c1 Remove some debugging code no longer relevant now that we have DMA 
window chaining.
 1998-06-06 23:11:52 +00:00
thorpej
eabad6b572 Implement bus_space_{alloc,free}() for swiz PCI I/O space. 1998-06-06 22:44:46 +00:00
thorpej
7a6d646c9b Implement bus_space_{alloc,free}() for BWX bus space. 1998-06-06 22:28:16 +00:00
thorpej
04ba8480ae Use REGVAL64() to frob the Pyxis interrupt mask register. 1998-06-06 20:42:36 +00:00
thorpej
098dd211c7 Define a REGVAL64() for some Pyxis registers. 1998-06-06 20:40:14 +00:00
thorpej
85d08836f1 - Don't call *_dma_init() twice; there's no need to. Just do it in *attach(). 
- Display Pyxis revision properly.
 1998-06-06 01:33:44 +00:00
thorpej
c0fa3c6ac4 Don't call *_dma_init() twice; there's no need to. Just do it in *attach(). 1998-06-06 01:33:23 +00:00
thorpej
9331237596 Oops, turn off some debugging printfs. 1998-06-05 21:47:14 +00:00
thorpej
bf8523f4e4 - Egads! There are Pyxis "Pass 1" chips that do not have the DMA bug! 
Use the check recommended by the Digital Workstation engineers; look
  for Miata 1 systems (i.e. with Intel SIO).  From Andrew Gallatin.
- Update copyright (Pyxis and BWX).
 1998-06-05 19:25:19 +00:00
thorpej
f251e3372d Don't attempt to map the PCI IDE interrupt at bus 0 device 11 on the 
AlphaPC 164 and AlphaPC 164LX - these are wired to compatibility mode.
 1998-06-05 19:15:41 +00:00
thorpej
1aa688234e Miata 1 has an Intel SIO at bus 0 device 7 and a CMD PCI IDE at bus 0 
device 4.  Miata 1.5 and Miata 2 have a Cypress at device 7 and PCI IDE
at functions 1 and 2 of the Cypress (like the PC164SX).  These on-board
PCI IDE controllers are wired to compatibility mode, so don't bother
trying to map the interrupt.
 1998-06-05 19:04:51 +00:00
thorpej
c072110af0 Actually, I did use a few of them on this file (I wasn't clear enough 
in my mail to Ross, I guess...)
 1998-06-05 17:42:53 +00:00
thorpej
bb362059ac On Pass 1 Pyxis, disable PCI Read Prefetching, and warn the user about 
the DMA bug that exists on this Pyxis revision.
 1998-06-05 17:24:11 +00:00
thorpej
29977868a7 What was called CNFG in ALCOR and ALCOR2 is actually called PYXIS_CTRL1 
in Pyxis.  Add a comment to this fact.
 1998-06-05 17:22:34 +00:00
thorpej
73e5032ac9 Define the Pyxis-specific bits in the CIA_CSR_REV register (ID mask, and 
the ID for the 21174).
 1998-06-05 17:16:31 +00:00
ross
5790ee09ee Revert...Jason didn't use Andrew's diffs. 1998-06-05 15:28:40 +00:00
ross
8f455480ef Tweak the copyrights a little bit. pci_550.h gets a TNF copyright, not 
CMU, and pci_550.c keeps TNF but gets "Andrew Gallatin and Jason R. Thorpe".
 1998-06-05 03:34:27 +00:00
thorpej
cf914cac00 oops, read CNFG on all Pyxis revs. 1998-06-05 02:15:38 +00:00
thorpej
cbaedc8675 Support for the Digital Personal Workstation [456]xx, a.k.a. Miata (systype 
DEC_550).  Mostly cloned from the EB164 systype, with some modifications
from myself, and a few more from Andrew Gellatin.
 1998-06-05 02:13:41 +00:00
thorpej
3cfb38c5d1 Define the Pyxis interrupt request register. 1998-06-05 00:53:02 +00:00
thorpej
3249813e11 For whatever reason, the firmware seems to enable PCI loopback mode if it 
also enables BWX.  Make sure it's enabled if we have an old, buggy firmware
rev.
 1998-06-04 22:58:33 +00:00
thorpej
d4d49905dd Add support for using BWX for PCI config space and PCI i/o and mem space 
on the ALCOR2 and Pyxis.  BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
  with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
 1998-06-04 21:34:45 +00:00
thorpej
616125f8d1 Deal with a hardware bug in Pass 1 and Pass 2 Pyxis chips. Basically, 
the scatter/gather TLB cannot be invalidated on these chips.  So, to
work around this, we configure the otherwise unsed DMA Window 2 as a
2M SGMAP window at 128M, point all of its page table entries at the
DMA spill page, and, when the TLB is to be invalidated, put the PCI bus
into loopback mode, and create a target hit on Window 2 every 64k for
the number of TLB entries (plus a few ... it seems to not work unless
we read a few extra times), forcing out old TLB entries to make room for
the new, dummy target hits.
 1998-06-04 18:11:23 +00:00
thorpej
6dc28f5445 CIA and Pyxis have 8 scatter/gather TLB entries. 1998-06-04 01:18:22 +00:00
thorpej
32fef69ef7 Define the CIA control register. 1998-06-04 01:04:11 +00:00
thorpej
d94f02f9fd Ok, now we _REALLY_ have Pyxis recognition correct. There are two systypes 
that can have Pyxis: EB164 (AlphaPC164LX and AlphaPC164SX) and DEC_550 (Miata),
and these systypes/variations _always_ have Pyxis.
 1998-06-03 23:16:55 +00:00
thorpej
15c52040a5 Define the ALT_MEM big in the CIA revision register. 1998-06-03 22:19:08 +00:00
thorpej
d6041754c2 Allow the DMA tag to specify a boundary contraint. If the device has a 
more strict boundary, the map will use it, otherwise the map will inherit
the tag's, unless the tag's constraint is 0 (no boundary constraint).
 1998-06-03 18:25:53 +00:00
drochner
0c05b92da1 pull in new PC display headers 1998-05-28 16:59:31 +00:00
matt
66e7b8998f Only disable stray interrupts if there is no interrupt handler attached 1998-05-24 19:09:57 +00:00
ross
30e2441b99 Prototype sio_intr_alloc(). 1998-05-23 21:36:33 +00:00
matt
9c2e213217 Add sio_intr_alloc (copied from i386's isa_intr_alloc) for PCMCIA. 1998-05-23 18:35:56 +00:00
thorpej
0cb3acc9ae Correct a small, but fatal, typo. 1998-05-21 23:38:04 +00:00
thorpej
d19fbe1196 Garbage-collect the old confargs stuff that was used in the Early Days. 
It isn't really appropriate anymore.  Replace it with a real mainbus
attach args structure.
 1998-05-14 00:01:30 +00:00
thorpej
49aa171ab9 Add support for chaining DMA windows together, for falling back on 
SGMAPs if a direct-mapped window fails.
 1998-05-13 21:21:16 +00:00
thorpej
6172f5a0ac Use flags instead of a bunch of booleans. Add a "use bwx" flag. 1998-05-12 19:07:21 +00:00
thorpej
0b64ea0879 Gah, typo. 1998-05-12 18:45:04 +00:00
thorpej
86ee1b1000 Oops, and the writes, too. 1998-05-12 18:44:32 +00:00
thorpej
cc45d00d3c Clean up the code that puts the PCI controller into config mode 1; no 
functional difference.
 1998-05-12 18:40:44 +00:00
thorpej
34bbe5cd80 Rework ALCOR/ALCOR2/Pyxis recognition Yet Again. (Actually, just the 
way it's displayed, and mask off the revision once we've determined
which chip we're talking to.)
 1998-05-11 23:56:16 +00:00
thorpej
0624060713 Rework PCI interrupt mapping on the EB164 systype. Rather than computing 
interrupt routing directly, use the interrupt routing information provided
in the PCI "line" register.  The previous scheme did not work properly on
AlphaPC 164SXs.  Also, be silent about the fact that 0/8/x does not
have its interrupt mapped; this is to be expected on the 164SX (this is
the Cypress PCI-ISA bridge, which has IDE wired to compat mode on functions
1 and 2; the 164SX does _not_ have PCI IDE on device 11 like other AlphaPCs).
 1998-05-11 23:36:46 +00:00
thorpej
4665241bf8 Simplify the direct-mapped DMA case somewhat by adding a window base 
member to the DMA tag, and calling the direct-mapped back-ends directly,
rather than through chipset-specific front-ends which pass the window
base as an additional argument.
 1998-05-07 20:09:37 +00:00
mjacob
294015435b remove the unneccessary alpha_mbs and slight cleanup 1998-05-05 22:01:54 +00:00
mjacob
742983f1eb make it impossible to compile w/o SIO (you cannot have a console otherwise 1998-05-05 22:01:31 +00:00
mjacob
de4d1c62af pretty much redo interrupt code- now handles shared interrupts and solves the buspin int problem 1998-04-30 04:31:19 +00:00