- always enable options MIPS3_ENABLE_CLOCK_INTR and just clear the compare
register in cpu_intr() to make CLKF_BASE() works
properly
- prepare only possible number of cpu_inttab
- use macro for interrupt priority number passed to arc_set_intr()
to avoid confusion
- merge arc_hardware_intr() into cpu_intr()
- check independent timer interrupt first in cpu_intr()
- tweak MIPS_SR_INT_IE before calling hardclock timer handlers so that
spllowersoftclock(9) will be invoked properly in hardclock(9)
- reenable interrupt for timer in cpu_intr() rather than each timer handlers
okay'ed by soda.
Note the real fix is to make CLKF_BASE() check all independent
interrupt sources including jazz and isa devices.
the splay tree has been added for these types. Fix kern/33797 by
Geoff C. Wing.
While here also fix writes the same way (probably broken for 2 years),
and properly implement KERNFS_XREAD.
The IPsec code could probably be moved out now, and use kernfs_alloctype().
the precision of getnanotime() is not suitable for file timestamps.
esp. when it's nfs-exported.
- introduce vfs_timestamp().
(the name is from freebsd. currently merely a wrapper of nanotime())
- for ufs-like filesystems, use it rather than getnanotime().
XXX check other filesystems.
2) Modify pnpbus attachment code to record the chipid of the device if it
has one.
3) Change the clock probes to use the chipid, rather than relying on
potentially untrustworthy subtype and interface.
4) Add decoding of memory ranges to the RESIDUAL_DUMP code.
5) Add a we@pnpbus device to allow netbooting and root device detection
from an IBM we ethernet. (it will only work if your firmware detects it)
6) Because I moved the pnpbus probe to occur prior to pci and isa, it
screwed up the root device detection and firmware path building code.
Completely rewrite the fw-path detection code to deal with this.
- allow "-m macppc/evbppc" to also take "-a powerpc64" to build a
powerpc64 toolchain.
XXX this may change, as an evbppc64 port may be required.
XXX deal with that when we have some code...
PIIX support to release its mapping on the edge/level control registers.
Now that these are guaranteed to be unmapped, capture and restore the
registers in piixpcib(4)'s powerhook. The same will need to be done on a
per-chipset basis.
Concerns were raised about calling pci_intr_fixup on resume WRT hotplug
devices, so this has been removed.
Ok cube@.
backend for timecounters.
Due to known bugs in some chipsets, always read until we get 3 successive
samples which are monotonic, as FreeBSD does in its "safe" variant.
This can be refined later, either by chipset quirks or by a test (as
FreeBSD does).
