b5a587ab63
Regen: fsync argument change.
1998-06-05 19:41:21 +00:00
c77a008cc2
Replace the `waitfor' argument to the fsync vnode operator with a `flags'
...
argument.
1998-06-05 19:38:56 +00:00
bf8523f4e4
- Egads! There are Pyxis "Pass 1" chips that do not have the DMA bug!
...
Use the check recommended by the Digital Workstation engineers; look
for Miata 1 systems (i.e. with Intel SIO). From Andrew Gallatin.
- Update copyright (Pyxis and BWX).
1998-06-05 19:25:19 +00:00
f251e3372d
Don't attempt to map the PCI IDE interrupt at bus 0 device 11 on the
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AlphaPC 164 and AlphaPC 164LX - these are wired to compatibility mode.
1998-06-05 19:15:41 +00:00
1aa688234e
Miata 1 has an Intel SIO at bus 0 device 7 and a CMD PCI IDE at bus 0
...
device 4. Miata 1.5 and Miata 2 have a Cypress at device 7 and PCI IDE
at functions 1 and 2 of the Cypress (like the PC164SX). These on-board
PCI IDE controllers are wired to compatibility mode, so don't bother
trying to map the interrupt.
1998-06-05 19:04:51 +00:00
a1c151d56b
Add system variation for Miata 1.5.
1998-06-05 18:18:37 +00:00
c072110af0
Actually, I did use a few of them on this file (I wasn't clear enough
...
in my mail to Ross, I guess...)
1998-06-05 17:42:53 +00:00
bb362059ac
On Pass 1 Pyxis, disable PCI Read Prefetching, and warn the user about
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the DMA bug that exists on this Pyxis revision.
1998-06-05 17:24:11 +00:00
29977868a7
What was called CNFG in ALCOR and ALCOR2 is actually called PYXIS_CTRL1
...
in Pyxis. Add a comment to this fact.
1998-06-05 17:22:34 +00:00
73e5032ac9
Define the Pyxis-specific bits in the CIA_CSR_REV register (ID mask, and
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the ID for the 21174).
1998-06-05 17:16:31 +00:00
2701ea3ef3
Add DEC_550 (Miata).
1998-06-05 17:03:07 +00:00
5790ee09ee
Revert...Jason didn't use Andrew's diffs.
1998-06-05 15:28:40 +00:00
428a0d387a
remove old (now broken) memory disks hooks code.
1998-06-05 15:00:10 +00:00
135e6dc7e0
make this work with new md root stuff.
1998-06-05 14:57:55 +00:00
26eb9abb32
Add support for NWB-231A 4-port RS-232C card.
1998-06-05 14:19:22 +00:00
780f7fcf6f
Remove excessive cache flush.
1998-06-05 12:34:06 +00:00
8f262b2d67
Add (missing) "filedesc"
1998-06-05 12:24:44 +00:00
6bf20f4c29
Add support for UVM and MACHINE_NEW_NONCONTIG.
1998-06-05 12:22:43 +00:00
9125a5f198
Merge in MACHINE_NEW_NONCONTIG support and some fix from Tsubai-San.
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UVM support.
1998-06-05 11:27:09 +00:00
486c074973
An oversight in previous commit.
1998-06-05 03:40:07 +00:00
8f455480ef
Tweak the copyrights a little bit. pci_550.h gets a TNF copyright, not
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CMU, and pci_550.c keeps TNF but gets "Andrew Gallatin and Jason R. Thorpe".
1998-06-05 03:34:27 +00:00
03409c9b52
- Don't print newline until pcmcia_io_map is called; it expects to write
...
from middle of line.
- Use SIMPLEQ_FIRST/NEXT macros.
1998-06-05 03:26:52 +00:00
f4c1a44b26
Use SIMPLEQ_FIRST/NEXT macros.
1998-06-05 03:02:31 +00:00
95f9f9f48d
In the function pcmcia_card_gettype:
...
- When there is only one pcmcia function, don't use first config
entry to determine card type. Instead, use the config entry
actually used to initialize the pcmcia function if it is already
initialized, else a card is memory-type.
- Don't put a space after cast.
- Use SIMPLEQ_FIRST/NEXT macro.
1998-06-05 02:51:17 +00:00
cf914cac00
oops, read CNFG on all Pyxis revs.
1998-06-05 02:15:38 +00:00
cbaedc8675
Support for the Digital Personal Workstation [456]xx, a.k.a. Miata (systype
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DEC_550). Mostly cloned from the EB164 systype, with some modifications
from myself, and a few more from Andrew Gellatin.
1998-06-05 02:13:41 +00:00
3cfb38c5d1
Define the Pyxis interrupt request register.
1998-06-05 00:53:02 +00:00
3249813e11
For whatever reason, the firmware seems to enable PCI loopback mode if it
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also enables BWX. Make sure it's enabled if we have an old, buggy firmware
rev.
1998-06-04 22:58:33 +00:00
d4d49905dd
Add support for using BWX for PCI config space and PCI i/o and mem space
...
on the ALCOR2 and Pyxis. BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
1998-06-04 21:34:45 +00:00
573196b6ba
Check for the ether broadcast address in promiscuous mode (PR#5527).
1998-06-04 20:35:44 +00:00
57ce421691
Clean upp system detect code. Enable primary cache on VS3100.
1998-06-04 19:42:14 +00:00
616125f8d1
Deal with a hardware bug in Pass 1 and Pass 2 Pyxis chips. Basically,
...
the scatter/gather TLB cannot be invalidated on these chips. So, to
work around this, we configure the otherwise unsed DMA Window 2 as a
2M SGMAP window at 128M, point all of its page table entries at the
DMA spill page, and, when the TLB is to be invalidated, put the PCI bus
into loopback mode, and create a target hit on Window 2 every 64k for
the number of TLB entries (plus a few ... it seems to not work unless
we read a few extra times), forcing out old TLB entries to make room for
the new, dummy target hits.
1998-06-04 18:11:23 +00:00
c6d1832868
Include all the correct header files to get the prototypes of all the
...
soft net interrupt functions.
Handle NETISR_NATM soft interrupts.
1998-06-04 17:45:50 +00:00
61298c0cbf
Type postmortem_active as an int. (Pointed out by Patrick Welche).
1998-06-04 17:44:18 +00:00
78ebccfc2d
Rudimentary support for the VS3100 builtin graphics console.
1998-06-04 15:51:12 +00:00
98d557d09e
No need to define WDDEBUG or undefine ATAPI_DEBUG_WDC here.
1998-06-04 02:46:24 +00:00
770c4bfb9d
Make this compile with WDDEBUG
1998-06-04 02:27:33 +00:00
df385821f4
Print newline like others do when tracing wdunlock.
1998-06-04 02:25:05 +00:00
a51d42503c
Export the spill page PTE, and provide a hook to initialize it early.
1998-06-04 01:22:52 +00:00
6dc28f5445
CIA and Pyxis have 8 scatter/gather TLB entries.
1998-06-04 01:18:22 +00:00
32fef69ef7
Define the CIA control register.
1998-06-04 01:04:11 +00:00
d94f02f9fd
Ok, now we _REALLY_ have Pyxis recognition correct. There are two systypes
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that can have Pyxis: EB164 (AlphaPC164LX and AlphaPC164SX) and DEC_550 (Miata),
and these systypes/variations _always_ have Pyxis.
1998-06-03 23:16:55 +00:00
44605ba506
Define a bunch more system variations.
1998-06-03 23:07:38 +00:00
062294cc8c
Magma parallel port ioctls per Iain Hibbert.
1998-06-03 22:40:00 +00:00
87fe4d9ea1
Update from Iain on the parallel port stuff.
1998-06-03 22:38:31 +00:00
15c52040a5
Define the ALT_MEM big in the CIA revision register.
1998-06-03 22:19:08 +00:00
f8acb6d6fa
Sync w/ i386 port:
...
Eliminate some needless indirection through ISA DMA front-end functions.
1998-06-03 21:55:26 +00:00
e39ca9bf6f
Define MAP_FAILED, a symbolic constant which evaluates to the value returned
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by mmap(2) upon failure.
1998-06-03 21:52:40 +00:00
52450409d6
Sync w/ i386 port:
...
Implement bounce buffers for mbufs.
Also, correct copyright snafus, and a forgot-o left over from a commit
I made yesterday.
1998-06-03 21:52:36 +00:00
6d29690288
Implement bounce buffers for mbufs.
1998-06-03 21:50:48 +00:00
23a5420f99
turn on Essential HIPPI for this configuration
1998-06-03 21:17:52 +00:00
9f5797ac1d
turn on Essential HIPPI for these configurations
1998-06-03 21:16:28 +00:00
d6041754c2
Allow the DMA tag to specify a boundary contraint. If the device has a
...
more strict boundary, the map will use it, otherwise the map will inherit
the tag's, unless the tag's constraint is 0 (no boundary constraint).
1998-06-03 18:25:53 +00:00
554cce1e94
Remove double "options GATEWAY" entry.
1998-06-03 10:03:25 +00:00
28486ff301
Remove the _cookie member of the DMA tag; it's not used by anything. (This
...
was already done to the i386 port.)
1998-06-03 06:47:41 +00:00
7b37a276e2
Sync w/ i386 port:
...
Optimize the ISA DMA map load somewhat; don't traverse the buffer twice.
Instead, just attempt to do a normal load first. If we exceed the bounce
threshold or the number of segments, then we bounce the transfer.
1998-06-03 06:43:04 +00:00
6ffa35b390
Sync w/ i386 port:
...
When loading a DMA map, if the page's physical address exceeds the bounce
threshold, return an error to the caller (the caller will attempt to
bounce the transfer).
1998-06-03 06:41:51 +00:00
b5c2ecc231
Sync w/ i386 port:
...
Add a `bounce threshold' to the i386 DMA tag.
1998-06-03 06:40:45 +00:00
051c391187
Optimize the ISA DMA map load somewhat; don't traverse the buffer twice.
...
Instead, just attempt to do a normal load first. If we exceed the bounce
threshold or the number of segments, then we bounce the transfer.
1998-06-03 06:37:54 +00:00
66f9322f5f
EISA and PCI do not require bouncing; specify a bounce threshold of 0.
1998-06-03 06:35:49 +00:00
7b2ef456f0
When loading a DMA map, if the page's physical address exceeds the bounce
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threshold, return an error to the caller (the caller will attempt to
bounce the transfer).
1998-06-03 06:35:04 +00:00
f018f866d7
Add a `bounce threshold' to the i386 DMA tag.
1998-06-03 06:33:02 +00:00
0b25bb43b3
Adjust bus_dmamap_sync() for the R4000; in that case, use the stashed
...
virtual address for the segment, rather than the physical address, and
adjust the cache call appropriately.
1998-06-03 05:10:23 +00:00
63be85fc62
Fill in the virtual address of each DMA segment as we load the map.
1998-06-03 04:41:30 +00:00
691e8af708
Add a "virtual address" private member to the pmax bus_dma_segment_t, for
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use in R4000 cache flush operations in bus_dmamap_sync().
1998-06-03 04:38:41 +00:00
8ed096c794
Panic if we can't fulfill a bus_dmamap_load() with a boundary constraint.
1998-06-03 04:35:42 +00:00
47724b2eb9
Sync w/ i386 port.
1998-06-03 04:33:28 +00:00
2e846b8c1e
Sync w/ i386 port.
1998-06-03 04:20:22 +00:00
50be447da3
Sync the bus_dmamap_load back-end functions between alpha and i386. (only
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slight, unnecessary differences)
1998-06-03 04:15:05 +00:00
2c1cbdae75
Moved delay() from machdep.c to iomd_clock.c as delay will be dependant
...
on the system timers being used.
1998-06-02 21:57:58 +00:00
ff541b5e98
PRU_NREQ is the number of PRU_* requests, not the value of the last one.
1998-06-02 20:55:53 +00:00
7689b22688
Use the sparc's GCC lossage fix for the arm32 port as well. Problem appears
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to be a compiler bug resulting in an 'variable possibly used uninitialised'
warning when optimisation is used.
1998-06-02 20:51:24 +00:00
bdfeab3714
Merge in UVM support from Neil Carson <neil@causality.com>.
1998-06-02 20:41:46 +00:00
0618ed7122
Define the maximum size of the kernel VM data area.
1998-06-02 20:33:01 +00:00
ea702a5130
Switch to MACHINE_NEW_NONCONTIG as the default.
1998-06-02 20:32:18 +00:00
4ee7a131ad
Don't allow the copyin and copyout routines to use bcopy() as this will
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not work as the stack cannot be unwound if the copy aborts due to a fault.
1998-06-02 19:14:44 +00:00
b22946827d
Add a comment explaining why we do _not_ ACK data that might accompany
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a SYN (avoidance of a DoS attack).
1998-06-02 18:33:02 +00:00
c296923d2f
Loss window MUST be one segment, per draft-floyd-incr-init-win-03.
1998-06-02 17:22:26 +00:00
edc01ec330
In addition to the IP flow hash table, put the flows on a list. The table
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is used for fast lookup, the list for traversal of all flows. Also, use
PRT timers.
1998-06-02 15:48:03 +00:00
9a4b24a02a
Simplify the stack filling code when using the STACKCHECKS option.
1998-06-02 14:34:55 +00:00
52da0e26c6
Kill unused variable that resulted from the last change.
1998-06-02 03:21:42 +00:00
910666949f
An inability to map a slot's address space may be a normal condition --
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for instance, on-board video may live here. Make the complaint about
this a DEBUG rather than a DIAGNOSTIC message.
1998-06-02 02:24:03 +00:00
da2f2cb79f
Store the PA of the framebuffer in the softc. This eliminates the need
...
for the sc_phys callback; we can just store the PA in the grfbus attach
args, rather than a function pointer, which simplifies the code nicely.
1998-06-02 02:14:20 +00:00
7022024d4a
Add epic* at pci?
1998-06-02 01:43:33 +00:00
5852faaf84
Device driver for the SMC 83c170 Ethernet PCI Integrated Controller (EPIC/100)
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used in the SMC EtherPower II.
Media control isn't yet supported, due to some MII infrastructure
problems which I hope to address soon. This isn't a huge deal, since
the PHY defaults to auto-negotiate mode.
Also, the device just programs the multicast hash table to accept all
multicast, to avoid a hardware bug that causes the multicast address
filter to lose in 10Mb/s mode. This bug will be fixed in a more sane
way once the media control issues are dealt with.
1998-06-02 01:29:41 +00:00
b8ce6ef764
Make the direct ADB driver default.
1998-06-02 00:29:29 +00:00
09a9c016e3
Added Manuel Bouyer's recent i386 _bus_dmamap_load_buffer() patch :-
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Add handling of DMA boundary barrier in _bus_dmamap_load_buffer(). This
affects all bus_dmamap_load* functions of bus_dma(9).
While I'm there fix a bug where the dm_segs array could be overflowded by one.
1998-06-01 22:47:27 +00:00
c13f81fd52
Correct some comments.
1998-06-01 19:33:59 +00:00
b64a62fc73
Change "extern var;" --> "extern int var;" and so on. (for egcs -Wall)
1998-06-01 19:31:04 +00:00
350942b30d
according to the PCI 2.1 spec, the low _two_ bits of I/O BARs have
...
defined meaning/value other than specifying the address of the region.
(lowest bit is 1, meaning I/O space. second-lowest bit is reserved.)
1998-06-01 17:48:13 +00:00
e6be56ae0b
Need <stdlib.h> for mktemp() prototype.
1998-06-01 14:05:35 +00:00
837a8317b5
Eek, we were wasting almost half of the in_ifaddr hash space by modulo'ing
...
with IN_IFADDR_HASH_SIZE. Instead, AND with the hash mask computed by
hashinit().
1998-06-01 00:50:07 +00:00
08b5a4ecb8
Protect the ipflow_reap() call with splsoftnet.
1998-06-01 00:39:37 +00:00
9ef6fa7387
Build pmap_boostrap.o without profiling; we can't call mcount before the
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mmu is enabled!
1998-05-31 23:28:07 +00:00
a7f360c6c9
Specify a non-profiling C rule.
1998-05-31 23:25:41 +00:00
c1ca72eaf8
Build pmap_boostrap.o without profiling; we can't call mcount before the
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mmu is enabled!
1998-05-31 23:18:57 +00:00
92d8ae0ee3
Specify a non-profiling C rule.
1998-05-31 23:18:05 +00:00
dd8ed56342
Another demonstration that when you're converting variables from 'long's
...
to fixed 32-bit integers, you have to exercise care.
1998-05-31 19:39:13 +00:00
4519b25f6c
Add options COMPAT_386BSD_MBRPART.
1998-05-31 13:53:42 +00:00
6e73ca754f
add a PCI 'quirks' mechanism, meant to be used as the mechanism
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of last resort when trying to communicate information about
bogus behaviour of PCI devices to the MI autoconfiguration code.
In general, bogus behaviour should be handled by drivers, but there
are some types of bogons which can't be addressed that way. The
only quirk currently defined is one which indicates that the device
is multi-function even though the device's header says otherwise.
(Mmm, Intel 82371FB PCI-to-ISA Bridge (PIIX); you'd think that at least
Intel would have gotten it right...)
1998-05-31 06:07:59 +00:00
kleink