* erratum: disable the nocrc RX bit, as it may cause problems on the 570{1-4}.
adjust the length of the incoming packet accordingly to trim it.
* the 5704 has a smaller MBUF_POOL, so set a smaller value
Local change:
* Pass the autoneg force flag to mii_attach. Some PHYs need to be kicked
out of their falsely autoneged 10baseT state with this.
* don't set the NOCRC bit in the mode control register, it can cause
problems on some chips (from the broadcom errata via FreeBSD)
* implement a fallback quirktable that is searched only using the
major asic revision, so that the driver has a shot at supporting
newer versions properly without modification
* rename asicrev -> chipid, like the FreeBSD driver
observation is that some 570x devices can get themselves into a state
where they miscompute off-loaded TCP or UDP checksums on packets so
small that Ethernet padding is required. Further obsevation suggests
that the bge checksum-offload hardware is adding those padding bytes
into its TCP checksum computation. (Once a 5700 gets in this state,
even a warm boot won't fix it: it needs a hard powerdown.)
Work around the problem by padding such runts with zeros: even if the
checksum-offload adds in extra zeros, the resulting sum will be correct.
Also, dont trust the checksum-offload on received packets smaller than
the minimum ethernet frame, in case the Rx-side has a similar bug.
Finally, on packets where we do trust the outboard Rx-side TCP or UDP
checksum, the bge did not include the pseudo-header. Set the
M_CSUM_NO_PSEUDOHDR bit as well as M_CSUM_DATA, and rely on
udp_input() or tcp_input() adding in the sum via in_cksum_phdr().
if we m_dup() a packet to compactify it, and later run out of DMA
descriptors, bge_encap() will return ENOBUFS, hoping the driver will
try again later. But we have just m_freem()'d the original chain
which was m_dup()'d, leaving a pointer to the just-freed packet header
in the tx queue.
Fix by always walking the chain, shuffling data towards the head;
except if we find a runt in the very last mbuf, we must borrow data
from its predecessor.
(Patch is verbatim from a third-party tree, apologies for any style woes.)
- Only BCM5705M asic rev A1 was tested.
Thanks to Bill Paul (wpaul@freebsd.org) for help and support.
Approved by: Frank van der Linden <fvdl@netbsd.org>
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
require that the DMA receive buffers be aligned. The driver was
deliberately mis-aligning by 2 bytes, to force the layer-2/3
headers to 32-bit alignment.
Workaround: if chip is a 5701, and is in PCI-X mode, leave the DMA
buffers aligned. If the host CPU requires alignment, copy the buffer
after reception to force aligment.
Tested on an i386 in PCI-X bus, with __NO_STRICT_ALIGNMENT forced off.
Patch and comments reworked to minimize drift from
FreeBSD if_bge.c rev 1.14.
ram for using TBI, versus MII/GMII.
FreeBSD commit log and versions:
Obtain the media type from the shared memory and only use the eeprom
as a fallback.
if_bge.c: rev 1.30
if_bgereg.h: rev 1.13
Thanks to Paul Saab @mu.org.
quirk on all 5700 revision B devices. (These fixes have not been
tested against NetBSD recently; committing the fix and the enable separately
gives us flexibility about which fixes get pulled into the NetBSD-1.6 branch.)
* Add support for 5704C dual-channel chip with integral copper PHY (tested)
and 5704S dual-channel SERDES/TBI gbic (untested). Add PHY DSP patch
for 5704.
* Update PHY DSP-code patch for bcm5401 to match latest Linux driver.
* Add PHY DSP-code patch for 5703 (untested).
* Update onchip buffer tunables to recommended values from Linux drivers.
* Disable MWI access. This chip family cannot hanlde PCI stalls
in the middle of an MWI burst. The driver has heuristics to detect PCI
line size, but under load, some PCI bridges may force stalls which
the attach-time heruistics do not catch. Some PCI bridges never
do this, so maybe it should be a tunable option.
* bcm5700 rev Bx chips have a race condition, where updating the
Tx producer pointer goes un-noticed by the chip. Workaround is to
write the new producer-pointer value twice.
* bcm5700 chips rev Bx wedge up if given DMA descriptors of
eight bytes or less. Once hit, only reovery is a watchdog timeout/reset.
If the offending packet is retransmitted, the chip will wedge again...
Check for teeny fragments in a Tx request, and either fold the
teeny chunk residue into an adjacent mbuf, or m_dup the entire buffer.
(NB: quirk not yet enabled; in-place folding tested only on FreeBSD.)
* Add workaround for revision Bx bcm5700: chip bugs in decoding
of PCI register writes may leave the hardware in (partial) powersave state,
such that writes to "indirect" registers do not work.
Explicitly force chip into D0 state at attach time.
* Accessing PHY registers with the bge chip in autopoll mode, when
link-state is the process of changing, may cause the bge chip to
assert PCI errors. Workaround: when doing miibus register access,
save autopoll state, disable around access, and restore autopoll state.
NB: issuing PHY resets may give a window where the problem still occurs.
* Increase Tx interrupt-coalescing thresholds, to reduce Tx-done interrupts.
the brgphy driver; all users of the BCM5400 and BCM5401 need
the DSP patch and the sledgehammer-reset-at-media-set-time.
Also add a DSP patch for the BCM5411 gleaned from Apple's
GMAC driver for Darwin.
Tested with a 3Com 3c996-T (BCM5700 + BCM5401).
bit and then read it back in a loop (with appropriate delays) waiting
for it to read back clear.
This fixes a problem where the bus would hang when bringing down
the interface or changing interface flags on a system with a
sufficiently fast CPU (e.g. 2GHz P4 Xeon).
pooka