Remove some overzealous locking of HEAD_TO_MAP
Remove a potential deadlock in pmap_copy_page
Change alloc and free l1pt to use kenter/kremove.
Update pmap_map to use kenter (only actually used by dumpsys, so no matching kremove)
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
this file; while I'm here, rework the GIO arbitrator parameter setup to
match more closely what is done by lunix on the same hardware... Finally,
on a tip from Wilbern Cobb, preserve the graphics-related bits of the
GIO arbitrator parameter register from the PROM-initialized settings so
ARCS console on the graphics display works (tested on both my Indy with
Newport and my Indigo2 with XL gfx).
be spread over several devices, and the phcb is usually the main one.
Add agp_machdep.c file which implements MD agp functions (currently
just agp_flush_cache).
APM_IOC_GETPOWER ioctl read/write. Setting the batteryid in the passed
structure returns the data for just that battery. The old ioctl
remains for binary compatibility but has been renamed.
Itojun already did the hard work -- I just added a couple of lines.
reviewed by: thorpej
Thorpe as an extension to the bus_space(9) API.
Only the mainbus has a working mmap... iomd, podulebus and isa dont have
one yet. Its trivial to add the iomd and isa's memory part but am a bit
hessistant to add it without knowing its implications by heart.
Podulebus might be implemented in 32 bits EASI but otherwise its not really
transparent since there is AFAIK no function to explicitly read one byte or
so .. or is this implemented in a higher level ?
ARM26 and arch/arm32/dnard (Shark) kernels compile and RiscPC and Shark
kernels are tested and function OK.
Implications of other ARM systems like hpcarm and ebarm are propably
minimal or solved trivially.
need to check for curproc being non-NULL since none of the pmap
interfaces which are legal to use in interrupt handlers use this macro.
- use the hit op when flushing the cache in pmap_kremove().
- avoid trusting the optimizer in pmap_clear_reference().
- fix pmap_clear_modify() to reset the mod-bit emulation so we can
detect further modifications to the page, also flushing the cache
for any mappings which might have dirty lines.
This also involved updating the in-kernel DES functions to correspond
to the versions in our in-tree OpenSSL, because the des_SPtrans table
has changed; the asm code will not work with the old permutation table!
C and i386 asm code for the DES, 3DES, and Blowfish CBC modes is also
included; it is not currently built as the ESP processing in esp_core.c
splits the CBC operation and the cipher transform apart. Hopefully that
will be fixed as there is a substantial performance improvement to be had
from doing so. It will remain necessary to use the C version of the
Blowfish CBC function on some i386 machines, however, as the asm version
uses bswapl, which ony 486 and later processors have. The DES CBC code
doesn't have this problem.
Finally, change esp_core.c to use the ecb3_encrypt function instead of
calling ecb_encrypt three times; this improves performance a bit, in
particular in the asm case.
chris