Commit Graph

764 Commits

Author SHA1 Message Date
thorpej
855b79db92 Let each platform typedef the new __cpu_simple_lock_t, which should
be the most efficient type used for the atomic operations in the
simplelock structure, and should also be __volatile.
2000-05-02 04:41:04 +00:00
soren
e038e8aac1 No need for flushing the cache after zeroing a page uncached. 2000-04-30 23:30:47 +00:00
simonb
21666d1ea5 Only call uvm_pageidlezero() if uvm.page_idle_zero is set. 2000-04-30 23:01:24 +00:00
simonb
0ba4762798 Define offset for uvm.page_idle_zero. 2000-04-30 22:56:12 +00:00
soren
f820567ce2 Allow non-pmax to use COMPAT_ULTRIX. 2000-04-29 21:47:13 +00:00
soren
082109d0e4 Move free page zeroing to before the whichqs spinner. Pointed out by simonb. 2000-04-29 14:44:42 +00:00
thorpej
f51470a514 Require that each each MACHINE/MACHINE_ARCH supply a lock.h. This file
contains the values __SIMPLELOCK_LOCKED and __SIMPLELOCK_UNLOCKED, which
replace the old SIMPLELOCK_LOCKED and SIMPLELOCK_UNLOCKED.  These files
are also required to supply inline functions __cpu_simple_lock(),
__cpu_simple_lock_try(), and __cpu_simple_unlock() if locking is to be
supported on that platform (i.e. if MULTIPROCESSOR is defined in the
_KERNEL case).  Change these functions to take an int * (&alp->lock_data)
rather than the struct simplelock * itself.

These changes make it possible for userland to use the locking primitives
by including <machine/lock.h>.
2000-04-29 03:31:45 +00:00
soren
2cfb26c801 Zero free pages in the idle loop. 2000-04-28 19:25:55 +00:00
shin
a332af2846 delete unused function mips3_TLBReadVPS().
reorder insns to avoid mtc0/mfc0 hazard (for VR4100/R4700/RM52xx).
save/restore PageMask in mips3_TLBRead().
2000-04-21 14:14:55 +00:00
shin
e2711a6552 make it compile with -DDEBUG. 2000-04-21 14:10:39 +00:00
nisimura
79733cb614 Effort to have consistent comments, fixing one error. 2000-04-21 02:45:01 +00:00
nisimura
3d5a5b03f5 - Address PR#9907. u_pte[1] wired down is left not global sometimes.
The brokenness is revealed sporadorically by memory usage on runtime.
- Avoid Vr4100 incompatibilty by making sure to retain default pgMask
  value for TLB invalidation routines.
2000-04-21 02:39:55 +00:00
nisimura
a01973aecb Change the way how pmap_protect() modifies the protection of KSEG2
space using MIPS_TBRPL() call.  It avoils to 'vistimize' a possibly
useful TLB entry. XXX MachTLBUpdate() will be retired, soon.
2000-04-16 10:16:19 +00:00
nisimura
8feff14832 Fix a typo in the previous change. 2000-04-16 10:08:32 +00:00
nisimura
4edcc4fca2 Change the way to implement zero copy data move in pagemove() using
MIPS_TBRPL().  It saves about 20 instructions to run for each
iteration, and avoids TLB polution.  Currently works for MIPS1 only
configuration.
2000-04-16 09:09:42 +00:00
nisimura
7717409808 Introduce MIPS_TBRPL() which replaces a TLB entry of given vaddr
with new entryHi and entryLo pair iff found in TLB.  Works only
for KSEG2 this moment.  mips3 version will follow.
2000-04-16 09:00:26 +00:00
soda
c56a43535d remove following symbols which became unnecessary in recent cpu_intr() change:
mips_hardware_intr
	MIPS3_INTERNAL_TIMER_INTERRUPT
	mips3_intr_cycle_count
	mips3_timer_delta
2000-04-15 22:05:51 +00:00
nisimura
e54e10f9ce - Withdraw dealfpu() code which has been never useful so far.
- XXX It was a mistake to add CP1 insn encoding values into cpuregs.h.
  Those will be relocated into mips_opcode.h with some adjustment work.
2000-04-15 06:21:01 +00:00
soren
0ce39b7430 Typo; user stack only needs to start one page below 0x80000000. 2000-04-13 22:02:54 +00:00
nisimura
ce0937324b - Move a loop invariant of 'if (CPUISMIPS3)' out of pagemove().
- XXX I'm not sure whether the anticipatory MachTLBUpdate(to, pte) is
  a gain or loss on runtime.  If not a loss, it should be MIPS_TBIS().
2000-04-12 01:37:58 +00:00
nisimura
85f3855a8c - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
2000-04-12 01:05:34 +00:00
castor
4ebaf4d105 Taken from Jeff Smith <jeffs@geocast.com>:
Fix regress/lib/libc/ieeefp/except for MIPS.  Newer FPE handling code
	did not generate SIGFPE, but always SIGILL.  Add this back to the
	assembly code.  The QED 5231 requests the kernel emulates some of
	the conditions that generate an SIGFPE, but when the emulation code
	did a ctc1 to fsr with an exception the kernel got a FPE in kernel mode.
	Fix this by saving the fp regs earlier, then saving the new FSR in
	the context.  This allows the FSR value to be seen by the SIGFPE
	handler.

	Add fp emulation for 8 mips2 fpu instructions to handle exceptions
	(round.w.fmt, trunc.w.fmt, ceil.w.fmt, floor.w.fmt).  This lets
	perl5 run when compiled -mips2.
2000-04-11 16:28:05 +00:00
nisimura
aa4f967e51 Abandon rather random distinctions in andi/addiu coding and make
them consistent with and/addu instrunction mnemonics which produce
exactly same binaries.
2000-04-11 04:53:57 +00:00
nisimura
dba7b560cd Load delay slot is automagically adjusted at runtime since MIPS II
architecture.
2000-04-11 04:39:14 +00:00
chs
a6d33cc1f2 add a new function vn_marktext() for exec code to let others know
that the vnode is now being used as process text.
2000-04-11 04:37:47 +00:00
nisimura
e342080364 Introduce cpu_intr() whose body is now provided by target ports in
their own ways.  Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
2000-04-11 02:30:14 +00:00
nisimura
4f3093c121 Remove various TLB manipulation routines which have been unused
long time, commented out and is unlikely useful; TLBWriteIndexed(),
TLBWriteRandom(), TLBFlush(), TLBFlushPID() and TLBFind().
2000-04-11 01:32:19 +00:00
nisimura
53e7a8c8d5 - Fix a bug in mips1_TBIAP() misbehaving like as mips1_TBIA().
- Adjust comments to reflect what it does.
2000-04-10 11:38:16 +00:00
simonb
3d6b29f228 Use UVM_PGA_ZERO in uvm_pagealloc() calls instead of using pmap_zero_page(). 2000-04-10 08:50:20 +00:00
nisimura
ea23dc6364 Make sure ASID management is done in the same way of NetBSD/alpha. Rename
and change 'pmap_alloc_asid()' into 'pmap_asid_alloc()'
2000-04-10 05:34:27 +00:00
nisimura
c84ed44f75 Make (sure) ASID management same as what NetBSD/alpha does for ASN.
ASID#0 is reserved for pmap0 shared between proc0 and kthreads,
and every TLB for KSEG2 has G (global) bit to have wildcard match
regardless of the process' ASID.   MIPS1 would flush TLBs belong
to user spaces upon ASID generation bump.  Change for MIPS3 is
to be done.
2000-04-10 04:59:46 +00:00
simonb
e2b66b68da Small white space and 80col wraparound cleanups. 2000-04-10 01:53:11 +00:00
soren
09ad839ab3 This file has been superseded by the MI ELF code. 2000-04-08 22:30:26 +00:00
soren
aa4c70110e Move the start of the user stack down a little to account for the
virtual address checking done by the R8000 and some QED CPUs.

From Jeff Smith.
2000-04-07 21:50:08 +00:00
simonb
9edec906b5 Removing trailing comma from enum declaration. 2000-04-03 05:58:31 +00:00
thorpej
2bc5adb20e Instead of checking vm_physmem[<physseg>].pgs to determine if
uvm_page_init() has completed, add a boolean uvm.page_init_done,
and test against that.  Use this same boolean (rather than
pmap_initialized) in pmap_growkernel() to determine if we are
being called via uvm_page_init() to grow the kernel address space.

This fixes a problem on some i386 configurations where pmap_init()
itself was needing to have the kernel page table grown, and since
pmap_initialized was not yet set to TRUE, pmap_growkernel() was
choosing the wrong code path.

Fix tested by Havard Eidnes.
2000-04-02 20:39:14 +00:00
minoura
78b105698a Move dl* function definitions to libc on ELF.
Based on the patch supplied by Takuya Shiozaki <tshiozak@astec.co.jp>.
See http://mail-index.netbsd.org/tech-userlevel/2000/02/23/0000.html.
2000-04-02 15:35:47 +00:00
simonb
6e0357239a Nuke register, diddle a bit of indentation in some function declarations. 2000-03-30 14:36:30 +00:00
nisimura
1b0c1f4d0d Abandon the initial microscale optimization of pmap_alloc_asid(),
leaving the second change intact.  It'd be rather less costly to
extend the case analysis.
2000-03-28 05:58:33 +00:00
simonb
6060929e8e Move fpcurproc declaration to <mips/cpu.h>. 2000-03-28 03:11:26 +00:00
simonb
ef89d70178 Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
2000-03-28 02:58:44 +00:00
simonb
ea6aa0dc3c Use the recent alpha solution to getting the printf() format right in
mips_init_msgbuf().
2000-03-28 02:53:18 +00:00
simonb
338105f94b Make declaration of curpcb variable extern. 2000-03-28 01:06:04 +00:00
simonb
a833cd73e8 Remove duplicate declaration of pmap_is_page_ro() (in <mips/pte.h> and
pmap_zero_page() (in <vm/pmap.h>).
2000-03-28 01:04:22 +00:00
nisimura
464669d1ef The previous microscale optimazation in pmap_asid_alloc() was
half-baked and resulted in one superfluous ASID bump if new pmaps
are created when pmap_asid_generation > 0.   Need to initialize pmap
fields correctly.

Yet, this possibly might not be the perfect solution.  If one
process bumped pmap_asid_generation _after_ a new pmap was created
and initialized with then-current pmap_asid_generation value.  In
that case, the new pmap would have another (superfluous) ASID bump
when 2nd (not 1st) CPU tick is assigned.  I'm not sure if this case
would happen.

Have pmap_max_asid variable to hold the maximum number of ASID
(TLBpid) supported by processor anticipating the possible runtime
cost of ((CPUISMIPS3)? MIPS3_TLB_NUM_ASIDS : MIPS1_TLB_NUM_PIDS).
2000-03-28 01:00:00 +00:00
simonb
8ae7eeef11 Remove redundant declarations of mips3_cycle_count(), stacktrace(),
logstacktrace(), mips_idle() and cpu_switch() - these are already
declared in various header files.
2000-03-28 00:55:33 +00:00
simonb
d0e1814cba Remove duplication declarations of Sysmap and Sysmapsize - these are
in <mips/pte.h>
2000-03-28 00:52:57 +00:00
nisimura
73fa1ce87f Change 'goto cpu_switch1' to 'goto cpu_switch_queuescan' in vr_idle.S
and make the jump destination global.
2000-03-28 00:24:04 +00:00
nisimura
fa6012454d It's not necessary to (re-) assign pmap->pm_asidgen whenever ASID
(TLBpid) is bumped.  It's ok just in the case when pmap_asid_generation
is bumped.
2000-03-27 08:56:21 +00:00
nisimura
06b4feb7d6 Have TBIA/TBIAP an argument refering to a global variable instead
of a compile time constant.
2000-03-27 05:30:40 +00:00