cf914cac00
oops, read CNFG on all Pyxis revs.
1998-06-05 02:15:38 +00:00
cbaedc8675
Support for the Digital Personal Workstation [456]xx, a.k.a. Miata (systype
...
DEC_550). Mostly cloned from the EB164 systype, with some modifications
from myself, and a few more from Andrew Gellatin.
1998-06-05 02:13:41 +00:00
3cfb38c5d1
Define the Pyxis interrupt request register.
1998-06-05 00:53:02 +00:00
3249813e11
For whatever reason, the firmware seems to enable PCI loopback mode if it
...
also enables BWX. Make sure it's enabled if we have an old, buggy firmware
rev.
1998-06-04 22:58:33 +00:00
d4d49905dd
Add support for using BWX for PCI config space and PCI i/o and mem space
...
on the ALCOR2 and Pyxis. BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
1998-06-04 21:34:45 +00:00
573196b6ba
Check for the ether broadcast address in promiscuous mode (PR#5527).
1998-06-04 20:35:44 +00:00
57ce421691
Clean upp system detect code. Enable primary cache on VS3100.
1998-06-04 19:42:14 +00:00
616125f8d1
Deal with a hardware bug in Pass 1 and Pass 2 Pyxis chips. Basically,
...
the scatter/gather TLB cannot be invalidated on these chips. So, to
work around this, we configure the otherwise unsed DMA Window 2 as a
2M SGMAP window at 128M, point all of its page table entries at the
DMA spill page, and, when the TLB is to be invalidated, put the PCI bus
into loopback mode, and create a target hit on Window 2 every 64k for
the number of TLB entries (plus a few ... it seems to not work unless
we read a few extra times), forcing out old TLB entries to make room for
the new, dummy target hits.
1998-06-04 18:11:23 +00:00
c6d1832868
Include all the correct header files to get the prototypes of all the
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soft net interrupt functions.
Handle NETISR_NATM soft interrupts.
1998-06-04 17:45:50 +00:00
61298c0cbf
Type postmortem_active as an int. (Pointed out by Patrick Welche).
1998-06-04 17:44:18 +00:00
78ebccfc2d
Rudimentary support for the VS3100 builtin graphics console.
1998-06-04 15:51:12 +00:00
98d557d09e
No need to define WDDEBUG or undefine ATAPI_DEBUG_WDC here.
1998-06-04 02:46:24 +00:00
770c4bfb9d
Make this compile with WDDEBUG
1998-06-04 02:27:33 +00:00
df385821f4
Print newline like others do when tracing wdunlock.
1998-06-04 02:25:05 +00:00
a51d42503c
Export the spill page PTE, and provide a hook to initialize it early.
1998-06-04 01:22:52 +00:00
6dc28f5445
CIA and Pyxis have 8 scatter/gather TLB entries.
1998-06-04 01:18:22 +00:00
32fef69ef7
Define the CIA control register.
1998-06-04 01:04:11 +00:00
d94f02f9fd
Ok, now we _REALLY_ have Pyxis recognition correct. There are two systypes
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that can have Pyxis: EB164 (AlphaPC164LX and AlphaPC164SX) and DEC_550 (Miata),
and these systypes/variations _always_ have Pyxis.
1998-06-03 23:16:55 +00:00
44605ba506
Define a bunch more system variations.
1998-06-03 23:07:38 +00:00
062294cc8c
Magma parallel port ioctls per Iain Hibbert.
1998-06-03 22:40:00 +00:00
87fe4d9ea1
Update from Iain on the parallel port stuff.
1998-06-03 22:38:31 +00:00
15c52040a5
Define the ALT_MEM big in the CIA revision register.
1998-06-03 22:19:08 +00:00
f8acb6d6fa
Sync w/ i386 port:
...
Eliminate some needless indirection through ISA DMA front-end functions.
1998-06-03 21:55:26 +00:00
e39ca9bf6f
Define MAP_FAILED, a symbolic constant which evaluates to the value returned
...
by mmap(2) upon failure.
1998-06-03 21:52:40 +00:00
52450409d6
Sync w/ i386 port:
...
Implement bounce buffers for mbufs.
Also, correct copyright snafus, and a forgot-o left over from a commit
I made yesterday.
1998-06-03 21:52:36 +00:00
6d29690288
Implement bounce buffers for mbufs.
1998-06-03 21:50:48 +00:00
23a5420f99
turn on Essential HIPPI for this configuration
1998-06-03 21:17:52 +00:00
9f5797ac1d
turn on Essential HIPPI for these configurations
1998-06-03 21:16:28 +00:00
d6041754c2
Allow the DMA tag to specify a boundary contraint. If the device has a
...
more strict boundary, the map will use it, otherwise the map will inherit
the tag's, unless the tag's constraint is 0 (no boundary constraint).
1998-06-03 18:25:53 +00:00
554cce1e94
Remove double "options GATEWAY" entry.
1998-06-03 10:03:25 +00:00
28486ff301
Remove the _cookie member of the DMA tag; it's not used by anything. (This
...
was already done to the i386 port.)
1998-06-03 06:47:41 +00:00
7b37a276e2
Sync w/ i386 port:
...
Optimize the ISA DMA map load somewhat; don't traverse the buffer twice.
Instead, just attempt to do a normal load first. If we exceed the bounce
threshold or the number of segments, then we bounce the transfer.
1998-06-03 06:43:04 +00:00
6ffa35b390
Sync w/ i386 port:
...
When loading a DMA map, if the page's physical address exceeds the bounce
threshold, return an error to the caller (the caller will attempt to
bounce the transfer).
1998-06-03 06:41:51 +00:00
b5c2ecc231
Sync w/ i386 port:
...
Add a `bounce threshold' to the i386 DMA tag.
1998-06-03 06:40:45 +00:00
051c391187
Optimize the ISA DMA map load somewhat; don't traverse the buffer twice.
...
Instead, just attempt to do a normal load first. If we exceed the bounce
threshold or the number of segments, then we bounce the transfer.
1998-06-03 06:37:54 +00:00
66f9322f5f
EISA and PCI do not require bouncing; specify a bounce threshold of 0.
1998-06-03 06:35:49 +00:00
7b2ef456f0
When loading a DMA map, if the page's physical address exceeds the bounce
...
threshold, return an error to the caller (the caller will attempt to
bounce the transfer).
1998-06-03 06:35:04 +00:00
f018f866d7
Add a `bounce threshold' to the i386 DMA tag.
1998-06-03 06:33:02 +00:00
0b25bb43b3
Adjust bus_dmamap_sync() for the R4000; in that case, use the stashed
...
virtual address for the segment, rather than the physical address, and
adjust the cache call appropriately.
1998-06-03 05:10:23 +00:00
63be85fc62
Fill in the virtual address of each DMA segment as we load the map.
1998-06-03 04:41:30 +00:00
691e8af708
Add a "virtual address" private member to the pmax bus_dma_segment_t, for
...
use in R4000 cache flush operations in bus_dmamap_sync().
1998-06-03 04:38:41 +00:00
8ed096c794
Panic if we can't fulfill a bus_dmamap_load() with a boundary constraint.
1998-06-03 04:35:42 +00:00
47724b2eb9
Sync w/ i386 port.
1998-06-03 04:33:28 +00:00
2e846b8c1e
Sync w/ i386 port.
1998-06-03 04:20:22 +00:00
50be447da3
Sync the bus_dmamap_load back-end functions between alpha and i386. (only
...
slight, unnecessary differences)
1998-06-03 04:15:05 +00:00
2c1cbdae75
Moved delay() from machdep.c to iomd_clock.c as delay will be dependant
...
on the system timers being used.
1998-06-02 21:57:58 +00:00
ff541b5e98
PRU_NREQ is the number of PRU_* requests, not the value of the last one.
1998-06-02 20:55:53 +00:00
7689b22688
Use the sparc's GCC lossage fix for the arm32 port as well. Problem appears
...
to be a compiler bug resulting in an 'variable possibly used uninitialised'
warning when optimisation is used.
1998-06-02 20:51:24 +00:00
bdfeab3714
Merge in UVM support from Neil Carson <neil@causality.com>.
1998-06-02 20:41:46 +00:00
0618ed7122
Define the maximum size of the kernel VM data area.
1998-06-02 20:33:01 +00:00
thorpej