Commit Graph

10 Commits

Author SHA1 Message Date
thorpej 7c2247336b Clean up the i80312 PMU definitions. 2002-01-24 01:21:44 +00:00
thorpej 574dba96b1 Update copyright. 2001-11-29 08:26:18 +00:00
thorpej d16c00cfb2 Disable the ATU interrupt sources (i.e. interrupts that occur when
we get Master or Target aborts).
2001-11-09 17:44:43 +00:00
thorpej 660b98b7dc Snapshot of work-in-progress for Intel i80312 Companion I/O chip;
just basic Inbound and Outbound window setup is done, PCI configuration
space access (not quite working yet), and I/O and Memory space routines
so far.
2001-11-09 03:27:51 +00:00
thorpej 64f23a2423 Adjust the way the PMMRs are defined -- offsets from a base, not
absolutes.  Also, add PPB and more ATU registers.
2001-11-08 03:20:36 +00:00
thorpej fe988b60bb Add PCI window addresses. 2001-11-04 19:32:32 +00:00
thorpej 95a9886f49 Add a comment describing what this file is. 2001-11-04 01:23:49 +00:00
thorpej 8f626436b6 Add missing RCS ID, add missing name. 2001-11-04 01:16:01 +00:00
matt 779b9b4649 Fix some register definitions. 2001-09-05 17:05:36 +00:00
matt 4e642cc5fd Add i80312 register definitions (just registers for now). 2001-08-26 19:25:47 +00:00