little-endian byte-order. This should work out to be a no-op
for LE systems, and allows BE systems to use the board.
Tested on PPC, reviewed by Dante.
NOTE: The board/microcode does have a BIG_ENDIAN mode of operation,
but it's not well-documented. That might be interesting to investigate
at some point in the future, though.
re-enqueueing an already free ccb.
Prepare the background to have a unique initialization function for
all of the supported host adapters.
Rename a lot of #define in a more sane way.
Move Carriers initialization and defines in adwmcode.{c,h}
Don't lose Carrier nodes in case of a BUS/Chip reset explicitly invoked
after a DMA failure.
XXX - DMA failure still arise when AdvanSys U[2]W host adapters are used
in conjunction with Intel 82443BX Host Bridge/Controller (rev. 0x03).
!?!Have to understand why!?!
Add a way to instruct the upper layer to don't bother w/ new requests if/when a device queue is full/busy or the device is unavailabale at that time
Use scsipi_inquiry_data instead of its own inquiry structure
Add a catch for DMA Error which show up on Intel 82443BX Host Bridge/Controller (rev. 0x03). This doesn't fix the problem, but reset the SCSI bus and reinitialize the host adapter
Minor cosmetical changes
Thanks a lot to Greg Oster and Andan Lauber
Increased ADW_MAX_CCB to 63 and ADW_MAX_CARRIER to 253
Print WDTR/SDTR negotiation result per target
Protect AdvISR() inside splbio()/splx() pair
Add a pending queue to keep track of all the CCBs that are being executed by the host adapter.
Rewrote timeout handler in a more efficient way:
After 3 timeout now the SCSI is resetted and all pending queues not completed are now reenqueued in the waiting queue so to get executed just after the BUS Reset (hoping that resetting the SCSI BUS and reinitializing the adapter could solve the problem).
Fix minor glitches.
Add preliminary support for ASB-3940U3W host adapters; it might work w/ autotermination on.
ASB-3940U3W support is not yet tested due to lack of board.
