hz -> Hz
This commit is contained in:
tsutsui
parent
23b48be61f
commit
0ff49f9f99
@ -1,4 +1,4 @@
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/* $NetBSD: ad1848.c,v 1.16 2003/01/06 13:10:28 wiz Exp $ */
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/* $NetBSD: ad1848.c,v 1.17 2003/02/21 17:14:06 tsutsui Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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@ -102,7 +102,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ad1848.c,v 1.16 2003/01/06 13:10:28 wiz Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ad1848.c,v 1.17 2003/02/21 17:14:06 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -1238,7 +1238,7 @@ ad1848_set_speed(sc, argp)
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{
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/*
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* The sampling speed is encoded in the least significant nible of I8.
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* The LSB selects the clock source (0=24.576 MHz, 1=16.9344 Mhz) and
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* The LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and
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* other three bits select the divisor (indirectly):
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*
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* The available speeds are in the following table. Keep the speeds in
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@ -1,4 +1,4 @@
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/* $NetBSD: adwlib.c,v 1.24 2001/11/15 09:48:04 lukem Exp $ */
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/* $NetBSD: adwlib.c,v 1.25 2003/02/21 17:14:06 tsutsui Exp $ */
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/*
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* Low level routines for the Advanced Systems Inc. SCSI controllers chips
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@ -52,7 +52,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: adwlib.c,v 1.24 2001/11/15 09:48:04 lukem Exp $");
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__KERNEL_RCSID(0, "$NetBSD: adwlib.c,v 1.25 2003/02/21 17:14:06 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -1469,7 +1469,7 @@ AdwASC38C1600Cabling(iot, ioh, cfg)
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* Each ASC-38C1600 function has two connectors. Only an HVD device
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* can not be connected to either connector. An LVD device or SE device
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* may be connected to either connecor. If an SE device is connected,
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* then at most Ultra speed (20 Mhz) can be used on both connectors.
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* then at most Ultra speed (20 MHz) can be used on both connectors.
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*
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* If an HVD device is attached, return an error.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: adwmcode.h,v 1.7 2001/08/29 17:25:04 briggs Exp $ */
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/* $NetBSD: adwmcode.h,v 1.8 2003/02/21 17:14:06 tsutsui Exp $ */
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/*
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* Generic driver definitions and exported functions for the Advanced
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@ -126,11 +126,11 @@ struct adw_mcode {
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* 4-bit speed SDTR speed name
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* =========== ===============
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* 0000b (0x0) SDTR disabled
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* 0001b (0x1) 5 Mhz
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* 0010b (0x2) 10 Mhz
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* 0011b (0x3) 20 Mhz (Ultra)
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* 0100b (0x4) 40 Mhz (LVD/Ultra2)
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* 0101b (0x5) 80 Mhz (LVD2/Ultra3)
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* 0001b (0x1) 5 MHz
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* 0010b (0x2) 10 MHz
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* 0011b (0x3) 20 MHz (Ultra)
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* 0100b (0x4) 40 MHz (LVD/Ultra2)
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* 0101b (0x5) 80 MHz (LVD2/Ultra3)
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* 0110b (0x6) Undefined
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* ...
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* 1111b (0xF) Undefined
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@ -1,4 +1,4 @@
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/* $NetBSD: aic6360.c,v 1.78 2002/04/05 18:27:50 bouyer Exp $ */
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/* $NetBSD: aic6360.c,v 1.79 2003/02/21 17:14:06 tsutsui Exp $ */
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/*
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* Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved.
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@ -58,7 +58,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: aic6360.c,v 1.78 2002/04/05 18:27:50 bouyer Exp $");
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__KERNEL_RCSID(0, "$NetBSD: aic6360.c,v 1.79 2003/02/21 17:14:06 tsutsui Exp $");
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#include "opt_ddb.h"
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#ifdef DDB
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@ -257,7 +257,7 @@ aicattach(struct aic_softc *sc)
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* the chip's clock input and the size and offset of the sync period
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* register.
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*
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* For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
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* For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
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* maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
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* minimum transfer rate.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: bt8xx.h,v 1.4 2000/12/30 16:55:24 wiz Exp $ */
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/* $NetBSD: bt8xx.h,v 1.5 2003/02/21 17:14:04 tsutsui Exp $ */
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/* This file is merged from ioctl_meteor.h and ioctl_bt848.h from FreeBSD. */
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/* The copyright below only applies to the ioctl_meteor.h part of this file. */
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@ -120,7 +120,7 @@ struct meteor_video {
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#define METEOR_STATUS_SVP 0x0100 /* State of VRAM Port:inactive/active */
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#define METEOR_STATUS_STTC 0x0080 /* Time Constant: TV/VCR */
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#define METEOR_STATUS_HCLK 0x0040 /* Horiz PLL: locked/unlocked */
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#define METEOR_STATUS_FIDT 0x0020 /* Field detect: 50/60hz */
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#define METEOR_STATUS_FIDT 0x0020 /* Field detect: 50/60Hz */
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#define METEOR_STATUS_ALTD 0x0002 /* Line alt: no line alt/line alt */
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#define METEOR_STATUS_CODE 0x0001 /* Colour info: no colour/colour */
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@ -1,4 +1,4 @@
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/* $NetBSD: hd64570.c,v 1.21 2002/03/05 04:12:57 itojun Exp $ */
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/* $NetBSD: hd64570.c,v 1.22 2003/02/21 17:14:05 tsutsui Exp $ */
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/*
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* Copyright (c) 1999 Christian E. Hopps
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@ -65,7 +65,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: hd64570.c,v 1.21 2002/03/05 04:12:57 itojun Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hd64570.c,v 1.22 2003/02/21 17:14:05 tsutsui Exp $");
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#include "bpfilter.h"
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#include "opt_inet.h"
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@ -508,7 +508,7 @@ sca_msci_get_baud_rate_values(u_int32_t hz, u_int8_t *tmcp)
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* tmc = chip / hz, but have tmc <= 256
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*/
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/* assume system clock is 9.8304Mhz or 9830400hz */
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/* assume system clock is 9.8304MHz or 9830400Hz */
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clock = clock = 9830400 >> 1;
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/* round down */
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@ -1,4 +1,4 @@
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/* $NetBSD: i8253reg.h,v 1.5 1998/01/19 11:38:00 drochner Exp $ */
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/* $NetBSD: i8253reg.h,v 1.6 2003/02/21 17:14:07 tsutsui Exp $ */
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/*-
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* Copyright (c) 1993 The Regents of the University of California.
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@ -69,7 +69,7 @@
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/*
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* Frequency of all three count-down timers; (TIMER_FREQ/freq) is the
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* appropriate count to generate a frequency of freq hz.
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* appropriate count to generate a frequency of freq Hz.
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*/
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#ifndef TIMER_FREQ
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#define TIMER_FREQ 1193182
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@ -1,4 +1,4 @@
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/* $NetBSD: mb89352.c,v 1.13 2002/05/30 21:10:36 thorpej Exp $ */
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/* $NetBSD: mb89352.c,v 1.14 2003/02/21 17:14:07 tsutsui Exp $ */
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/* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
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/*-
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@ -70,7 +70,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.13 2002/05/30 21:10:36 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.14 2003/02/21 17:14:07 tsutsui Exp $");
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#ifdef DDB
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#define integrate
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@ -254,7 +254,7 @@ spcattach(sc)
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* the chip's clock input and the size and offset of the sync period
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* register.
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*
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* For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
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* For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
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* maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
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* minimum transfer rate.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: ncr53c9xreg.h,v 1.10 2001/11/21 19:14:29 wiz Exp $ */
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/* $NetBSD: ncr53c9xreg.h,v 1.11 2003/02/21 17:14:05 tsutsui Exp $ */
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/*
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* Copyright (c) 1994 Peter Galbavy. All rights reserved.
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@ -121,14 +121,14 @@
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#define NCRCFG1_BUSID 0x07 /* Bus ID */
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#define NCR_CCF 0x09 /* WO - Clock Conversion Factor */
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/* 0 = 35.01 - 40Mhz */
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/* 0 = 35.01 - 40MHz */
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/* NEVER SET TO 1 */
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/* 2 = 10Mhz */
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/* 3 = 10.01 - 15Mhz */
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/* 4 = 15.01 - 20Mhz */
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/* 5 = 20.01 - 25Mhz */
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/* 6 = 25.01 - 30Mhz */
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/* 7 = 30.01 - 35Mhz */
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/* 2 = 10MHz */
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/* 3 = 10.01 - 15MHz */
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/* 4 = 15.01 - 20MHz */
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/* 5 = 20.01 - 25MHz */
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/* 6 = 25.01 - 30MHz */
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/* 7 = 30.01 - 35MHz */
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#define NCR_TEST 0x0a /* WO - Test (Chip Test Only) */
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@ -151,7 +151,7 @@
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#define NCRCFG3_QTE 0x08 /* Queue Tag Enable */
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#define NCRCFG3_CDB 0x04 /* CDB 10-bytes OK */
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#define NCRCFG3_FSCSI 0x02 /* Fast SCSI */
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#define NCRCFG3_FCLK 0x01 /* Fast Clock (>25Mhz) */
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#define NCRCFG3_FCLK 0x01 /* Fast Clock (>25MHz) */
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/*
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* For some unknown reason, the ESP406/FAS408 looks like every
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#define NCRESPCFG3_CDB 0x20 /* CDB 10-bytes OK */
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#define NCRESPCFG3_FSCSI 0x10 /* Fast SCSI */
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#define NCRESPCFG3_SRESB 0x08 /* Save Residual Byte */
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#define NCRESPCFG3_FCLK 0x04 /* Fast Clock (>25Mhz) */
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#define NCRESPCFG3_FCLK 0x04 /* Fast Clock (>25MHz) */
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#define NCRESPCFG3_ADMA 0x02 /* Alternate DMA Mode */
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#define NCRESPCFG3_T8M 0x01 /* Threshold 8 Mode */
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@ -177,7 +177,7 @@
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#define NCRF9XCFG3_QTE 0x40 /* Queue Tag Enable */
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#define NCRF9XCFG3_CDB 0x20 /* CDB 10-bytes OK */
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#define NCRF9XCFG3_FSCSI 0x10 /* Fast SCSI */
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#define NCRF9XCFG3_FCLK 0x08 /* Fast Clock (>25Mhz) */
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#define NCRF9XCFG3_FCLK 0x08 /* Fast Clock (>25MHz) */
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#define NCRF9XCFG3_SRESB 0x04 /* Save Residual Byte */
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#define NCRF9XCFG3_ADMA 0x02 /* Alternate DMA Mode */
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#define NCRF9XCFG3_T8M 0x01 /* Threshold 8 Mode */
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@ -1,4 +1,4 @@
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/* $NetBSD: rtl81x9.c,v 1.44 2003/01/15 21:55:03 bouyer Exp $ */
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/* $NetBSD: rtl81x9.c,v 1.45 2003/02/21 17:14:07 tsutsui Exp $ */
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/*
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* Copyright (c) 1997, 1998
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@ -70,7 +70,7 @@
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* levels.
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*
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* It's impossible given this rotten design to really achieve decent
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* performance at 100Mbps, unless you happen to have a 400Mhz PII or
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* performance at 100Mbps, unless you happen to have a 400MHz PII or
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* some equally overmuscled CPU to drive it.
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*
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* On the bright side, the 8139 does have a built-in PHY, although
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@ -86,7 +86,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rtl81x9.c,v 1.44 2003/01/15 21:55:03 bouyer Exp $");
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__KERNEL_RCSID(0, "$NetBSD: rtl81x9.c,v 1.45 2003/02/21 17:14:07 tsutsui Exp $");
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#include "bpfilter.h"
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#include "rnd.h"
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@ -1,4 +1,4 @@
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/* $NetBSD: siopreg.h,v 1.13 2002/08/29 16:43:23 bouyer Exp $ */
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/* $NetBSD: siopreg.h,v 1.14 2003/02/21 17:14:05 tsutsui Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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@ -81,27 +81,27 @@ struct scf_period {
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};
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static const struct scf_period scf_period[] __attribute__((__unused__)) = {
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{250, 25, 1}, /* 10.0 Mhz */
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{250, 37, 2}, /* 6.67 Mhz */
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{250, 50, 3}, /* 5.00 Mhz */
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{250, 75, 4}, /* 3.33 Mhz */
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{125, 12, 1}, /* 20.0 Mhz */
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{125, 18, 2}, /* 13.3 Mhz */
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{125, 25, 3}, /* 10.0 Mhz */
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{125, 37, 4}, /* 6.67 Mhz */
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{125, 50, 5}, /* 5.0 Mhz */
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{ 62, 10, 1}, /* 40.0 Mhz */
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{ 62, 12, 3}, /* 20.0 Mhz */
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{ 62, 18, 4}, /* 13.3 Mhz */
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{ 62, 25, 5}, /* 10.0 Mhz */
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{250, 25, 1}, /* 10.0 MHz */
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{250, 37, 2}, /* 6.67 MHz */
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{250, 50, 3}, /* 5.00 MHz */
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{250, 75, 4}, /* 3.33 MHz */
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{125, 12, 1}, /* 20.0 MHz */
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{125, 18, 2}, /* 13.3 MHz */
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{125, 25, 3}, /* 10.0 MHz */
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{125, 37, 4}, /* 6.67 MHz */
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{125, 50, 5}, /* 5.0 MHz */
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{ 62, 10, 1}, /* 40.0 MHz */
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{ 62, 12, 3}, /* 20.0 MHz */
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{ 62, 18, 4}, /* 13.3 MHz */
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{ 62, 25, 5}, /* 10.0 MHz */
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};
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static const struct scf_period dt_scf_period[] __attribute__((__unused__)) = {
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{ 62, 9, 1}, /* 80.0 Mhz */
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{ 62, 10, 3}, /* 40.0 Mhz */
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{ 62, 12, 5}, /* 20.0 Mhz */
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{ 62, 18, 6}, /* 13.3 Mhz */
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{ 62, 25, 7}, /* 10.0 Mhz */
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{ 62, 9, 1}, /* 80.0 MHz */
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{ 62, 10, 3}, /* 40.0 MHz */
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{ 62, 12, 5}, /* 20.0 MHz */
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{ 62, 18, 6}, /* 13.3 MHz */
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{ 62, 25, 7}, /* 10.0 MHz */
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};
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#define SIOP_SCID 0x04 /* SCSI chip ID R/W */
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@ -1,4 +1,4 @@
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/* $NetBSD: siopvar_common.h,v 1.22 2002/10/23 02:32:36 christos Exp $ */
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/* $NetBSD: siopvar_common.h,v 1.23 2003/02/21 17:14:05 tsutsui Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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@ -153,9 +153,9 @@ struct siop_common_softc {
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/* features */
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#define SF_BUS_WIDE 0x00000001 /* wide bus */
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#define SF_BUS_ULTRA 0x00000002 /* Ultra (20Mhz) bus */
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#define SF_BUS_ULTRA2 0x00000004 /* Ultra2 (40Mhz) bus */
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#define SF_BUS_ULTRA3 0x00000008 /* Ultra3 (80Mhz) bus */
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#define SF_BUS_ULTRA 0x00000002 /* Ultra (20MHz) bus */
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#define SF_BUS_ULTRA2 0x00000004 /* Ultra2 (40MHz) bus */
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#define SF_BUS_ULTRA3 0x00000008 /* Ultra3 (80MHz) bus */
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#define SF_BUS_DIFF 0x00000010 /* differential bus */
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#define SF_CHIP_LED0 0x00000100 /* led on GPIO0 */
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