Commit Graph

29 Commits

Author SHA1 Message Date
bsh 4f5b0f1294 add CPU ID for Bulverde 2004-04-13 19:14:34 +00:00
scw 336806eb55 Overhaul arm32's abort handlers:
- Assume a permission fault is always the result of an attempted
   write, so no need to disassemble the opcode.
   (as discussed with Richard Earnshaw/Jason Thorpe a week or two ago)

 - Split out non-MMU data aborts into separate functions, and deal
   correctly with XScale imprecise aborts. Specifically, the old code
   made no attempt to handle the double abort faults which can occur
   as a result of two consecutive external (imprecise) aborts. This
   was easy to provoke by read(2)ing from a /dev/mem offset which caused
   an external abort. With the old code, this would bring the system
   down instantly, with little clue as to why. (hint: tf_spsr held
   PSR_ABT32_MODE...)

 - Re-write badaddr_read() to use pcb_onfault instead of adding extra
   overhead to data_abort_handler(). A side effect of this is that it
   now benefits from the XScale double abort recovery.

 - Invoke the cpu-specific prefetch/data abort fixup routines only if
   the host cpu actually needs it. On other cpus, the code is optimised
   away.

 - Sprinkle __predict_{false,true} in all the right places.

 - G/C some excess debugging baggage.
2003-10-31 16:30:15 +00:00
rearnsha e1f8618cbd Add arm1020E cpu id 2003-09-06 08:43:02 +00:00
mycroft b715eaff3c Recognize some TI processors -- not that you'd want to use them. 2003-09-03 02:07:07 +00:00
ichiro 9bccf5da79 add CPU types
IXP425 xscale-core NetworkProcessor

later, Ill commit codes for IXP425-evaluation board
2003-05-13 11:45:52 +00:00
thorpej a6b1913724 Make the ARM_VECTORS_* unsigned. 2003-05-04 02:00:10 +00:00
bsh 40eb5e9921 fix XScale core revision mask, and add masks for core generation and
product number.
2003-03-18 11:17:31 +00:00
rjs ce385ae9b3 Add CPU IDs for PXA B2 and C0 steppings. 2003-02-14 16:00:33 +00:00
briggs c13ee269dd Handle i80200 step D0 and i80321 step B0 2002-07-22 18:17:42 +00:00
ichiro 83c0b66d47 add cpu id for "PXA250/210 3rd version CPUcore".
for using many PDA/xscale-core.
2002-07-10 07:00:50 +00:00
thorpej ffe1440f29 Add the CPU ID for the 600MHz i80321 part. 2002-06-07 18:25:28 +00:00
ichiro 4e89501466 add CPU ID of IXP1200 network processor 2002-04-27 15:50:59 +00:00
thorpej d533e315ee Fix a typo and an omission in last. 2002-04-15 17:27:39 +00:00
thorpej bc6522fb34 Add bits for the XScale Auxillary Control Register. 2002-04-15 16:34:32 +00:00
thorpej d36a56b03a Define the two possible addresses for the ARM vector page. 2002-04-03 22:12:52 +00:00
thorpej 6d66c469bf Add a comment summarizing the post-ARM3 CP15 registers. 2002-04-03 19:57:48 +00:00
thorpej c915b880c5 The 80321 manual lies; it does have a CPU ID distinct from the 80200.
Add that CPU ID, and add a case for it.
2002-03-27 01:34:47 +00:00
thorpej 41f47f03e7 Restructure a few things in order to support other XScale core
I/O processors:
* The i80200 and the i80321 have the same CPU ID, so split the
  CPU_XSCALE option into CPU_XSCALE_80200 and CPU_XSCALE_80321
  options, and don't let them both be defined at the same time.
  XXX May want to revisit this in the future.
* Split some registers common between the i80200 and i80321 into
  <arm/xscale/xscalereg.h>.
* Rename a few existing functions.
2002-03-26 19:29:44 +00:00
bjh21 57eb77d59f Add CPU ID for the ARM1022ES.
Also add a CPU class for ARM10E processors in general.
2002-03-16 14:41:15 +00:00
rjs 9134bf2610 Add Cotulla CPU IDs. 2002-02-14 01:37:20 +00:00
thorpej 959181a8b2 Fetch cache info from the Cache Type register on ARM7TDMI and "greater"
processors.  Report this when the processor is attached.
2001-11-29 02:24:58 +00:00
rjs c1539a6ba2 Add Jazelle mode flag. 2001-07-18 16:31:17 +00:00
bjh21 0bcb071684 Correct CPU_ID_ISOLD() and CPU_ID_IS7(). 2001-03-10 16:19:59 +00:00
bjh21 ab8e9aaefd Add CPU ID for ARM7500FE (determined empirically from two I've got here). 2001-03-04 14:26:26 +00:00
bjh21 5b15e666a1 ARM7100 -> ARM710A, following information from reinoud. 2001-03-01 23:45:56 +00:00
bjh21 bdc357ddfa Guess a CPU ID for the ARM700 as well. 2001-02-25 19:10:28 +00:00
bjh21 9dcb8e583c Add possible CPU ID for ARM7500 (based on arm/cpu.h).
Add macros to distinguish the three formats of CPU ID.
2001-02-25 17:49:34 +00:00
bjh21 887895c344 Add CPU_ID_CPU_MASK. Different, but (I hope) more useful definition than
arm32 currently uses.
2001-02-21 17:41:58 +00:00
bjh21 1178bf4219 Initial potentially sharable <arm/armreg.h>. Used by all arm26 code. 2001-01-22 22:10:39 +00:00