- different set of device control registers.
- non-standard access to the time base.
- 16 byte cache lines.
Approved by: Eduardo Horvath <eeh@netbsd.org>
by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
