- defer access to interrupt configuration register, as its existence depends on
HDRTYPE.
- add "skip particular funtion in multifunction device" functionality
to quirk table.
- add GEODE/NS SC1100 quirk (now boots on soekris Net4801).
be inserted into ktrace records. The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.
Bump the kernel rev up to 1.6V
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
int pci_set_powerstate(pci_chipset_tag_t pc, pcitag_t tag, int newstate)
set power state of the device to newstate.
int pci_get_powerstate(pci_chipset_tag_t pc, pcitag_t tag)
get current power state of the device.
In the future, these functions will be used for ACPI support.
space address and use it where the mappings of the VGA card are registered
before descenting too deep into "memory" type specific code
(pci_mem_find() gets noisy if it doesn't like the register)
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
for a device into two functions:
* pci_probe_device() actually probes/attaches the device specified
by the provide pcitag_t.
* pci_enumerate_bus() enumerates the bus, and calls pci_probe_device()
for each device on the bus. A pci_enumerate_bus_generic() is provided
which implements the old method of doing this: If something found at
dev0/func0, determine number of functions and probe each one.
Machine-dependent code will be able to specify the bus enumeration
routine in the future.
function on all (probed) PCI buses:
int pci_find_device(struct pci_attach_args *pa,
int (*match)(struct pci_attach_args *));
The pci_attach_args structure pointed to by pa is filled in if the
device is found, and 1 is returned. Otherwise 0 is returned.
This function is, unfortunately, needed by the i810 agp code. It's
also of use for LKMs.
Also frob pci_probe_bus to take 2 extra args when used by pci_find_device.
is mapped in a way that is inaccessible by a 32-bit bus_addr_t, then
print a message to that effect and return failure.
Original patches by Bill Studenmund, with a few small changes by me.
of last resort when trying to communicate information about
bogus behaviour of PCI devices to the MI autoconfiguration code.
In general, bogus behaviour should be handled by drivers, but there
are some types of bogons which can't be addressed that way. The
only quirk currently defined is one which indicates that the device
is multi-function even though the device's header says otherwise.
(Mmm, Intel 82371FB PCI-to-ISA Bridge (PIIX); you'd think that at least
Intel would have gotten it right...)
* print all configuration space registers. Then, where possible,
interpret them. (That is, PRESENT ALL THE DATA, then interpret it --
don't hide data behind interpretation. Also, when interpreting
fields, try to print out the specific value that's being interpreted.)
* handle different header types.
* allow caller to specify a function which can interpret the
device-dependent header and is responsible for pretty-printing it.
It spews (use 'options MSGBUFSIZE=...' 8-), but when you want the data,
you really want _all_ of it.
Still needs some cleanup and additional code (e.g. interepretation
of PCI-PCI (type 1) and PCI-Cardbus (type 2(?)) bridge headers).
mapping register, maps it, and returns all of the relevant information.
deprecate use of pci_{io,mem}_find(), but leave them around (for a while)
for backward compatibility with third-party drivers.
arguments, so that a device can tell if its memory and I/O spaces are
enabled. The flags are cleared, depending on the contents of devices CSR
registers, in the machine-independent PCI bus code.
that their child busses can be attached after the PCI bus
autoconfiguration for their parent bus is done.
This works because:
(1) there can be at most one ISA/EISA bridge per PCI bus, and
(2) any ISA/EISA bridges must be attached to primary PCI
busses (i.e. bus zero).
That boils down to: there can only be one of these outstanding
at a time, it is cleared when configuring PCI bus 0 before any
subdevices have been found, and it is run after all subdevices
of PCI bus 0 have been found.
This (or something like it) is needed because there are some (legacy)
PCI devices which can show up as ISA/EISA devices as well (the prime
example of which are VGA controllers). If you attach ISA from a
PCI-ISA/EISA bridge, and the bridge is seen before the video board is,
the board can show up as an ISA device, and that can (bogusly)
complicate the PCI device's attach code, or make the PCI device not be
properly attached at all.
This could be done with machine-dependent code, but as more ports
add support for PCI (and PCI-ISA/EISA bridges) more will need it.
The i386 port could (perhaps should) be converted to use it as well.
- No more distinction between i/o-mapped and memory-mapped
devices. It's all "bus space" now, and space tags
differentiate the space with finer grain than the
bus chipset tag.
- Add memory barrier methods.
- Implement space alloc/free methods.
- Implement region read/write methods (like memcpy to/from
bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.
(soon to be documented on mailing lists; eventually in section 9 manual
pages), most importantly:
(1) support interrupt pin swizzling on non-i386 systems with
PCI-PCI bridges (per PPB spec; done, but meaningless, on i386).
(2) provide pci_{io,mem}_find(), to determine what I/O or memory
space is described by a given PCI configuration space
mapping register.
(3) provide pci_intr_map(), pci_intr_string(), and
pci_intr_{,dis}establish() to manipulate and print info about
PCI interrupts.
(4) make pci functions take as an argument a machine-dependent
cookie, to allow more flexibility in implementation.
pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
hook (pci_md_attach_hook()) to do any machine-dependent attachment
gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
(defaults to 32. on i386, it's 32 if pci conf mode == 1, 16 if 2.)
attaching, and to the devices when attaching them. #include <machine/bus.h>
to make this backward compatible with old #include requirements.
Also, clean up idempotency so that isa/eisa/pci "var.h" headers are
consistent (make them all idempotent).
(1) remove the 'UNSUPP' keyword from the device list,
because it can't be reasonably used (becuase different
devices may be supported on different machines, for
good reason).
(2) enhance pci_devinfo so that class/subclass information
is optional (so pci_devinfo can be used by drivers that
match classes of devices, and want to look up the
devices' names easily).
(3) more known vendors and devices.
