introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
* TLB_NRESERVED is (finally) gone.
introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
* don't call consinit() in obs2{00,66}_machdep.c because consinit() is already
called in ibm4xx_init() (but I'm not sure which place is good)
The code to generate an ISS via an MD5 hash has been present in the
NetBSD kernel since 2001, but it wasn't even exported to userland at
that time. It was agreed on tech-net with the original author <thorpej>
that we should let the user decide if he wants to enable it or not.
Not enabled by default.
targets integer data type value ranges. For now we just use the
hosts uint64_t for parsing & storing integers constants, and test
against the targets limits and assign appropriately, instead of
sometimes (inappropriately) going via the hosts u_long type. As
long as none of our architectures have target long or quad data
types strictly larger than 64 bits, we should be fine with this
fix.
Furthermore, as they stand at the moment, we can't use the current
TARG_INT_MAX and TARG_LONG_MAX constants in C preprocessor expressions,
so remove the conditional on them being equal. Yes, this will
produce dead code for some targets.
This allows an ilp32 host to lint for an lp64 target which uses
e.g. the targets ULONG_MAX constant without triggering an "integer
constant out of range" warning.
OK'ed by christos.
are available for all arches.
Some arches (arm and hppa) use SJLJ expections which requires stuff from
libgcc_s and some (hppa) always do immediate binding - libstdc++ requires
libm.
Fixes PR 33294 and regress/usr.bin/rtld/dlopen on hppa with the soon to
be committed unaligned reloc fix.
apb