Commit Graph

606 Commits

Author SHA1 Message Date
kleink ba482b3950 * On the 601, obliterate all BAT entries when returning from kernel to
userlevel; this is necessary due to the 601, unlike other 6xx, having
  no concept of separated Valid_user vs. Valid_supervisor for BATs.
* When crossing the kernel/userlevel boundary, have platform-provided
  hooks set up the two fixed BAT entries, and possibly additional
  segment registers to redeem the 601's BAT limitations.

Both of the above are only built if the $MACHINE provides these hooks,
sparing others the pain.
2002-05-02 16:47:49 +00:00
kleink 3626919f4c Oops, swapped mtsrin operands in previous. 2002-04-23 17:14:45 +00:00
kleink 3a03930d13 Add a third argument to pmap_bootstrap() which platform-specific
initialization can use to specify additional segment registers to be set
up in the kernel pmap.
2002-04-23 12:41:04 +00:00
kleink 0b463cc8f9 Express tempsave and disisave addresses using the symbolic names of the
exception handlers which they are `borrowed' from.
2002-04-22 23:20:08 +00:00
kleink 0b82377f11 Fix a swapped register pasto(?) introduced in rev. 1.17. 2002-04-22 18:31:11 +00:00
kleink 884898e332 Convert the spill stack frame to use symbolic offset names; inspired by
a conversation with Matt Thomas.
2002-04-21 22:05:45 +00:00
kleink a641861ab8 Rig pmap_print_mmuregs() for the 601. 2002-04-19 20:56:56 +00:00
kleink 99d4b7c71f Unused; already implemented in libkern. 2002-04-18 21:42:36 +00:00
matt 66c475ca19 Use a common genassym.cf for all the PPC_MPC6XX ports. Add a makeoptions to
std.foo to indicate the directory to get genassym.cf from.  Add an intrframe
to <powerpc/frame.h> and make trap_subr.S use symbolic offsets into it.
2002-04-18 20:08:05 +00:00
kleink eb225418ed Don't do random replacement in isitrap601; just like isitrap. 2002-04-18 12:33:26 +00:00
matt 54d0dedd0c Cleanup the debug prints in pmap_enter. 2002-04-13 15:58:30 +00:00
briggs 4fb4a95b7e Install cpu.h. Noted in PR port-powerpc/16285 from smi@sm.sony.co.jp. 2002-04-10 15:36:42 +00:00
matt f8b9dbe468 Add some MPC745x L3CR cache definitions. 2002-04-03 00:12:41 +00:00
matt 830666e31e Clean the icache for pages when they are entered as executable and before
they were either not mapped at all or mapped as non-executable.  Round
memory regions in pmap_bootstrap.
2002-04-03 00:12:07 +00:00
matt 7e121bd39d Properly print out 745x cache information. 2002-04-03 00:09:52 +00:00
eeh 67c9b24c04 Follow the post-UBC semantics of resetting ref/mod collection inside of
pmap_clear_{reference,modify}().
2002-03-28 18:07:31 +00:00
kleink 1b6af7fb37 Add separate 601 versions of DSI/ISI trap entries, considering the
different battable entry format and the combined BAT implementation.
2002-03-27 15:40:46 +00:00
kleink 032762e1e9 On the 601, construct the CPU counter value from the RTC[UL] registers. 2002-03-26 21:50:39 +00:00
matt 12810ed37d Use size_t in prototype (so this will be LP64 clean for PPC64 someday).
Calculate len separately for icache & dcache in case each has different
cacheline widths.  Make the code for both loops the same except for the
dcbst/icbi.  Deal with sizes >=2GB properly (like that'll happen but ...)
2002-03-26 21:20:24 +00:00
kleink 7e9d845469 * Add MPC601 versions of BAT_VA_MATCH_P() and BAT_VALID_P().
* Make the extern declaration of the battable array incomplete;
  a given port might want to use a differently-sized definition to
  support the 601 BAT implementation, where blocks map up to 8M only.
2002-03-25 21:35:45 +00:00
briggs a2e0bd5a5d Use p->p_psstr instead of PS_STRINGS.
Tested on boot to multi-user on sandpoint.
2002-03-18 04:50:32 +00:00
eeh 0754ce0386 Use properties instead of board_info. 2002-03-15 21:12:07 +00:00
eeh 75343f2177 Use new non-PCI mainbus. 2002-03-15 21:10:46 +00:00
eeh 5468c6fb37 Fixup distinguishing between user and kernel addresses for IBM 4xx CPUs. 2002-03-15 21:01:28 +00:00
eeh de5252061e Use properties to pass around board-specific information rather than a
structure.
2002-03-15 20:59:23 +00:00
eeh 7c79cb049f Some files have been moved into powerpc/ibm4xx. 2002-03-14 17:27:59 +00:00
eeh a3833eb1c6 Add this file. 2002-03-13 23:59:58 +00:00
eeh d26d3b351c This should be pretty standard. 2002-03-13 23:12:11 +00:00
eeh 2277f9518e Delete this file. It's only relevent to 405gp. 2002-03-13 23:09:52 +00:00
eeh 2b55b12b59 405gp-specific DCRs. 2002-03-13 23:09:11 +00:00
eeh 266bd056b2 Adapt to the new, separate mainbus. 2002-03-13 19:13:10 +00:00
eeh 8e235a382a Add a vector for machine check traps. 2002-03-13 19:11:53 +00:00
eeh d94ffa460b Generic mainbus driver. 2002-03-13 01:04:16 +00:00
eeh ba8ac60043 pmap improvements:
Remove the cache flush routines that have been moved to cpu.c

Make sure we clear out the unused PA bits in the TTE which causes breakage
on some MMU models.
2002-03-13 00:47:58 +00:00
eeh 9129e6fe1d Generalized IBM UIC driver. 2002-03-13 00:40:50 +00:00
eeh 4b971968ac Add cache_info to cpu_info which provides details about D$ and I$
sizes and line sizes.  This is needed for cache flusing, clearing
memory, and several other operations.  This information is accessible
from userland through a new CPU_CACHEINFO sysctl.
2002-03-13 00:38:13 +00:00
chs bd2a5f591d switch all mpc6xx powerpc ports to NEWPMAP by default.
the old pmap is still available with the OLDPMAP option.
2002-03-09 23:35:56 +00:00
thorpej a180cee23b Pool deals fairly well with physical memory shortage, but it doesn't
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map).  Try to deal with this:

* Group all information about the backend allocator for a pool in a
  separate structure.  The pool references this structure, rather than
  the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
  to become available, but will still fail if it cannot callocate KVA
  space for the pages.  If this happens, carefully drain all pools using
  the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
  some pages, and use that information to make draining easier and more
  efficient.
* Get rid of PR_URGENT.  There was only one use of it, and it could be
  dealt with by the caller.

From art@openbsd.org.
2002-03-08 20:48:27 +00:00
simonb abf4139889 Include libkern.h for strcmp() prototype. 2002-03-08 01:36:34 +00:00
tsutsui 3c8b0446fe Change type of dumpmag to u_int32_t since it is actually
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.
2002-03-06 13:10:18 +00:00
nathanw 3be9fbe42e Move #include <dev/sysmon/sysmonvar.h> inside #ifdef _KERNEL. 2002-03-06 06:37:17 +00:00
kleink 8a79f029ad VRSAVE is SPR 256, not 238. 2002-03-04 13:37:42 +00:00
dbj b5fde890d0 add cnpollc() calls around cngetc for TRAP_PANICWAIT 2002-03-04 04:07:35 +00:00
kleink 995081f947 Make this link again in the absence of envsys/sysmon. 2002-03-04 00:55:04 +00:00
nathanw b50fb54af2 Calculate and print the speed of G3 and G4 processors.
Add code to read the on-chip temperature sensor on the G3 and hook it in
to the envsys/sysmon subsystem. "envstat" now prints the CPU temperature.
2002-03-03 07:31:33 +00:00
nathanw 1eeb28024d Add sysmon data structures to struct cpu_info. 2002-03-03 07:09:09 +00:00
matt d26c78e764 All Moto PPC revisions should be printed as maj.min (0x0200 -> 2.0). 2002-03-03 07:09:01 +00:00
matt e0ba5cf38d Add initial MPC7455 support. 2002-03-03 06:56:09 +00:00
matt 997374a8dd Add MPC7455 2002-03-03 06:47:25 +00:00
nathanw 5d5aeaa547 Add bit definitions for the MMCR's, and event numbers for the events
that are common to the G3 and G4.
2002-03-03 06:38:31 +00:00