Commit Graph

351 Commits

Author SHA1 Message Date
bjh21 6b12ec55b2 Add prototypes for undefinedinstruction() and resethandler(). 2001-11-16 13:12:06 +00:00
thorpej 0b6370bfee Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a).  We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).
2001-11-15 19:22:32 +00:00
thorpej be13b85887 * Give the XScale its own cpu_control() entry point; we have to flush
the Branch Target Buffer of the BPRD bit changes.
* Enable Branch Prediction on the XScale by default.
* Don't invalidate the Branch Target Buffer explicitly. the i80200
  manual (section 5.1, Branch Target Buffer Operation) notes that
  manual software management of the BTB is unnecessary; it is flushed
  implicitly when:
     * processor resets
     * FCSE process ID is written
     * I-cache is invalidated
2001-11-14 01:00:05 +00:00
thorpej 91f49d269d Eliminate some duplicated code here (similar to XScale code):
* sa110_cache_purgeD() is the same as sa110_cache_cleanD() on the
  SA-1 -- make it an alias.
* sa110_cache_syncI() and sa110_cache_purgeID() are identical to
  sa110_cache_cleanD() on the SA-1, with the exception that the
  I-cache must also be flushed.  Save code duplication by moving
  the I-cache flush before the D-cache clean and letting it fall
  through.
2001-11-14 00:08:05 +00:00
chris 8298c55eab Correct comments for ffs algoritm (it isn't using register r0) 2001-11-11 22:07:41 +00:00
thorpej b75edaf367 Some fixes/cleanup to the XScale cache clean code:
* Define a CPWAIT macro as described in the i80200 manual and use it,
  rather than replicating the code in a few places.
* The i80200 manual notes that the line-allocate operation used to
  do global D$ clean does not actually perform a load/fill request
  from external memory, and thus does not actually place valid data
  in the cache lines allocated.  Require that machine-dependent code
  allocate an appropriately-sized chunk of unmapped VA space for the
  global clean operation in order to avoid unpredictable results.
* The i80200 manual notes that the VA range for the Mini-Data global
  clean (which *must* be mapped to physical memory) must be reserved
  exclusively for cleaning the Mini-Data cache.  Require that machine-
  dependent code allocate an appropriately-sized chunk of memory for
  this purpose.
2001-11-11 17:18:27 +00:00
thorpej c653a0ee51 Even though the ARM architecture defines large, standard, and small
pages, we use the standard (4K) page size as PAGE_SIZE.  Make the
PAGE_SIZE related variables compile-time constants that reflect this.

Results in a bit over 2K worth of .text savings, and visibly better
code in the places that use PAGE_SIZE, etc.
2001-11-11 16:40:36 +00:00
thorpej 2ea8a793d0 * Define prologue/epilogue macros for the cache clean functions,
and use them, like we do in the SA-1 code.
* Use numbered labels for loops.
2001-11-11 01:05:11 +00:00
thorpej 3492e0ce0b Fix a missing-whitespace typo. 2001-11-11 01:02:58 +00:00
thorpej eb8206f223 Use numeric labels for loops. 2001-11-11 00:47:49 +00:00
thorpej de8e924e4c * Define prologue/epilogue macros for the cache clean functions,
and use them, rather than replicating the code several times.
* Use numbered labels for loops.
2001-11-11 00:41:48 +00:00
thorpej fe9e809208 Add a comment explaining that we expect the memory controller
registers to already be subregion'd off, and actually init
the PCI DMA tag.
2001-11-10 23:14:51 +00:00
thorpej 9e1b785626 Split all the model/version-specific cpufuncs into separate files
corresponding to the model/version.
2001-11-10 23:14:08 +00:00
thorpej a27687fb2f Fix some whitespace. 2001-11-10 23:12:41 +00:00
thorpej fa6ae96384 This file is not used. 2001-11-10 00:13:58 +00:00
thorpej d1f4bf74ca Add support for PCI DMA on the i80312. We currently just do
DMA via the Secondary Inbound window, for now.  Will probably
need to revisit this at some point.

Require that the board-specific i80312 front-end slice off a
subregion for the memory controller before calling i80312_attach(),
and fix a bug in the IQ80310 front-end that caused the Secondary
Inbound window to be configured incorrectly.
2001-11-09 23:15:52 +00:00
thorpej d32191e3da Add support for configuring the PCI bus (starting with the Secondary
bus only, for now).

XXX Some cleanup wrt. pci_conf_interrupt() needs to happen.
2001-11-09 19:48:35 +00:00
thorpej 671a1b111f Print the fault PC for non-USR Prefetch Aborts. 2001-11-09 19:04:23 +00:00
thorpej 82c11eec1c Clear the Master Abort after reading config space for a non-existent
PCI device.  Disable debugging messages, as PCI config space works now.
2001-11-09 18:04:10 +00:00
thorpej 42a10f6cd4 Implement a badaddr_read() routine which performs a load of the
specified size for the caller, and returns true or false indicating
whether or not a Data Abort occurred (i.e. the address was "bad").
2001-11-09 17:58:00 +00:00
thorpej d16c00cfb2 Disable the ATU interrupt sources (i.e. interrupts that occur when
we get Master or Target aborts).
2001-11-09 17:44:43 +00:00
thorpej 10392361f8 Make the DDB trace output a lot easier to look at. 2001-11-09 16:49:29 +00:00
thorpej 147b1bdc1c Add some rudimentary support for ELF symbols in DDB on the ARM ports.
On platforms which load the kernel sans symbols directly from firmware
(possibly in e.g. S-Record format), call ddb_init() with empty arguments,
so that it will search any compiled in SYMTAB_SPACE.  On all other platforms,
if __ELF__, also call ddb_init() with empty arguments until ELF bootloaders
which pass symbol information are ready.
2001-11-09 07:21:37 +00:00
thorpej 660b98b7dc Snapshot of work-in-progress for Intel i80312 Companion I/O chip;
just basic Inbound and Outbound window setup is done, PCI configuration
space access (not quite working yet), and I/O and Memory space routines
so far.
2001-11-09 03:27:51 +00:00
thorpej 64f23a2423 Adjust the way the PMMRs are defined -- offsets from a base, not
absolutes.  Also, add PPB and more ATU registers.
2001-11-08 03:20:36 +00:00
thorpej b9364bb468 First cut at XScale setup code. Needs more work. 2001-11-07 00:17:36 +00:00
thorpej 46309d6bc6 Const poisoning of cpu/class names. 2001-11-06 20:39:13 +00:00
thorpej 5b3f78d953 "i80200", not "80200". 2001-11-06 20:02:13 +00:00
thorpej f12c8ee306 "XScale", not "Xscale". 2001-11-06 19:59:43 +00:00
thorpej e8982cb969 Make it possible for Makefile.${MACHINE}.inc to provide extra
stuff at the end of SYSTEM_LD_TAIL.
2001-11-06 19:52:21 +00:00
thorpej af0d2bf570 Config info for the i80312 XScale companion I/O chip. 2001-11-05 23:38:55 +00:00
thorpej 20b742fd48 RCS ID. 2001-11-05 23:38:05 +00:00
thorpej 49951f6d12 Prototypes for i80312 routines. 2001-11-05 23:37:41 +00:00
thorpej 22514e4c7d Routines for handling the i80312 memory controller for XScale.
Currently includes a routine to determine memory size from the
SDRAM configuration registers.
2001-11-05 23:37:01 +00:00
thorpej fe988b60bb Add PCI window addresses. 2001-11-04 19:32:32 +00:00
thorpej 95a9886f49 Add a comment describing what this file is. 2001-11-04 01:23:49 +00:00
thorpej 8f626436b6 Add missing RCS ID, add missing name. 2001-11-04 01:16:01 +00:00
rearnsha e4fff4a560 Replace most uses of pmap_pde_p with pmap_pde_page, since that is what
we need later in the code.  This fixes a fatal kernel fault in
pmap_modified_emulation if a user application tries to access a kernel
address that is section-mapped.

Add a diagnostic that detects attempts to call pmap_kenter_pa with a
va that is section-mapped.
2001-11-03 00:06:02 +00:00
rearnsha 64c191c269 Define boolean predicates pmap_pde_page, pmap_pde_section & pmap_pde_fpage,
which return true if their pde argument is a coarse page, section or
fine page respectively.
2001-11-03 00:01:23 +00:00
rearnsha 6dcc9636dc Define L1_FPAGE for fine page entries in L1 page table. 2001-11-02 23:58:46 +00:00
rearnsha 87cb8af648 When clearing the modified bit for modified emulation, don't turn
caching on for a page just because we are clearing the writable bit in
the PTE: this is incompatible with the way pmap_vac_me_harder works,
and the code in the modified emulation handler doesn't know about
recalculating the cachable attributes (nor should it, IMO).

Also, if we are invalidating a page, flush its TLB entry; for some
reason we were only doing this when clearing the Write or modified
bits.

These patches together seem to solve the random seg-faults that were
still occuring occasionally under heavy paging.
2001-11-01 15:49:16 +00:00
rearnsha 839525d027 When creating section maps, use pte_cache_mode for setting the
page attributes of cacheable pages.
2001-10-27 16:51:44 +00:00
rearnsha b044d8f60c Add a couple more diagnostics. 2001-10-27 16:48:50 +00:00
rearnsha e185c586c3 Export pte_cache_mode. Define PT_CACHEABLE in terms of it. 2001-10-27 16:45:35 +00:00
rearnsha 3fd2995a76 Declare the plcom device. 2001-10-27 16:42:37 +00:00
rearnsha 9a322ae54f Set initial spl level to SPL_SERIAL, which for some strange reason
is higher than SPL_HIGH (maybe we should be fixing SPL_HIGH).

If IPL_STATCLOCK is defined, initialize spl_masks[_SPL_STATCLOCK] from
it; otherwise initialize use IPL_CLOCK.
2001-10-27 16:41:00 +00:00
rearnsha 85123cf6bf Add new spl level -- _SPL_STATCLOCK. 2001-10-27 16:37:24 +00:00
rearnsha 8a92dcdaa8 Pull in machine/conf.h to find out if we have the plcom serial driver.
If so, then call plcomsoft when appropriate.
2001-10-27 16:34:12 +00:00
rearnsha 4487810503 Add the IFPGA console device. 2001-10-27 16:29:23 +00:00
jmc 6d536163de Change defaults for kernel compiles. Default all to USETOOLS?=no and have
the etc Makefile override that by putting USETOOLS into $.MAKEOVERRIDES
This way the default for kernel compiles is still to use the installed
toolchain instead of depending on $TOOLDIR. $TOOLDIR can be used by
simply adding USETOOLS=yes to the command line as usual.

Adjust each ports template to set the default no setting and also pull in
bsd.own.mk if they weren't already to ensure they'll build correctly
with the new toolchain setup.
2001-10-26 06:45:33 +00:00